LLVM 20.0.0git
X86LowerTileCopy.cpp
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1//===-- X86LowerTileCopy.cpp - Expand Tile Copy Instructions---------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file defines the pass which lower AMX tile copy instructions. Since
10// there is no tile copy instruction, we need store tile register to stack
11// and load from stack to another tile register. We need extra GR to hold
12// the stride, and we need stack slot to hold the tile data register.
13// We would run this pass after copy propagation, so that we don't miss copy
14// optimization. And we would run this pass before prolog/epilog insertion,
15// so that we can allocate stack slot.
16//
17//===----------------------------------------------------------------------===//
18
19#include "X86.h"
20#include "X86InstrBuilder.h"
21#include "X86InstrInfo.h"
23#include "X86Subtarget.h"
32#include "llvm/CodeGen/Passes.h"
33#include "llvm/IR/DebugLoc.h"
35#include "llvm/Support/Debug.h"
36
37using namespace llvm;
38
39#define DEBUG_TYPE "x86-lower-tile-copy"
40
41namespace {
42
43class X86LowerTileCopy : public MachineFunctionPass {
44public:
45 static char ID;
46
47 X86LowerTileCopy() : MachineFunctionPass(ID) {}
48
49 void getAnalysisUsage(AnalysisUsage &AU) const override;
50
51 bool runOnMachineFunction(MachineFunction &MF) override;
52
53 StringRef getPassName() const override { return "X86 Lower Tile Copy"; }
54};
55
56} // namespace
57
58char X86LowerTileCopy::ID = 0;
59
60INITIALIZE_PASS_BEGIN(X86LowerTileCopy, "lowertilecopy", "Tile Copy Lowering",
61 false, false)
62INITIALIZE_PASS_END(X86LowerTileCopy, "lowertilecopy", "Tile Copy Lowering",
64
65void X86LowerTileCopy::getAnalysisUsage(AnalysisUsage &AU) const {
66 AU.setPreservesAll();
68}
69
71 return new X86LowerTileCopy();
72}
73
74bool X86LowerTileCopy::runOnMachineFunction(MachineFunction &MF) {
76 if (FuncInfo->getAMXProgModel() != AMXProgModelEnum::ManagedRA)
77 return false;
78
79 const X86Subtarget &ST = MF.getSubtarget<X86Subtarget>();
80 const X86InstrInfo *TII = ST.getInstrInfo();
81 const TargetRegisterInfo *TRI = ST.getRegisterInfo();
82 BitVector GR64Regs =
83 TRI->getAllocatableSet(MF, TRI->getRegClass(X86::GR64RegClassID));
84 BitVector TILERegs =
85 TRI->getAllocatableSet(MF, TRI->getRegClass(X86::TILERegClassID));
86 bool Changed = false;
87
88 for (MachineBasicBlock &MBB : MF) {
89 LiveRegUnits UsedRegs(*TRI);
90 UsedRegs.addLiveOuts(MBB);
92 UsedRegs.stepBackward(MI);
93 if (!MI.isCopy())
94 continue;
95 MachineOperand &DstMO = MI.getOperand(0);
96 MachineOperand &SrcMO = MI.getOperand(1);
97 Register SrcReg = SrcMO.getReg();
98 Register DstReg = DstMO.getReg();
99 if (!X86::TILERegClass.contains(DstReg, SrcReg))
100 continue;
101
102 // Allocate stack slot for tile register
103 unsigned Size = TRI->getSpillSize(X86::TILERegClass);
104 Align Alignment = TRI->getSpillAlign(X86::TILERegClass);
105 int TileSS = MF.getFrameInfo().CreateSpillStackObject(Size, Alignment);
106
107 int StrideSS = 0;
108
109 // Pick a killed register to avoid a save/reload.
110 Register GR64Cand = X86::NoRegister;
111 for (auto RegT : GR64Regs.set_bits()) {
112 if (UsedRegs.available(RegT)) {
113 GR64Cand = RegT;
114 break;
115 }
116 }
117
118 const DebugLoc &DL = MI.getDebugLoc();
119 if (GR64Cand) {
120 // mov 64 %reg
121 BuildMI(MBB, MI, DL, TII->get(X86::MOV64ri), GR64Cand).addImm(64);
122 } else {
123 // No available register? Save RAX and reload it after use.
124
125 // Allocate stack slot for stride register
126 Size = TRI->getSpillSize(X86::GR64RegClass);
127 Alignment = TRI->getSpillAlign(X86::GR64RegClass);
128 StrideSS = MF.getFrameInfo().CreateSpillStackObject(Size, Alignment);
129
130 // mov %reg (%sp)
131 addFrameReference(BuildMI(MBB, MI, DL, TII->get(X86::MOV64mr)),
132 StrideSS)
133 .addReg(X86::RAX);
134 // mov 64 %reg
135 BuildMI(MBB, MI, DL, TII->get(X86::MOV64ri), X86::RAX).addImm(64);
136 }
137 // tilestored %tmm, (%sp, %idx)
138#define GET_EGPR_IF_ENABLED(OPC) (ST.hasEGPR() ? OPC##_EVEX : OPC)
139 unsigned Opc = GET_EGPR_IF_ENABLED(X86::TILESTORED);
140 MachineInstr *NewMI =
141 addFrameReference(BuildMI(MBB, MI, DL, TII->get(Opc)), TileSS)
142 .addReg(SrcReg, getKillRegState(SrcMO.isKill()));
143 MachineOperand &MO = NewMI->getOperand(2);
144 MO.setReg(GR64Cand ? GR64Cand : X86::RAX);
145 MO.setIsKill(true);
146 // tileloadd (%sp, %idx), %tmm
147 Opc = GET_EGPR_IF_ENABLED(X86::TILELOADD);
148#undef GET_EGPR_IF_ENABLED
149 NewMI = addFrameReference(BuildMI(MBB, MI, DL, TII->get(Opc), DstReg),
150 TileSS);
151 if (!GR64Cand) {
152 // restore %rax
153 // mov (%sp) %rax
155 BuildMI(MBB, MI, DL, TII->get(X86::MOV64rm), X86::RAX), StrideSS);
156 }
157 MI.eraseFromParent();
158 Changed = true;
159 }
160 }
161 return Changed;
162}
MachineBasicBlock & MBB
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
uint64_t Size
const HexagonInstrInfo * TII
IRTranslator LLVM IR MI
A set of register units.
unsigned const TargetRegisterInfo * TRI
#define INITIALIZE_PASS_END(passName, arg, name, cfg, analysis)
Definition: PassSupport.h:57
#define INITIALIZE_PASS_BEGIN(passName, arg, name, cfg, analysis)
Definition: PassSupport.h:52
static bool contains(SmallPtrSetImpl< ConstantExpr * > &Cache, ConstantExpr *Expr, Constant *C)
Definition: Value.cpp:469
lowertilecopy
#define GET_EGPR_IF_ENABLED(OPC)
Tile Copy Lowering
Represent the analysis usage information of a pass.
A debug info location.
Definition: DebugLoc.h:33
FunctionPass class - This class is used to implement most global optimizations.
Definition: Pass.h:310
A set of register units used to track register liveness.
Definition: LiveRegUnits.h:30
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
virtual bool runOnMachineFunction(MachineFunction &MF)=0
runOnMachineFunction - This method must be overloaded to perform the desired machine code transformat...
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
Ty * getInfo()
getInfo - Keep track of various per-function pieces of information for backends that would like to do...
const MachineInstrBuilder & addImm(int64_t Val) const
Add a new immediate operand.
const MachineInstrBuilder & addReg(Register RegNo, unsigned flags=0, unsigned SubReg=0) const
Add a new virtual register operand.
Representation of each machine instruction.
Definition: MachineInstr.h:69
const MachineOperand & getOperand(unsigned i) const
Definition: MachineInstr.h:579
MachineOperand class - Representation of each machine instruction operand.
void setReg(Register Reg)
Change the register this operand corresponds to.
void setIsKill(bool Val=true)
Register getReg() const
getReg - Returns the register number.
virtual StringRef getPassName() const
getPassName - Return a nice clean name for a pass.
Definition: Pass.cpp:81
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:50
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
X86MachineFunctionInfo - This class is derived from MachineFunction and contains private X86 target-s...
AMXProgModelEnum getAMXProgModel() const
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
Definition: CallingConv.h:24
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
MachineInstrBuilder BuildMI(MachineFunction &MF, const MIMetadata &MIMD, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.
iterator_range< early_inc_iterator_impl< detail::IterOfRange< RangeT > > > make_early_inc_range(RangeT &&Range)
Make a range that does early increment to allow mutation of the underlying range without disrupting i...
Definition: STLExtras.h:656
static const MachineInstrBuilder & addFrameReference(const MachineInstrBuilder &MIB, int FI, int Offset=0, bool mem=true)
addFrameReference - This function is used to add a reference to the base of an abstract object on the...
FunctionPass * createX86LowerTileCopyPass()
Return a pass that lower the tile copy instruction.
auto reverse(ContainerTy &&C)
Definition: STLExtras.h:419
unsigned getKillRegState(bool B)
This struct is a compact representation of a valid (non-zero power of two) alignment.
Definition: Alignment.h:39