AArch64ExpandPseudoInsts.cpp File Reference

#include "AArch64ExpandImm.h"
#include "AArch64InstrInfo.h"
#include "AArch64MachineFunctionInfo.h"
#include "AArch64Subtarget.h"
#include "MCTargetDesc/AArch64AddressingModes.h"
#include "Utils/AArch64BaseInfo.h"
#include "llvm/CodeGen/LivePhysRegs.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/MachineConstantPool.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineOperand.h"
#include "llvm/CodeGen/TargetSubtargetInfo.h"
#include "llvm/IR/DebugLoc.h"
#include "llvm/MC/MCInstrDesc.h"
#include "llvm/Pass.h"
#include "llvm/Support/CodeGen.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/TargetParser/Triple.h"
#include <cassert>
#include <cstdint>
#include <iterator>
#include <utility>

Go to the source code of this file.

Macros
#define	AARCH64_EXPAND_PSEUDO_NAME   "AArch64 pseudo instruction expansion pass"

Functions
	INITIALIZE_PASS (AArch64ExpandPseudo, "aarch64-expand-pseudo", AARCH64_EXPAND_PSEUDO_NAME, false, false) static void transferImpOps(MachineInstr &OldMI
	Transfer implicit operands on the pseudo instruction to the instructions created from the expansion.
	for (const MachineOperand &MO :llvm::drop_begin(OldMI.operands(), Desc.getNumOperands()))
static MachineInstr *	createCallWithOps (MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, const AArch64InstrInfo *TII, unsigned Opcode, ArrayRef< MachineOperand > ExplicitOps, unsigned RegMaskStartIdx)
static MachineInstr *	createCall (MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, const AArch64InstrInfo *TII, MachineOperand &CallTarget, unsigned RegMaskStartIdx)

Variables
MachineInstrBuilder &	UseMI
MachineInstrBuilder MachineInstrBuilder &	DefMI

Macro Definition Documentation

AARCH64_EXPAND_PSEUDO_NAME

#define AARCH64_EXPAND_PSEUDO_NAME   "AArch64 pseudo instruction expansion pass"

Definition at line 45 of file AArch64ExpandPseudoInsts.cpp.

Function Documentation

createCall()

static MachineInstr * createCall ( MachineBasicBlock &  MBB, MachineBasicBlock::iterator  MBBI, const AArch64InstrInfo *  TII, MachineOperand &  CallTarget, unsigned  RegMaskStartIdx  )

static

Definition at line 823 of file AArch64ExpandPseudoInsts.cpp.

References assert(), createCallWithOps(), llvm::MachineOperand::isGlobal(), llvm::MachineOperand::isReg(), MBB, MBBI, and TII.

createCallWithOps()

static MachineInstr * createCallWithOps ( MachineBasicBlock &  MBB, MachineBasicBlock::iterator  MBBI, const AArch64InstrInfo *  TII, unsigned  Opcode, ArrayRef< MachineOperand >  ExplicitOps, unsigned  RegMaskStartIdx  )

static

Definition at line 792 of file AArch64ExpandPseudoInsts.cpp.

References llvm::MachineInstrBuilder::add(), assert(), llvm::BuildMI(), llvm::MachineOperand::CreateReg(), llvm::drop_begin(), llvm::MachineInstrBuilder::getInstr(), llvm::MachineOperand::getReg(), llvm::MachineOperand::isReg(), llvm::MachineOperand::isUndef(), MBB, MBBI, and TII.

Referenced by createCall().

for()

for

(

const MachineOperand &MO

:llvm::drop_beginOldMI.operands(), Desc.getNumOperands()

)

Definition at line 113 of file AArch64ExpandPseudoInsts.cpp.

References llvm::MachineInstrBuilder::add(), assert(), DefMI, and UseMI.

Referenced by canRenameUntilSecondLoad(), checkDyldCommand(), checkDylibCommand(), checkRpathCommand(), checkSubCommand(), llvm::ModuleSymbolTable::CollectAsmSymvers(), collectBitParts(), llvm::VPlanTransforms::dropPoisonGeneratingRecipes(), llvm::AppleAcceleratorTable::dump(), llvm::AArch64FrameLowering::emitPrologue(), llvm::BitTracker::RegisterCell::extract(), firstch(), freeset(), freezeset(), isProfitableChain(), llvm::orc::lookupAndRecordAddrs(), llvm::OutlinedHashTree::merge(), nch(), llvm::BitVector::operator&=(), llvm::operator<<(), llvm::FunctionVarLocs::print(), llvm::rdf::CopyPropagation::run(), simplifyAMDGCNImageIntrinsic(), llvm::orc::DLLImportDefinitionGenerator::tryToGenerate(), updateAndRemoveSymbols(), updateRegisterMapForDbgValueListAfterMove(), and llvm::logicalview::LVSymbolVisitor::visitKnownRecord().

INITIALIZE_PASS()

INITIALIZE_PASS	(	AArch64ExpandPseudo	,
		"aarch64-expand-pseudo"	,
		AARCH64_EXPAND_PSEUDO_NAME	,
		false	,
		false
	)		&

Transfer implicit operands on the pseudo instruction to the instructions created from the expansion.

Variable Documentation

DefMI

MachineInstrBuilder MachineInstrBuilder& DefMI

Initial value:

{
  const MCInstrDesc &Desc = OldMI.getDesc()

Definition at line 111 of file AArch64ExpandPseudoInsts.cpp.

Referenced by adjustDefLatency(), llvm::AArch64Subtarget::adjustSchedDependency(), llvm::AArch64InstrInfo::canFoldIntoAddrMode(), canFoldIntoCSel(), llvm::LiveRangeEdit::checkRematerializable(), llvm::ScheduleDAGMILive::computeCyclicCriticalPath(), llvm::TargetSchedModel::computeOperandLatency(), llvm::TargetSchedModel::computeOutputLatency(), llvm::GCNSchedStage::computeSUnitReadyCycle(), llvm::PPCInstrInfo::convertToImmediateForm(), llvm::SIInstrInfo::convertToThreeAddress(), llvm::TargetInstrInfo::defaultDefLatency(), llvm::CombinerHelper::dominates(), llvm::InstrEmitter::EmitDbgInstrRef(), llvm::execMayBeModifiedBeforeAnyUse(), llvm::execMayBeModifiedBeforeUse(), llvm::MachineFunction::finalizeDebugInstrRefs(), findImplictDefMIFromReg(), llvm::SIInstrInfo::foldImmediate(), llvm::ARMBaseInstrInfo::foldImmediate(), llvm::PPCInstrInfo::foldImmediate(), llvm::SystemZInstrInfo::foldImmediate(), llvm::VEInstrInfo::foldImmediate(), llvm::X86InstrInfo::foldImmediate(), for(), llvm::PPCInstrInfo::getConstantFromConstantPool(), llvm::getConstFromIntrinsic(), llvm::getDefSrcRegIgnoringCopies(), getFoldableImm(), llvm::ARMHazardRecognizerFPMLx::getHazardType(), llvm::AArch64RegisterBankInfo::getInstrMapping(), llvm::PPCRegisterBankInfo::getInstrMapping(), llvm::RISCVRegisterBankInfo::getInstrMapping(), llvm::X86RegisterBankInfo::getInstrMapping(), llvm::getOpcodeDef(), llvm::TargetInstrInfo::getOperandLatency(), llvm::ARMBaseInstrInfo::getOperandLatency(), llvm::HexagonInstrInfo::getOperandLatency(), llvm::PPCInstrInfo::getOperandLatency(), llvm::SystemZRegisterInfo::getRegAllocationHints(), llvm::X86InstrInfo::hasHighOperandLatency(), llvm::TargetInstrInfo::hasLowDefLatency(), hasRAWHazard(), INITIALIZE_PASS(), llvm::MachineTraceMetrics::Trace::isDepInTrace(), llvm::isKnownNeverNaN(), llvm::isNZCVTouchedInInstructionRange(), llvm::CombinerHelper::isPredecessor(), llvm::CombinerHelper::matchExtendThroughPhis(), llvm::PPCInstrInfo::onlyFoldImmediate(), llvm::AArch64InstrInfo::optimizeCondBranch(), llvm::SystemZInstrInfo::optimizeLoadInstr(), llvm::X86InstrInfo::optimizeLoadInstr(), llvm::LanaiInstrInfo::optimizeSelect(), llvm::ARMBaseInstrInfo::optimizeSelect(), llvm::RISCVInstrInfo::optimizeSelect(), llvm::LiveVariables::recomputeForSingleDefVirtReg(), regIsPICBase(), removeCopies(), scavengeVReg(), llvm::X86FrameLowering::spillFPBP(), llvm::TailDuplicator::tailDuplicateAndUpdate(), llvm::LegalizationArtifactCombiner::tryFoldImplicitDef(), updatePHIs(), and valueIsKnownNeverF32Denorm().

UseMI

MachineInstrBuilder& UseMI

Definition at line 110 of file AArch64ExpandPseudoInsts.cpp.

Referenced by llvm::Combiner::WorkListMaintainerImpl< Lvl >::addUsersToWorkList(), llvm::AArch64Subtarget::adjustSchedDependency(), llvm::Combiner::WorkListMaintainerImpl< Lvl >::appliedCombine(), llvm::CombinerHelper::applyCombineExtendingLoads(), llvm::TargetSchedModel::computeOperandLatency(), llvm::CombinerHelper::dominates(), llvm::execMayBeModifiedBeforeUse(), llvm::ModuloScheduleExpander::expand(), llvm::PeelingModuloScheduleExpander::filterInstructions(), findAssignTypeInstr(), llvm::SIInstrInfo::foldImmediate(), llvm::ARMBaseInstrInfo::foldImmediate(), llvm::PPCInstrInfo::foldImmediate(), llvm::SystemZInstrInfo::foldImmediate(), llvm::VEInstrInfo::foldImmediate(), llvm::X86InstrInfo::foldImmediate(), for(), generateAssignInstrs(), getDataDeps(), llvm::AArch64RegisterBankInfo::getInstrMapping(), llvm::PPCRegisterBankInfo::getInstrMapping(), llvm::RISCVRegisterBankInfo::getInstrMapping(), llvm::X86RegisterBankInfo::getInstrMapping(), llvm::TargetInstrInfo::getOperandLatency(), llvm::ARMBaseInstrInfo::getOperandLatency(), llvm::HexagonInstrInfo::getOperandLatency(), llvm::PPCInstrInfo::getOperandLatency(), getPHIDeps(), isCopyFeedingInvariantStore(), isDefLiveOut(), llvm::MachineTraceMetrics::Trace::isDepInTrace(), llvm::isNZCVTouchedInInstructionRange(), llvm::CombinerHelper::isPredecessor(), llvm::MachineRegisterInfo::markUsesInDebugValueAsUndef(), llvm::CombinerHelper::matchCombineDivRem(), llvm::CombinerHelper::matchCombineExtendingLoads(), llvm::CombinerHelper::matchPtrAddImmedChain(), llvm::PPCInstrInfo::onlyFoldImmediate(), llvm::PPCInstrInfo::optimizeCompareInstr(), processInstrsWithTypeFolding(), pushDepHeight(), llvm::SIInstrInfo::readlaneVGPRToSGPR(), llvm::LiveVariables::recomputeForSingleDefVirtReg(), llvm::LegalizationArtifactCombiner::replaceRegOrBuildCopy(), llvm::MachineSSAUpdater::RewriteUse(), llvm::PeelingModuloScheduleExpander::rewriteUsesOf(), llvm::SelectionDAGISel::runOnMachineFunction(), llvm::Mips16RegisterInfo::saveScavengerRegister(), llvm::RegScavenger::scavengeRegisterBackwards(), llvm::LiveIntervals::shrinkToUses(), llvm::TailDuplicator::tailDuplicateAndUpdate(), tryChangeVGPRtoSGPRinCopy(), llvm::MachineTraceMetrics::Ensemble::updateDepth(), updatePhysDepsDownwards(), and verifyCFIntrinsic().