30#define DEBUG_TYPE "tti"
34 cl::desc(
"Recognize reduction patterns."));
38 cl::desc(
"Use this to override the target cache line size when "
39 "specified by the user."));
43 cl::desc(
"Use this to override the target's minimum page size."));
48 "Use this to override the target's predictable branch threshold (%)."));
62 std::unique_ptr<const TargetTransformInfoImplBase> Impl)
79 ScalarizationCost(ScalarizationCost), LibInfo(LibInfo) {
82 FMF = FPMO->getFastMathFlags();
87 ParamTys.insert(ParamTys.begin(), FTy->param_begin(), FTy->param_end());
95 : II(
I), RetTy(RTy), IID(Id), FMF(Flags), ScalarizationCost(ScalarCost) {
96 ParamTys.insert(ParamTys.begin(), Tys.
begin(), Tys.
end());
101 : RetTy(Ty), IID(Id) {
103 Arguments.insert(Arguments.begin(), Args.begin(), Args.end());
104 ParamTys.reserve(Arguments.size());
113 : II(
I), RetTy(RTy), IID(Id), FMF(Flags), ScalarizationCost(ScalarCost),
115 ParamTys.insert(ParamTys.begin(), Tys.
begin(), Tys.
end());
116 Arguments.insert(Arguments.begin(), Args.begin(), Args.end());
132 L->getExitingBlocks(ExitingBlocks);
137 if (!
L->isLoopLatch(BB)) {
146 if (ConstEC->getValue()->isZero())
167 bool NotAlways =
false;
169 if (!
L->contains(Pred))
187 if (!BI->isConditional())
207 : TTIImpl(
std::make_unique<NoTTIImpl>(
DL)) {}
212 : TTIImpl(
std::
move(Arg.TTIImpl)) {}
215 TTIImpl = std::move(RHS.TTIImpl);
220 return TTIImpl->getInliningThresholdMultiplier();
225 return TTIImpl->getInliningCostBenefitAnalysisSavingsMultiplier();
231 return TTIImpl->getInliningCostBenefitAnalysisProfitableMultiplier();
235 return TTIImpl->getInliningLastCallToStaticBonus();
240 return TTIImpl->adjustInliningThreshold(CB);
245 return TTIImpl->getCallerAllocaCost(CB, AI);
249 return TTIImpl->getInlinerVectorBonusPercent();
255 return TTIImpl->getGEPCost(PointeeType, Ptr, Operands, AccessType,
CostKind);
263 "If pointers have same base address it has to be provided.");
264 return TTIImpl->getPointersChainCost(Ptrs,
Base, Info, AccessTy,
CostKind);
270 return TTIImpl->getEstimatedNumberOfCaseClusters(
SI, JTSize, PSI, BFI);
279 "TTI should not produce negative costs!");
286 : TTIImpl->getPredictableBranchThreshold();
290 return TTIImpl->getBranchMispredictPenalty();
294 return TTIImpl->hasBranchDivergence(
F);
301 if (
Call->hasFnAttr(Attribute::NoDivergenceSource))
304 return TTIImpl->getInstructionUniformity(V);
308 unsigned ToAS)
const {
309 return TTIImpl->isValidAddrSpaceCast(FromAS, ToAS);
313 unsigned ToAS)
const {
314 return TTIImpl->addrspacesMayAlias(FromAS, ToAS);
318 return TTIImpl->getFlatAddressSpace();
323 return TTIImpl->collectFlatAddressOperands(OpIndexes, IID);
327 unsigned ToAS)
const {
328 return TTIImpl->isNoopAddrSpaceCast(FromAS, ToAS);
333 return TTIImpl->canHaveNonUndefGlobalInitializerInAddressSpace(AS);
337 return TTIImpl->getAssumedAddrSpace(V);
341 return TTIImpl->isSingleThreaded();
344std::pair<const Value *, unsigned>
346 return TTIImpl->getPredicatedAddrSpace(V);
351 return TTIImpl->rewriteIntrinsicWithAddressSpace(
II, OldV, NewV);
355 return TTIImpl->isLoweredToCall(
F);
361 return TTIImpl->isHardwareLoopProfitable(L, SE, AC, LibInfo, HWLoopInfo);
365 return TTIImpl->getEpilogueVectorizationMinVF();
370 return TTIImpl->preferPredicateOverEpilogue(TFI);
374 bool IVUpdateMayOverflow)
const {
375 return TTIImpl->getPreferredTailFoldingStyle(IVUpdateMayOverflow);
378std::optional<Instruction *>
381 return TTIImpl->instCombineIntrinsic(IC,
II);
386 bool &KnownBitsComputed)
const {
387 return TTIImpl->simplifyDemandedUseBitsIntrinsic(IC,
II, DemandedMask, Known,
395 SimplifyAndSetOp)
const {
396 return TTIImpl->simplifyDemandedVectorEltsIntrinsic(
397 IC,
II, DemandedElts, UndefElts, UndefElts2, UndefElts3,
404 return TTIImpl->getUnrollingPreferences(L, SE, UP, ORE);
409 return TTIImpl->getPeelingPreferences(L, SE, PP);
413 return TTIImpl->isLegalAddImmediate(Imm);
417 return TTIImpl->isLegalAddScalableImmediate(Imm);
421 return TTIImpl->isLegalICmpImmediate(Imm);
426 bool HasBaseReg, int64_t Scale,
429 int64_t ScalableOffset)
const {
430 return TTIImpl->isLegalAddressingMode(Ty, BaseGV, BaseOffset, HasBaseReg,
431 Scale, AddrSpace,
I, ScalableOffset);
436 return TTIImpl->isLSRCostLess(C1, C2);
440 return TTIImpl->isNumRegsMajorCostOfLSR();
444 return TTIImpl->shouldDropLSRSolutionIfLessProfitable();
448 return TTIImpl->isProfitableLSRChainElement(
I);
452 return TTIImpl->canMacroFuseCmp();
459 return TTIImpl->canSaveCmp(L, BI, SE, LI, DT, AC, LibInfo);
465 return TTIImpl->getPreferredAddressingMode(L, SE);
471 return TTIImpl->isLegalMaskedStore(DataType, Alignment,
AddressSpace,
478 return TTIImpl->isLegalMaskedLoad(DataType, Alignment,
AddressSpace,
483 Align Alignment)
const {
484 return TTIImpl->isLegalNTStore(DataType, Alignment);
488 return TTIImpl->isLegalNTLoad(DataType, Alignment);
493 return TTIImpl->isLegalBroadcastLoad(ElementTy, NumElements);
497 Align Alignment)
const {
498 return TTIImpl->isLegalMaskedGather(DataType, Alignment);
502 VectorType *VecTy,
unsigned Opcode0,
unsigned Opcode1,
504 return TTIImpl->isLegalAltInstr(VecTy, Opcode0, Opcode1, OpcodeMask);
508 Align Alignment)
const {
509 return TTIImpl->isLegalMaskedScatter(DataType, Alignment);
513 Align Alignment)
const {
514 return TTIImpl->forceScalarizeMaskedGather(DataType, Alignment);
518 Align Alignment)
const {
519 return TTIImpl->forceScalarizeMaskedScatter(DataType, Alignment);
523 Align Alignment)
const {
524 return TTIImpl->isLegalMaskedCompressStore(DataType, Alignment);
528 Align Alignment)
const {
529 return TTIImpl->isLegalMaskedExpandLoad(DataType, Alignment);
533 Align Alignment)
const {
534 return TTIImpl->isLegalStridedLoadStore(DataType, Alignment);
539 unsigned AddrSpace)
const {
540 return TTIImpl->isLegalInterleavedAccessType(VTy, Factor, Alignment,
545 Type *DataType)
const {
546 return TTIImpl->isLegalMaskedVectorHistogram(AddrType, DataType);
550 return TTIImpl->enableOrderedReductions();
554 return TTIImpl->hasDivRemOp(DataType, IsSigned);
558 unsigned AddrSpace)
const {
559 return TTIImpl->hasVolatileVariant(
I, AddrSpace);
563 return TTIImpl->prefersVectorizedAddressing();
568 int64_t Scale,
unsigned AddrSpace)
const {
570 Ty, BaseGV, BaseOffset, HasBaseReg, Scale, AddrSpace);
571 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
576 return TTIImpl->LSRWithInstrQueries();
580 return TTIImpl->isTruncateFree(Ty1, Ty2);
584 return TTIImpl->isProfitableToHoist(
I);
590 return TTIImpl->isTypeLegal(Ty);
594 return TTIImpl->getRegUsageForType(Ty);
598 return TTIImpl->shouldBuildLookupTables();
603 return TTIImpl->shouldBuildLookupTablesForConstant(
C);
607 return TTIImpl->shouldBuildRelLookupTables();
611 return TTIImpl->useColdCCForColdCall(
F);
615 return TTIImpl->useFastCCForInternalCall(
F);
620 return TTIImpl->isTargetIntrinsicTriviallyScalarizable(
ID);
625 return TTIImpl->isTargetIntrinsicWithScalarOpAtArg(
ID, ScalarOpdIdx);
630 return TTIImpl->isTargetIntrinsicWithOverloadTypeAtArg(
ID, OpdIdx);
635 return TTIImpl->isTargetIntrinsicWithStructReturnOverloadAtField(
ID, RetIdx);
642 return TTIImpl->getScalarizationOverhead(Ty, DemandedElts, Insert, Extract,
648 return TTIImpl->getOperandsScalarizationOverhead(Tys,
CostKind);
652 return TTIImpl->supportsEfficientVectorElementLoadStore();
656 return TTIImpl->supportsTailCalls();
660 return TTIImpl->supportsTailCallFor(CB);
664 bool LoopHasReductions)
const {
665 return TTIImpl->enableAggressiveInterleaving(LoopHasReductions);
670 return TTIImpl->enableMemCmpExpansion(OptSize, IsZeroCmp);
674 return TTIImpl->enableSelectOptimize();
679 return TTIImpl->shouldTreatInstructionLikeSelect(
I);
683 return TTIImpl->enableInterleavedAccessVectorization();
687 return TTIImpl->enableMaskedInterleavedAccessVectorization();
691 return TTIImpl->isFPVectorizationPotentiallyUnsafe();
699 unsigned *
Fast)
const {
700 return TTIImpl->allowsMisalignedMemoryAccesses(Context,
BitWidth,
706 return TTIImpl->getPopcntSupport(IntTyWidthInBit);
710 return TTIImpl->haveFastSqrt(Ty);
715 return TTIImpl->isExpensiveToSpeculativelyExecute(
I);
719 return TTIImpl->isFCmpOrdCheaperThanFCmpZero(Ty);
724 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
733 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
741 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
746 unsigned Opcode,
unsigned Idx,
const APInt &Imm,
Type *Ty,
749 TTIImpl->getIntImmCostInst(Opcode, Idx, Imm, Ty,
CostKind, Inst);
750 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
759 TTIImpl->getIntImmCostIntrin(IID, Idx, Imm, Ty,
CostKind);
760 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
766 return TTIImpl->preferToKeepConstantsAttached(Inst, Fn);
770 return TTIImpl->getNumberOfRegisters(ClassID);
774 bool IsStore)
const {
775 return TTIImpl->hasConditionalLoadStoreForType(Ty, IsStore);
780 return TTIImpl->getRegisterClassForType(
Vector, Ty);
784 return TTIImpl->getRegisterClassName(ClassID);
789 return TTIImpl->getRegisterBitWidth(K);
793 return TTIImpl->getMinVectorRegisterBitWidth();
797 return TTIImpl->getMaxVScale();
801 return TTIImpl->getVScaleForTuning();
805 return TTIImpl->isVScaleKnownToBeAPowerOfTwo();
810 return TTIImpl->shouldMaximizeVectorBandwidth(K);
814 bool IsScalable)
const {
815 return TTIImpl->getMinimumVF(ElemWidth, IsScalable);
819 unsigned Opcode)
const {
820 return TTIImpl->getMaximumVF(ElemWidth, Opcode);
824 Type *ScalarValTy)
const {
825 return TTIImpl->getStoreMinimumVF(VF, ScalarMemTy, ScalarValTy);
829 const Instruction &
I,
bool &AllowPromotionWithoutCommonHeader)
const {
830 return TTIImpl->shouldConsiderAddressTypePromotion(
831 I, AllowPromotionWithoutCommonHeader);
836 : TTIImpl->getCacheLineSize();
839std::optional<unsigned>
841 return TTIImpl->getCacheSize(Level);
844std::optional<unsigned>
846 return TTIImpl->getCacheAssociativity(Level);
851 : TTIImpl->getMinPageSize();
855 return TTIImpl->getPrefetchDistance();
859 unsigned NumMemAccesses,
unsigned NumStridedMemAccesses,
860 unsigned NumPrefetches,
bool HasCall)
const {
861 return TTIImpl->getMinPrefetchStride(NumMemAccesses, NumStridedMemAccesses,
862 NumPrefetches, HasCall);
866 return TTIImpl->getMaxPrefetchIterationsAhead();
870 return TTIImpl->enableWritePrefetching();
874 return TTIImpl->shouldPrefetchAddressSpace(AS);
878 unsigned Opcode,
Type *InputTypeA,
Type *InputTypeB,
Type *AccumType,
882 return TTIImpl->getPartialReductionCost(Opcode, InputTypeA, InputTypeB,
883 AccumType, VF, OpAExtend, OpBExtend,
888 return TTIImpl->getMaxInterleaveFactor(VF);
902 if (CI->getValue().isPowerOf2())
904 else if (CI->getValue().isNegatedPowerOf2())
914 if (ShuffleInst->isZeroEltSplat())
929 if (CI->getValue().isPowerOf2())
931 else if (CI->getValue().isNegatedPowerOf2())
937 bool AllPow2 =
true, AllNegPow2 =
true;
938 for (
uint64_t I = 0, E = CDS->getNumElements();
I != E; ++
I) {
940 AllPow2 &= CI->getValue().isPowerOf2();
941 AllNegPow2 &= CI->getValue().isNegatedPowerOf2();
942 if (AllPow2 || AllNegPow2)
945 AllPow2 = AllNegPow2 =
false;
954 return {OpInfo, OpProps};
966 if (TLibInfo && Opcode == Instruction::FRem) {
970 TLibInfo->
getLibFunc(Instruction::FRem, Ty->getScalarType(), Func) &&
977 TTIImpl->getArithmeticInstrCost(Opcode, Ty,
CostKind,
980 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
985 VectorType *VecTy,
unsigned Opcode0,
unsigned Opcode1,
988 TTIImpl->getAltInstrCost(VecTy, Opcode0, Opcode1, OpcodeMask,
CostKind);
989 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
999 "Expected the Mask to match the return size if given");
1001 "Expected the same scalar types");
1003 Kind, DstTy, SrcTy, Mask,
CostKind, Index, SubTp, Args, CxtI);
1004 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1019 case Instruction::CastOps::ZExt:
1021 case Instruction::CastOps::SExt:
1034 auto getLoadStoreKind = [](
const Value *V,
unsigned LdStOp,
unsigned MaskedOp,
1035 unsigned GatScatOp) {
1040 if (
I->getOpcode() == LdStOp)
1044 if (
II->getIntrinsicID() == MaskedOp)
1046 if (
II->getIntrinsicID() == GatScatOp)
1053 switch (
I->getOpcode()) {
1054 case Instruction::ZExt:
1055 case Instruction::SExt:
1056 case Instruction::FPExt:
1057 return getLoadStoreKind(
I->getOperand(0), Instruction::Load,
1058 Intrinsic::masked_load, Intrinsic::masked_gather);
1059 case Instruction::Trunc:
1060 case Instruction::FPTrunc:
1062 return getLoadStoreKind(*
I->user_begin(), Instruction::Store,
1063 Intrinsic::masked_store,
1064 Intrinsic::masked_scatter);
1076 assert((
I ==
nullptr ||
I->getOpcode() == Opcode) &&
1077 "Opcode should reflect passed instruction.");
1079 TTIImpl->getCastInstrCost(Opcode, Dst, Src, CCH,
CostKind,
I);
1080 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1088 TTIImpl->getExtractWithExtendCost(Opcode, Dst, VecTy, Index,
CostKind);
1089 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1095 assert((
I ==
nullptr ||
I->getOpcode() == Opcode) &&
1096 "Opcode should reflect passed instruction.");
1098 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1106 assert((
I ==
nullptr ||
I->getOpcode() == Opcode) &&
1107 "Opcode should reflect passed instruction.");
1109 Opcode, ValTy, CondTy, VecPred,
CostKind, Op1Info, Op2Info,
I);
1110 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1117 assert((Opcode == Instruction::InsertElement ||
1118 Opcode == Instruction::ExtractElement) &&
1119 "Expecting Opcode to be insertelement/extractelement.");
1121 TTIImpl->getVectorInstrCost(Opcode, Val,
CostKind, Index, Op0, Op1);
1122 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1129 ArrayRef<std::tuple<Value *, User *, int>> ScalarUserAndIdx)
const {
1130 assert((Opcode == Instruction::InsertElement ||
1131 Opcode == Instruction::ExtractElement) &&
1132 "Expecting Opcode to be insertelement/extractelement.");
1134 Opcode, Val,
CostKind, Index, Scalar, ScalarUserAndIdx);
1135 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1142 unsigned Index)
const {
1147 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1153 unsigned Index)
const {
1155 TTIImpl->getIndexedVectorInstrCostFromEnd(Opcode, Val,
CostKind, Index);
1156 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1162 assert((Opcode == Instruction::InsertValue ||
1163 Opcode == Instruction::ExtractValue) &&
1164 "Expecting Opcode to be insertvalue/extractvalue.");
1166 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1171 Type *EltTy,
int ReplicationFactor,
int VF,
const APInt &DemandedDstElts,
1174 EltTy, ReplicationFactor, VF, DemandedDstElts,
CostKind);
1175 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1183 assert((
I ==
nullptr ||
I->getOpcode() == Opcode) &&
1184 "Opcode should reflect passed instruction.");
1187 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1194 bool UseMaskForCond,
bool UseMaskForGaps)
const {
1197 UseMaskForCond, UseMaskForGaps);
1198 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1206 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1214 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1223 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1228 return TTIImpl->getNumberOfParts(Tp);
1235 TTIImpl->getAddressComputationCost(PtrTy, SE, Ptr,
CostKind);
1236 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1242 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1247 return TTIImpl->getMaxMemIntrinsicInlineSizeThreshold();
1251 unsigned Opcode,
VectorType *Ty, std::optional<FastMathFlags> FMF,
1254 TTIImpl->getArithmeticReductionCost(Opcode, Ty, FMF,
CostKind);
1255 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1263 TTIImpl->getMinMaxReductionCost(IID, Ty, FMF,
CostKind);
1264 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1271 return TTIImpl->getExtendedReductionCost(Opcode, IsUnsigned, ResTy, Ty, FMF,
1276 bool IsUnsigned,
unsigned RedOpcode,
Type *ResTy,
VectorType *Ty,
1278 return TTIImpl->getMulAccReductionCost(IsUnsigned, RedOpcode, ResTy, Ty,
1284 return TTIImpl->getCostOfKeepingLiveOverCall(Tys);
1289 return TTIImpl->getTgtMemIntrinsic(Inst, Info);
1293 return TTIImpl->getAtomicMemIntrinsicMaxElementSize();
1298 return TTIImpl->getOrCreateResultFromMemIntrinsic(Inst, ExpectedType,
1304 unsigned DestAddrSpace,
Align SrcAlign,
Align DestAlign,
1305 std::optional<uint32_t> AtomicElementSize)
const {
1306 return TTIImpl->getMemcpyLoopLoweringType(Context,
Length, SrcAddrSpace,
1307 DestAddrSpace, SrcAlign, DestAlign,
1313 unsigned RemainingBytes,
unsigned SrcAddrSpace,
unsigned DestAddrSpace,
1315 std::optional<uint32_t> AtomicCpySize)
const {
1316 TTIImpl->getMemcpyLoopResidualLoweringType(
1317 OpsOut, Context, RemainingBytes, SrcAddrSpace, DestAddrSpace, SrcAlign,
1318 DestAlign, AtomicCpySize);
1323 return TTIImpl->areInlineCompatible(Caller, Callee);
1329 unsigned DefaultCallPenalty)
const {
1330 return TTIImpl->getInlineCallPenalty(
F,
Call, DefaultCallPenalty);
1336 return TTIImpl->areTypesABICompatible(Caller, Callee, Types);
1341 return TTIImpl->isIndexedLoadLegal(Mode, Ty);
1346 return TTIImpl->isIndexedStoreLegal(Mode, Ty);
1350 return TTIImpl->getLoadStoreVecRegBitWidth(AS);
1354 return TTIImpl->isLegalToVectorizeLoad(LI);
1358 return TTIImpl->isLegalToVectorizeStore(
SI);
1362 unsigned ChainSizeInBytes,
Align Alignment,
unsigned AddrSpace)
const {
1363 return TTIImpl->isLegalToVectorizeLoadChain(ChainSizeInBytes, Alignment,
1368 unsigned ChainSizeInBytes,
Align Alignment,
unsigned AddrSpace)
const {
1369 return TTIImpl->isLegalToVectorizeStoreChain(ChainSizeInBytes, Alignment,
1375 return TTIImpl->isLegalToVectorizeReduction(RdxDesc, VF);
1379 return TTIImpl->isElementTypeLegalForScalableVector(Ty);
1384 unsigned ChainSizeInBytes,
1386 return TTIImpl->getLoadVectorFactor(VF, LoadSize, ChainSizeInBytes, VecTy);
1391 unsigned ChainSizeInBytes,
1393 return TTIImpl->getStoreVectorFactor(VF, StoreSize, ChainSizeInBytes, VecTy);
1397 bool IsEpilogue)
const {
1398 return TTIImpl->preferFixedOverScalableIfEqualCost(IsEpilogue);
1403 return TTIImpl->preferInLoopReduction(Kind, Ty);
1407 return TTIImpl->preferAlternateOpcodeVectorization();
1411 return TTIImpl->preferPredicatedReductionSelect();
1415 return TTIImpl->preferEpilogueVectorization();
1419 return TTIImpl->shouldConsiderVectorizationRegPressure();
1424 return TTIImpl->getVPLegalizationStrategy(VPI);
1428 return TTIImpl->hasArmWideBranch(Thumb);
1432 return TTIImpl->getFeatureMask(
F);
1436 return TTIImpl->getPriorityMask(
F);
1440 return TTIImpl->isMultiversionedFunction(
F);
1444 return TTIImpl->getMaxNumArgs();
1448 return TTIImpl->shouldExpandReduction(
II);
1454 return TTIImpl->getPreferredExpandedReductionShuffle(
II);
1458 return TTIImpl->getGISelRematGlobalCost();
1462 return TTIImpl->getMinTripCountTailFoldingThreshold();
1466 return TTIImpl->supportsScalableVectors();
1470 return TTIImpl->enableScalableVectorization();
1474 return TTIImpl->hasActiveVectorLength();
1479 return TTIImpl->isProfitableToSinkOperands(
I, OpsToSink);
1483 return TTIImpl->isVectorShiftByScalarCheap(Ty);
1489 return TTIImpl->getNumBytesToPadGlobalArray(
Size,
ArrayType);
1495 return TTIImpl->collectKernelLaunchBounds(
F, LB);
1499 return TTIImpl->allowVectorElementIndexingUsingGEP();
1508 : TTICallback(
std::
move(TTICallback)) {}
1512 assert(!
F.isIntrinsic() &&
"Should not request TTI for intrinsics");
1513 return TTICallback(
F);
1519 return Result(
F.getDataLayout());
1524 "Target Transform Information",
false,
true)
1538 TTI = TIRA.run(
F, DummyFAM);
for(const MachineOperand &MO :llvm::drop_begin(OldMI.operands(), Desc.getNumOperands()))
assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
static cl::opt< OutputCostKind > CostKind("cost-kind", cl::desc("Target cost kind"), cl::init(OutputCostKind::RecipThroughput), cl::values(clEnumValN(OutputCostKind::RecipThroughput, "throughput", "Reciprocal throughput"), clEnumValN(OutputCostKind::Latency, "latency", "Instruction latency"), clEnumValN(OutputCostKind::CodeSize, "code-size", "Code size"), clEnumValN(OutputCostKind::SizeAndLatency, "size-latency", "Code size and latency"), clEnumValN(OutputCostKind::All, "all", "Print all cost kinds")))
static cl::opt< bool > ForceNestedLoop("force-nested-hardware-loop", cl::Hidden, cl::init(false), cl::desc("Force allowance of nested hardware loops"))
static cl::opt< bool > ForceHardwareLoopPHI("force-hardware-loop-phi", cl::Hidden, cl::init(false), cl::desc("Force hardware loop counter to be updated through a phi"))
This file provides various utilities for inspecting and working with the control flow graph in LLVM I...
Module.h This file contains the declarations for the Module class.
uint64_t IntrinsicInst * II
#define INITIALIZE_PASS(passName, arg, name, cfg, analysis)
This file defines the SmallVector class.
static SymbolRef::Type getType(const Symbol *Sym)
Class for arbitrary precision integers.
an instruction to allocate memory on the stack
This class represents an incoming formal argument to a Function.
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
Class to represent array types.
A cache of @llvm.assume calls within a function.
LLVM Basic Block Representation.
BlockFrequencyInfo pass uses BlockFrequencyInfoImpl implementation to estimate IR basic block frequen...
Conditional or Unconditional Branch instruction.
Base class for all callable instructions (InvokeInst and CallInst) Holds everything related to callin...
Function * getCalledFunction() const
Returns the function called, or null if this is an indirect function invocation or the function signa...
User::op_iterator arg_begin()
Return the iterator pointing to the beginning of the argument list.
User::op_iterator arg_end()
Return the iterator pointing to the end of the argument list.
Predicate
This enumeration lists the possible predicates for CmpInst subclasses.
This is an important base class in LLVM.
A parsed version of the target data layout string in and methods for querying it.
Concrete subclass of DominatorTreeBase that is used to compute a normal dominator tree.
LLVM_ABI bool dominates(const BasicBlock *BB, const Use &U) const
Return true if the (end of the) basic block BB dominates the use U.
Convenience struct for specifying and reasoning about fast-math flags.
Class to represent function types.
FunctionType * getFunctionType() const
Returns the FunctionType for me.
ImmutablePass class - This class is used to provide information that does not need to be run.
The core instruction combiner logic.
LLVM_ABI IntrinsicCostAttributes(Intrinsic::ID Id, const CallBase &CI, InstructionCost ScalarCost=InstructionCost::getInvalid(), bool TypeBasedOnly=false, TargetLibraryInfo const *LibInfo=nullptr)
A wrapper class for inspecting calls to intrinsic functions.
This is an important class for using LLVM in a threaded context.
An instruction for reading from memory.
Wrapper class to LoopBlocksDFS that provides a standard begin()/end() interface for the DFS reverse p...
void perform(const LoopInfo *LI)
Traverse the loop blocks and store the DFS result.
LoopT * getLoopFor(const BlockT *BB) const
Return the inner most loop that BB lives in.
Represents a single loop in the control flow graph.
Information for memory intrinsic cost model.
Analysis providing profile information.
The RecurrenceDescriptor is used to identify recurrences variables in a loop.
This class represents a constant integer value.
This class represents an analyzed expression in the program.
The main scalar evolution driver.
LLVM_ABI uint64_t getTypeSizeInBits(Type *Ty) const
Return the size in bits of the specified type, for which isSCEVable must return true.
LLVM_ABI bool isLoopInvariant(const SCEV *S, const Loop *L)
Return true if the value of the given SCEV is unchanging in the specified loop.
LLVM_ABI const SCEV * getExitCount(const Loop *L, const BasicBlock *ExitingBlock, ExitCountKind Kind=Exact)
Return the number of times the backedge executes before the given exit would be taken; if not exactly...
This is a 'bitvector' (really, a variable-sized bit array), optimized for the case when the array is ...
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
StackOffset holds a fixed and a scalable offset in bytes.
An instruction for storing to memory.
Analysis pass providing the TargetTransformInfo.
LLVM_ABI Result run(const Function &F, FunctionAnalysisManager &)
TargetTransformInfo Result
LLVM_ABI TargetIRAnalysis()
Default construct a target IR analysis.
Provides information about what library functions are available for the current target.
bool getLibFunc(StringRef funcName, LibFunc &F) const
Searches for a particular function name.
StringRef getName(LibFunc F) const
bool isFunctionVectorizable(StringRef F, const ElementCount &VF) const
The instances of the Type class are immutable: once they are created, they are never changed.
LLVM_ABI bool isScalableTy(SmallPtrSetImpl< const Type * > &Visited) const
Return true if this is a type whose size is a known multiple of vscale.
static LLVM_ABI IntegerType * getInt32Ty(LLVMContext &C)
Type * getScalarType() const
If this is a vector type, return the element type, otherwise return 'this'.
This is the common base class for vector predication intrinsics.
LLVM Value Representation.
Type * getType() const
All values are typed, get the type of this value.
Base class of all SIMD vector types.
ElementCount getElementCount() const
Return an ElementCount instance to represent the (possibly scalable) number of elements in the vector...
constexpr ScalarTy getKnownMinValue() const
Returns the minimum value this quantity can represent.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
@ Fast
Attempts to make calls as fast as possible (e.g.
@ C
The default llvm calling convention, compatible with C.
initializer< Ty > init(const Ty &Val)
This is an optimization pass for GlobalISel generic memory operations.
decltype(auto) dyn_cast(const From &Val)
dyn_cast<X> - Return the argument parameter cast to the specified type.
LLVM_ABI Value * getSplatValue(const Value *V)
Get splat value if the input is a splat vector or return nullptr.
bool containsIrreducibleCFG(RPOTraversalT &RPOTraversal, const LoopInfoT &LI)
Return true if the control flow in RPOTraversal is irreducible.
bool isa(const From &Val)
isa<X> - Return true if the parameter to the template is an instance of one of the template type argu...
LLVM_ABI ImmutablePass * createTargetTransformInfoWrapperPass(TargetIRAnalysis TIRA)
Create an analysis pass wrapper around a TTI object.
RecurKind
These are the kinds of recurrences that we support.
constexpr unsigned BitWidth
OutputIt move(R &&Range, OutputIt Out)
Provide wrappers to std::move which take ranges instead of having to pass begin/end explicitly.
auto predecessors(const MachineBasicBlock *BB)
AnalysisManager< Function > FunctionAnalysisManager
Convenience typedef for the Function analysis manager.
InstructionUniformity
Enum describing how instructions behave with respect to uniformity and divergence,...
@ AlwaysUniform
The result values are always uniform.
Implement std::hash so that hash_code can be used in STL containers.
This struct is a compact representation of a valid (non-zero power of two) alignment.
A special type used by analysis passes to provide an address that identifies that particular analysis...
Attributes of a target dependent hardware loop.
LLVM_ABI bool canAnalyze(LoopInfo &LI)
HardwareLoopInfo()=delete
LLVM_ABI bool isHardwareLoopCandidate(ScalarEvolution &SE, LoopInfo &LI, DominatorTree &DT, bool ForceNestedLoop=false, bool ForceHardwareLoopPHI=false)
Information about a load/store intrinsic defined by the target.