LLVM 23.0.0git
TargetTransformInfo.cpp
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1//===- llvm/Analysis/TargetTransformInfo.cpp ------------------------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8
11#include "llvm/Analysis/CFG.h"
15#include "llvm/IR/CFG.h"
16#include "llvm/IR/Dominators.h"
17#include "llvm/IR/Instruction.h"
20#include "llvm/IR/Module.h"
21#include "llvm/IR/Operator.h"
24#include <optional>
25#include <utility>
26
27using namespace llvm;
28using namespace PatternMatch;
29
30#define DEBUG_TYPE "tti"
31
32static cl::opt<bool> EnableReduxCost("costmodel-reduxcost", cl::init(false),
34 cl::desc("Recognize reduction patterns."));
35
37 "cache-line-size", cl::init(0), cl::Hidden,
38 cl::desc("Use this to override the target cache line size when "
39 "specified by the user."));
40
42 "min-page-size", cl::init(0), cl::Hidden,
43 cl::desc("Use this to override the target's minimum page size."));
44
46 "predictable-branch-threshold", cl::init(99), cl::Hidden,
48 "Use this to override the target's predictable branch threshold (%)."));
49
50namespace {
51/// No-op implementation of the TTI interface using the utility base
52/// classes.
53///
54/// This is used when no target specific information is available.
55struct NoTTIImpl : TargetTransformInfoImplCRTPBase<NoTTIImpl> {
56 explicit NoTTIImpl(const DataLayout &DL)
57 : TargetTransformInfoImplCRTPBase<NoTTIImpl>(DL) {}
58};
59} // namespace
60
62 std::unique_ptr<const TargetTransformInfoImplBase> Impl)
63 : TTIImpl(std::move(Impl)) {}
64
66 // If the loop has irreducible control flow, it can not be converted to
67 // Hardware loop.
68 LoopBlocksRPO RPOT(L);
69 RPOT.perform(&LI);
71 return false;
72 return true;
73}
74
76 Intrinsic::ID Id, const CallBase &CI, InstructionCost ScalarizationCost,
77 bool TypeBasedOnly)
78 : II(dyn_cast<IntrinsicInst>(&CI)), RetTy(CI.getType()), IID(Id),
79 ScalarizationCost(ScalarizationCost) {
80
81 if (const auto *FPMO = dyn_cast<FPMathOperator>(&CI))
82 FMF = FPMO->getFastMathFlags();
83
84 if (!TypeBasedOnly)
85 Arguments.insert(Arguments.begin(), CI.arg_begin(), CI.arg_end());
87 ParamTys.insert(ParamTys.begin(), FTy->param_begin(), FTy->param_end());
88}
89
92 FastMathFlags Flags,
93 const IntrinsicInst *I,
94 InstructionCost ScalarCost)
95 : II(I), RetTy(RTy), IID(Id), FMF(Flags), ScalarizationCost(ScalarCost) {
96 ParamTys.insert(ParamTys.begin(), Tys.begin(), Tys.end());
97}
98
101 : RetTy(Ty), IID(Id) {
102
103 Arguments.insert(Arguments.begin(), Args.begin(), Args.end());
104 ParamTys.reserve(Arguments.size());
105 for (const Value *Argument : Arguments)
106 ParamTys.push_back(Argument->getType());
107}
108
112 FastMathFlags Flags,
113 const IntrinsicInst *I,
114 InstructionCost ScalarCost)
115 : II(I), RetTy(RTy), IID(Id), FMF(Flags), ScalarizationCost(ScalarCost) {
116 ParamTys.insert(ParamTys.begin(), Tys.begin(), Tys.end());
117 Arguments.insert(Arguments.begin(), Args.begin(), Args.end());
118}
119
121 // Match default options:
122 // - hardware-loop-counter-bitwidth = 32
123 // - hardware-loop-decrement = 1
124 CountType = Type::getInt32Ty(L->getHeader()->getContext());
125 LoopDecrement = ConstantInt::get(CountType, 1);
126}
127
129 LoopInfo &LI, DominatorTree &DT,
130 bool ForceNestedLoop,
132 SmallVector<BasicBlock *, 4> ExitingBlocks;
133 L->getExitingBlocks(ExitingBlocks);
134
135 for (BasicBlock *BB : ExitingBlocks) {
136 // If we pass the updated counter back through a phi, we need to know
137 // which latch the updated value will be coming from.
138 if (!L->isLoopLatch(BB)) {
140 continue;
141 }
142
143 const SCEV *EC = SE.getExitCount(L, BB);
145 continue;
146 if (const SCEVConstant *ConstEC = dyn_cast<SCEVConstant>(EC)) {
147 if (ConstEC->getValue()->isZero())
148 continue;
149 } else if (!SE.isLoopInvariant(EC, L))
150 continue;
151
152 if (SE.getTypeSizeInBits(EC->getType()) > CountType->getBitWidth())
153 continue;
154
155 // If this exiting block is contained in a nested loop, it is not eligible
156 // for insertion of the branch-and-decrement since the inner loop would
157 // end up messing up the value in the CTR.
158 if (!IsNestingLegal && LI.getLoopFor(BB) != L && !ForceNestedLoop)
159 continue;
160
161 // We now have a loop-invariant count of loop iterations (which is not the
162 // constant zero) for which we know that this loop will not exit via this
163 // existing block.
164
165 // We need to make sure that this block will run on every loop iteration.
166 // For this to be true, we must dominate all blocks with backedges. Such
167 // blocks are in-loop predecessors to the header block.
168 bool NotAlways = false;
169 for (BasicBlock *Pred : predecessors(L->getHeader())) {
170 if (!L->contains(Pred))
171 continue;
172
173 if (!DT.dominates(BB, Pred)) {
174 NotAlways = true;
175 break;
176 }
177 }
178
179 if (NotAlways)
180 continue;
181
182 // Make sure this blocks ends with a conditional branch.
183 Instruction *TI = BB->getTerminator();
184 if (!TI)
185 continue;
186
187 if (BranchInst *BI = dyn_cast<BranchInst>(TI)) {
188 if (!BI->isConditional())
189 continue;
190
191 ExitBranch = BI;
192 } else
193 continue;
194
195 // Note that this block may not be the loop latch block, even if the loop
196 // has a latch block.
197 ExitBlock = BB;
198 ExitCount = EC;
199 break;
200 }
201
202 if (!ExitBlock)
203 return false;
204 return true;
205}
206
208 : TTIImpl(std::make_unique<NoTTIImpl>(DL)) {}
209
211
214
216 TTIImpl = std::move(RHS.TTIImpl);
217 return *this;
218}
219
221 return TTIImpl->getInliningThresholdMultiplier();
222}
223
224unsigned
226 return TTIImpl->getInliningCostBenefitAnalysisSavingsMultiplier();
227}
228
229unsigned
231 const {
232 return TTIImpl->getInliningCostBenefitAnalysisProfitableMultiplier();
233}
234
236 return TTIImpl->getInliningLastCallToStaticBonus();
237}
238
239unsigned
241 return TTIImpl->adjustInliningThreshold(CB);
242}
243
245 const AllocaInst *AI) const {
246 return TTIImpl->getCallerAllocaCost(CB, AI);
247}
248
250 return TTIImpl->getInlinerVectorBonusPercent();
251}
252
254 Type *PointeeType, const Value *Ptr, ArrayRef<const Value *> Operands,
255 Type *AccessType, TTI::TargetCostKind CostKind) const {
256 return TTIImpl->getGEPCost(PointeeType, Ptr, Operands, AccessType, CostKind);
257}
258
261 const TTI::PointersChainInfo &Info, Type *AccessTy,
263 assert((Base || !Info.isSameBase()) &&
264 "If pointers have same base address it has to be provided.");
265 return TTIImpl->getPointersChainCost(Ptrs, Base, Info, AccessTy, CostKind);
266}
267
269 const SwitchInst &SI, unsigned &JTSize, ProfileSummaryInfo *PSI,
270 BlockFrequencyInfo *BFI) const {
271 return TTIImpl->getEstimatedNumberOfCaseClusters(SI, JTSize, PSI, BFI);
272}
273
277 enum TargetCostKind CostKind) const {
278 InstructionCost Cost = TTIImpl->getInstructionCost(U, Operands, CostKind);
280 "TTI should not produce negative costs!");
281 return Cost;
282}
283
285 return PredictableBranchThreshold.getNumOccurrences() > 0
287 : TTIImpl->getPredictableBranchThreshold();
288}
289
291 return TTIImpl->getBranchMispredictPenalty();
292}
293
295 return TTIImpl->hasBranchDivergence(F);
296}
297
300 // Calls with the NoDivergenceSource attribute are always uniform.
301 if (const auto *Call = dyn_cast<CallBase>(V)) {
302 if (Call->hasFnAttr(Attribute::NoDivergenceSource))
304 }
305 return TTIImpl->getInstructionUniformity(V);
306}
307
309 unsigned ToAS) const {
310 return TTIImpl->isValidAddrSpaceCast(FromAS, ToAS);
311}
312
314 unsigned ToAS) const {
315 return TTIImpl->addrspacesMayAlias(FromAS, ToAS);
316}
317
319 return TTIImpl->getFlatAddressSpace();
320}
321
323 SmallVectorImpl<int> &OpIndexes, Intrinsic::ID IID) const {
324 return TTIImpl->collectFlatAddressOperands(OpIndexes, IID);
325}
326
328 unsigned ToAS) const {
329 return TTIImpl->isNoopAddrSpaceCast(FromAS, ToAS);
330}
331
332std::pair<KnownBits, KnownBits>
334 const Value &PtrOp) const {
335 return TTIImpl->computeKnownBitsAddrSpaceCast(ToAS, PtrOp);
336}
337
339 unsigned FromAS, unsigned ToAS, const KnownBits &FromPtrBits) const {
340 return TTIImpl->computeKnownBitsAddrSpaceCast(FromAS, ToAS, FromPtrBits);
341}
342
344 unsigned SrcAS, unsigned DstAS) const {
345 return TTIImpl->getAddrSpaceCastPreservedPtrMask(SrcAS, DstAS);
346}
347
349 unsigned AS) const {
350 return TTIImpl->canHaveNonUndefGlobalInitializerInAddressSpace(AS);
351}
352
354 return TTIImpl->getAssumedAddrSpace(V);
355}
356
358 return TTIImpl->isSingleThreaded();
359}
360
361std::pair<const Value *, unsigned>
363 return TTIImpl->getPredicatedAddrSpace(V);
364}
365
367 IntrinsicInst *II, Value *OldV, Value *NewV) const {
368 return TTIImpl->rewriteIntrinsicWithAddressSpace(II, OldV, NewV);
369}
370
372 return TTIImpl->isLoweredToCall(F);
373}
374
377 TargetLibraryInfo *LibInfo, HardwareLoopInfo &HWLoopInfo) const {
378 return TTIImpl->isHardwareLoopProfitable(L, SE, AC, LibInfo, HWLoopInfo);
379}
380
382 return TTIImpl->getEpilogueVectorizationMinVF();
383}
384
386 TailFoldingInfo *TFI) const {
387 return TTIImpl->preferPredicateOverEpilogue(TFI);
388}
389
391 return TTIImpl->getPreferredTailFoldingStyle();
392}
393
394std::optional<Instruction *>
396 IntrinsicInst &II) const {
397 return TTIImpl->instCombineIntrinsic(IC, II);
398}
399
401 InstCombiner &IC, IntrinsicInst &II, APInt DemandedMask, KnownBits &Known,
402 bool &KnownBitsComputed) const {
403 return TTIImpl->simplifyDemandedUseBitsIntrinsic(IC, II, DemandedMask, Known,
404 KnownBitsComputed);
405}
406
408 InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts,
409 APInt &UndefElts2, APInt &UndefElts3,
410 std::function<void(Instruction *, unsigned, APInt, APInt &)>
411 SimplifyAndSetOp) const {
412 return TTIImpl->simplifyDemandedVectorEltsIntrinsic(
413 IC, II, DemandedElts, UndefElts, UndefElts2, UndefElts3,
414 SimplifyAndSetOp);
415}
416
419 OptimizationRemarkEmitter *ORE) const {
420 return TTIImpl->getUnrollingPreferences(L, SE, UP, ORE);
421}
422
424 PeelingPreferences &PP) const {
425 return TTIImpl->getPeelingPreferences(L, SE, PP);
426}
427
429 return TTIImpl->isLegalAddImmediate(Imm);
430}
431
433 return TTIImpl->isLegalAddScalableImmediate(Imm);
434}
435
437 return TTIImpl->isLegalICmpImmediate(Imm);
438}
439
441 int64_t BaseOffset,
442 bool HasBaseReg, int64_t Scale,
443 unsigned AddrSpace,
444 Instruction *I,
445 int64_t ScalableOffset) const {
446 return TTIImpl->isLegalAddressingMode(Ty, BaseGV, BaseOffset, HasBaseReg,
447 Scale, AddrSpace, I, ScalableOffset);
448}
449
451 const LSRCost &C2) const {
452 return TTIImpl->isLSRCostLess(C1, C2);
453}
454
456 return TTIImpl->isNumRegsMajorCostOfLSR();
457}
458
460 return TTIImpl->shouldDropLSRSolutionIfLessProfitable();
461}
462
464 return TTIImpl->isProfitableLSRChainElement(I);
465}
466
468 return TTIImpl->canMacroFuseCmp();
469}
470
472 ScalarEvolution *SE, LoopInfo *LI,
474 TargetLibraryInfo *LibInfo) const {
475 return TTIImpl->canSaveCmp(L, BI, SE, LI, DT, AC, LibInfo);
476}
477
480 ScalarEvolution *SE) const {
481 return TTIImpl->getPreferredAddressingMode(L, SE);
482}
483
485 unsigned AddressSpace,
486 TTI::MaskKind MaskKind) const {
487 return TTIImpl->isLegalMaskedStore(DataType, Alignment, AddressSpace,
488 MaskKind);
489}
490
492 unsigned AddressSpace,
493 TTI::MaskKind MaskKind) const {
494 return TTIImpl->isLegalMaskedLoad(DataType, Alignment, AddressSpace,
495 MaskKind);
496}
497
499 Align Alignment) const {
500 return TTIImpl->isLegalNTStore(DataType, Alignment);
501}
502
503bool TargetTransformInfo::isLegalNTLoad(Type *DataType, Align Alignment) const {
504 return TTIImpl->isLegalNTLoad(DataType, Alignment);
505}
506
508 ElementCount NumElements) const {
509 return TTIImpl->isLegalBroadcastLoad(ElementTy, NumElements);
510}
511
513 Align Alignment) const {
514 return TTIImpl->isLegalMaskedGather(DataType, Alignment);
515}
516
518 VectorType *VecTy, unsigned Opcode0, unsigned Opcode1,
519 const SmallBitVector &OpcodeMask) const {
520 return TTIImpl->isLegalAltInstr(VecTy, Opcode0, Opcode1, OpcodeMask);
521}
522
524 Align Alignment) const {
525 return TTIImpl->isLegalMaskedScatter(DataType, Alignment);
526}
527
529 Align Alignment) const {
530 return TTIImpl->forceScalarizeMaskedGather(DataType, Alignment);
531}
532
534 Align Alignment) const {
535 return TTIImpl->forceScalarizeMaskedScatter(DataType, Alignment);
536}
537
539 Align Alignment) const {
540 return TTIImpl->isLegalMaskedCompressStore(DataType, Alignment);
541}
542
544 Align Alignment) const {
545 return TTIImpl->isLegalMaskedExpandLoad(DataType, Alignment);
546}
547
549 Align Alignment) const {
550 return TTIImpl->isLegalStridedLoadStore(DataType, Alignment);
551}
552
554 VectorType *VTy, unsigned Factor, Align Alignment,
555 unsigned AddrSpace) const {
556 return TTIImpl->isLegalInterleavedAccessType(VTy, Factor, Alignment,
557 AddrSpace);
558}
559
561 Type *DataType) const {
562 return TTIImpl->isLegalMaskedVectorHistogram(AddrType, DataType);
563}
564
566 return TTIImpl->enableOrderedReductions();
567}
568
569bool TargetTransformInfo::hasDivRemOp(Type *DataType, bool IsSigned) const {
570 return TTIImpl->hasDivRemOp(DataType, IsSigned);
571}
572
574 unsigned AddrSpace) const {
575 return TTIImpl->hasVolatileVariant(I, AddrSpace);
576}
577
579 return TTIImpl->prefersVectorizedAddressing();
580}
581
583 Type *Ty, GlobalValue *BaseGV, StackOffset BaseOffset, bool HasBaseReg,
584 int64_t Scale, unsigned AddrSpace) const {
585 InstructionCost Cost = TTIImpl->getScalingFactorCost(
586 Ty, BaseGV, BaseOffset, HasBaseReg, Scale, AddrSpace);
587 assert(Cost >= 0 && "TTI should not produce negative costs!");
588 return Cost;
589}
590
592 return TTIImpl->LSRWithInstrQueries();
593}
594
596 return TTIImpl->isTruncateFree(Ty1, Ty2);
597}
598
600 return TTIImpl->isProfitableToHoist(I);
601}
602
603bool TargetTransformInfo::useAA() const { return TTIImpl->useAA(); }
604
606 return TTIImpl->isTypeLegal(Ty);
607}
608
610 return TTIImpl->getRegUsageForType(Ty);
611}
612
614 return TTIImpl->shouldBuildLookupTables();
615}
616
618 Constant *C) const {
619 return TTIImpl->shouldBuildLookupTablesForConstant(C);
620}
621
623 return TTIImpl->shouldBuildRelLookupTables();
624}
625
627 return TTIImpl->useColdCCForColdCall(F);
628}
629
631 return TTIImpl->useFastCCForInternalCall(F);
632}
633
635 Intrinsic::ID ID) const {
636 return TTIImpl->isTargetIntrinsicTriviallyScalarizable(ID);
637}
638
640 Intrinsic::ID ID, unsigned ScalarOpdIdx) const {
641 return TTIImpl->isTargetIntrinsicWithScalarOpAtArg(ID, ScalarOpdIdx);
642}
643
645 Intrinsic::ID ID, int OpdIdx) const {
646 return TTIImpl->isTargetIntrinsicWithOverloadTypeAtArg(ID, OpdIdx);
647}
648
650 Intrinsic::ID ID, int RetIdx) const {
651 return TTIImpl->isTargetIntrinsicWithStructReturnOverloadAtField(ID, RetIdx);
652}
653
656 if (!I)
658
659 // For inserts, check if the value being inserted comes from a single-use
660 // load.
661 if (isa<InsertElementInst>(I) && isa<LoadInst>(I->getOperand(1)) &&
662 I->getOperand(1)->hasOneUse())
664
665 // For extracts, check if it has a single use that is a store.
666 if (isa<ExtractElementInst>(I) && I->hasOneUse() &&
667 isa<StoreInst>(*I->user_begin()))
669
671}
672
674 VectorType *Ty, const APInt &DemandedElts, bool Insert, bool Extract,
675 TTI::TargetCostKind CostKind, bool ForPoisonSrc, ArrayRef<Value *> VL,
676 TTI::VectorInstrContext VIC) const {
677 return TTIImpl->getScalarizationOverhead(Ty, DemandedElts, Insert, Extract,
678 CostKind, ForPoisonSrc, VL, VIC);
679}
680
683 TTI::VectorInstrContext VIC) const {
684 return TTIImpl->getOperandsScalarizationOverhead(Tys, CostKind, VIC);
685}
686
688 return TTIImpl->supportsEfficientVectorElementLoadStore();
689}
690
692 return TTIImpl->supportsTailCalls();
693}
694
696 return TTIImpl->supportsTailCallFor(CB);
697}
698
700 bool LoopHasReductions) const {
701 return TTIImpl->enableAggressiveInterleaving(LoopHasReductions);
702}
703
705TargetTransformInfo::enableMemCmpExpansion(bool OptSize, bool IsZeroCmp) const {
706 return TTIImpl->enableMemCmpExpansion(OptSize, IsZeroCmp);
707}
708
710 return TTIImpl->enableSelectOptimize();
711}
712
714 const Instruction *I) const {
715 return TTIImpl->shouldTreatInstructionLikeSelect(I);
716}
717
719 return TTIImpl->enableInterleavedAccessVectorization();
720}
721
723 return TTIImpl->enableMaskedInterleavedAccessVectorization();
724}
725
727 return TTIImpl->isFPVectorizationPotentiallyUnsafe();
728}
729
730bool
732 unsigned BitWidth,
733 unsigned AddressSpace,
734 Align Alignment,
735 unsigned *Fast) const {
736 return TTIImpl->allowsMisalignedMemoryAccesses(Context, BitWidth,
737 AddressSpace, Alignment, Fast);
738}
739
741TargetTransformInfo::getPopcntSupport(unsigned IntTyWidthInBit) const {
742 return TTIImpl->getPopcntSupport(IntTyWidthInBit);
743}
744
746 return TTIImpl->haveFastSqrt(Ty);
747}
748
750 const Instruction *I) const {
751 return TTIImpl->isExpensiveToSpeculativelyExecute(I);
752}
753
755 return TTIImpl->isFCmpOrdCheaperThanFCmpZero(Ty);
756}
757
759 InstructionCost Cost = TTIImpl->getFPOpCost(Ty);
760 assert(Cost >= 0 && "TTI should not produce negative costs!");
761 return Cost;
762}
763
765 unsigned Idx,
766 const APInt &Imm,
767 Type *Ty) const {
768 InstructionCost Cost = TTIImpl->getIntImmCodeSizeCost(Opcode, Idx, Imm, Ty);
769 assert(Cost >= 0 && "TTI should not produce negative costs!");
770 return Cost;
771}
772
776 InstructionCost Cost = TTIImpl->getIntImmCost(Imm, Ty, CostKind);
777 assert(Cost >= 0 && "TTI should not produce negative costs!");
778 return Cost;
779}
780
782 unsigned Opcode, unsigned Idx, const APInt &Imm, Type *Ty,
785 TTIImpl->getIntImmCostInst(Opcode, Idx, Imm, Ty, CostKind, Inst);
786 assert(Cost >= 0 && "TTI should not produce negative costs!");
787 return Cost;
788}
789
792 const APInt &Imm, Type *Ty,
795 TTIImpl->getIntImmCostIntrin(IID, Idx, Imm, Ty, CostKind);
796 assert(Cost >= 0 && "TTI should not produce negative costs!");
797 return Cost;
798}
799
801 const Instruction &Inst, const Function &Fn) const {
802 return TTIImpl->preferToKeepConstantsAttached(Inst, Fn);
803}
804
805unsigned TargetTransformInfo::getNumberOfRegisters(unsigned ClassID) const {
806 return TTIImpl->getNumberOfRegisters(ClassID);
807}
808
810 bool IsStore) const {
811 return TTIImpl->hasConditionalLoadStoreForType(Ty, IsStore);
812}
813
815 Type *Ty) const {
816 return TTIImpl->getRegisterClassForType(Vector, Ty);
817}
818
819const char *TargetTransformInfo::getRegisterClassName(unsigned ClassID) const {
820 return TTIImpl->getRegisterClassName(ClassID);
821}
822
825 return TTIImpl->getRegisterBitWidth(K);
826}
827
829 return TTIImpl->getMinVectorRegisterBitWidth();
830}
831
832std::optional<unsigned> TargetTransformInfo::getMaxVScale() const {
833 return TTIImpl->getMaxVScale();
834}
835
836std::optional<unsigned> TargetTransformInfo::getVScaleForTuning() const {
837 return TTIImpl->getVScaleForTuning();
838}
839
842 return TTIImpl->shouldMaximizeVectorBandwidth(K);
843}
844
846 bool IsScalable) const {
847 return TTIImpl->getMinimumVF(ElemWidth, IsScalable);
848}
849
850unsigned TargetTransformInfo::getMaximumVF(unsigned ElemWidth,
851 unsigned Opcode) const {
852 return TTIImpl->getMaximumVF(ElemWidth, Opcode);
853}
854
855unsigned TargetTransformInfo::getStoreMinimumVF(unsigned VF, Type *ScalarMemTy,
856 Type *ScalarValTy) const {
857 return TTIImpl->getStoreMinimumVF(VF, ScalarMemTy, ScalarValTy);
858}
859
861 const Instruction &I, bool &AllowPromotionWithoutCommonHeader) const {
862 return TTIImpl->shouldConsiderAddressTypePromotion(
863 I, AllowPromotionWithoutCommonHeader);
864}
865
867 return CacheLineSize.getNumOccurrences() > 0 ? CacheLineSize
868 : TTIImpl->getCacheLineSize();
869}
870
871std::optional<unsigned>
873 return TTIImpl->getCacheSize(Level);
874}
875
876std::optional<unsigned>
878 return TTIImpl->getCacheAssociativity(Level);
879}
880
881std::optional<unsigned> TargetTransformInfo::getMinPageSize() const {
882 return MinPageSize.getNumOccurrences() > 0 ? MinPageSize
883 : TTIImpl->getMinPageSize();
884}
885
887 return TTIImpl->getPrefetchDistance();
888}
889
891 unsigned NumMemAccesses, unsigned NumStridedMemAccesses,
892 unsigned NumPrefetches, bool HasCall) const {
893 return TTIImpl->getMinPrefetchStride(NumMemAccesses, NumStridedMemAccesses,
894 NumPrefetches, HasCall);
895}
896
898 return TTIImpl->getMaxPrefetchIterationsAhead();
899}
900
902 return TTIImpl->enableWritePrefetching();
903}
904
906 return TTIImpl->shouldPrefetchAddressSpace(AS);
907}
908
910 unsigned Opcode, Type *InputTypeA, Type *InputTypeB, Type *AccumType,
912 PartialReductionExtendKind OpBExtend, std::optional<unsigned> BinOp,
913 TTI::TargetCostKind CostKind, std::optional<FastMathFlags> FMF) const {
914 return TTIImpl->getPartialReductionCost(Opcode, InputTypeA, InputTypeB,
915 AccumType, VF, OpAExtend, OpBExtend,
916 BinOp, CostKind, FMF);
917}
918
920 return TTIImpl->getMaxInterleaveFactor(VF);
921}
922
927
928 // undef/poison don't materialize constants.
929 if (isa<UndefValue>(V))
930 return {OK_AnyValue, OP_None};
931
932 if (isa<ConstantInt>(V) || isa<ConstantFP>(V)) {
933 if (const auto *CI = dyn_cast<ConstantInt>(V)) {
934 if (CI->getValue().isPowerOf2())
935 OpProps = OP_PowerOf2;
936 else if (CI->getValue().isNegatedPowerOf2())
937 OpProps = OP_NegatedPowerOf2;
938 }
939 return {OK_UniformConstantValue, OpProps};
940 }
941
942 // A broadcast shuffle creates a uniform value.
943 // TODO: Add support for non-zero index broadcasts.
944 // TODO: Add support for different source vector width.
945 if (const auto *ShuffleInst = dyn_cast<ShuffleVectorInst>(V))
946 if (ShuffleInst->isZeroEltSplat())
947 OpInfo = OK_UniformValue;
948
949 const Value *Splat = getSplatValue(V);
950
951 // Check for a splat of a constant or for a non uniform vector of constants
952 // and check if the constant(s) are all powers of two.
953 if (Splat) {
954 // Check for a splat of a uniform value. This is not loop aware, so return
955 // true only for the obviously uniform cases (argument, globalvalue)
957 OpInfo = OK_UniformValue;
958 } else if (isa<Constant>(Splat)) {
960 if (auto *CI = dyn_cast<ConstantInt>(Splat)) {
961 if (CI->getValue().isPowerOf2())
962 OpProps = OP_PowerOf2;
963 else if (CI->getValue().isNegatedPowerOf2())
964 OpProps = OP_NegatedPowerOf2;
965 }
966 }
967 } else if (const auto *CDS = dyn_cast<ConstantDataSequential>(V)) {
969 bool AllPow2 = true, AllNegPow2 = true;
970 for (uint64_t I = 0, E = CDS->getNumElements(); I != E; ++I) {
971 if (auto *CI = dyn_cast<ConstantInt>(CDS->getElementAsConstant(I))) {
972 AllPow2 &= CI->getValue().isPowerOf2();
973 AllNegPow2 &= CI->getValue().isNegatedPowerOf2();
974 if (AllPow2 || AllNegPow2)
975 continue;
976 }
977 AllPow2 = AllNegPow2 = false;
978 break;
979 }
980 OpProps = AllPow2 ? OP_PowerOf2 : OpProps;
981 OpProps = AllNegPow2 ? OP_NegatedPowerOf2 : OpProps;
982 } else if (isa<ConstantVector>(V) || isa<ConstantDataVector>(V)) {
984 }
985
986 return {OpInfo, OpProps};
987}
988
992 if (X == Y)
993 return OpInfoX;
994 return OpInfoX.mergeWith(getOperandInfo(Y));
995}
996
998 unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind,
999 OperandValueInfo Op1Info, OperandValueInfo Op2Info,
1000 ArrayRef<const Value *> Args, const Instruction *CxtI,
1001 const TargetLibraryInfo *TLibInfo) const {
1002
1003 // Use call cost for frem intructions that have platform specific vector math
1004 // functions, as those will be replaced with calls later by SelectionDAG or
1005 // ReplaceWithVecLib pass.
1006 if (TLibInfo && Opcode == Instruction::FRem) {
1007 VectorType *VecTy = dyn_cast<VectorType>(Ty);
1008 LibFunc Func;
1009 if (VecTy &&
1010 TLibInfo->getLibFunc(Instruction::FRem, Ty->getScalarType(), Func) &&
1011 TLibInfo->isFunctionVectorizable(TLibInfo->getName(Func),
1012 VecTy->getElementCount()))
1013 return getCallInstrCost(nullptr, VecTy, {VecTy, VecTy}, CostKind);
1014 }
1015
1016 InstructionCost Cost = TTIImpl->getArithmeticInstrCost(
1017 Opcode, Ty, CostKind, Op1Info, Op2Info, Args, CxtI);
1018 assert(Cost >= 0 && "TTI should not produce negative costs!");
1019 return Cost;
1020}
1021
1023 VectorType *VecTy, unsigned Opcode0, unsigned Opcode1,
1024 const SmallBitVector &OpcodeMask, TTI::TargetCostKind CostKind) const {
1026 TTIImpl->getAltInstrCost(VecTy, Opcode0, Opcode1, OpcodeMask, CostKind);
1027 assert(Cost >= 0 && "TTI should not produce negative costs!");
1028 return Cost;
1029}
1030
1032 ShuffleKind Kind, VectorType *DstTy, VectorType *SrcTy, ArrayRef<int> Mask,
1033 TTI::TargetCostKind CostKind, int Index, VectorType *SubTp,
1034 ArrayRef<const Value *> Args, const Instruction *CxtI) const {
1035 assert((Mask.empty() || DstTy->isScalableTy() ||
1036 Mask.size() == DstTy->getElementCount().getKnownMinValue()) &&
1037 "Expected the Mask to match the return size if given");
1038 assert(SrcTy->getScalarType() == DstTy->getScalarType() &&
1039 "Expected the same scalar types");
1040 InstructionCost Cost = TTIImpl->getShuffleCost(
1041 Kind, DstTy, SrcTy, Mask, CostKind, Index, SubTp, Args, CxtI);
1042 assert(Cost >= 0 && "TTI should not produce negative costs!");
1043 return Cost;
1044}
1045
1048 if (auto *Cast = dyn_cast<CastInst>(I))
1049 return getPartialReductionExtendKind(Cast->getOpcode());
1050 return PR_None;
1051}
1052
1055 Instruction::CastOps CastOpc) {
1056 switch (CastOpc) {
1057 case Instruction::CastOps::ZExt:
1058 return PR_ZeroExtend;
1059 case Instruction::CastOps::SExt:
1060 return PR_SignExtend;
1061 case Instruction::CastOps::FPExt:
1062 return PR_FPExtend;
1063 default:
1064 return PR_None;
1065 }
1066 llvm_unreachable("Unhandled cast opcode");
1067}
1068
1071 if (!I)
1072 return CastContextHint::None;
1073
1074 auto getLoadStoreKind = [](const Value *V, unsigned LdStOp, unsigned MaskedOp,
1075 unsigned GatScatOp) {
1077 if (!I)
1078 return CastContextHint::None;
1079
1080 if (I->getOpcode() == LdStOp)
1082
1083 if (const IntrinsicInst *II = dyn_cast<IntrinsicInst>(I)) {
1084 if (II->getIntrinsicID() == MaskedOp)
1086 if (II->getIntrinsicID() == GatScatOp)
1088 }
1089
1091 };
1092
1093 switch (I->getOpcode()) {
1094 case Instruction::ZExt:
1095 case Instruction::SExt:
1096 case Instruction::FPExt:
1097 return getLoadStoreKind(I->getOperand(0), Instruction::Load,
1098 Intrinsic::masked_load, Intrinsic::masked_gather);
1099 case Instruction::Trunc:
1100 case Instruction::FPTrunc:
1101 if (I->hasOneUse())
1102 return getLoadStoreKind(*I->user_begin(), Instruction::Store,
1103 Intrinsic::masked_store,
1104 Intrinsic::masked_scatter);
1105 break;
1106 default:
1107 return CastContextHint::None;
1108 }
1109
1111}
1112
1114 unsigned Opcode, Type *Dst, Type *Src, CastContextHint CCH,
1115 TTI::TargetCostKind CostKind, const Instruction *I) const {
1116 assert((I == nullptr || I->getOpcode() == Opcode) &&
1117 "Opcode should reflect passed instruction.");
1119 TTIImpl->getCastInstrCost(Opcode, Dst, Src, CCH, CostKind, I);
1120 assert(Cost >= 0 && "TTI should not produce negative costs!");
1121 return Cost;
1122}
1123
1125 unsigned Opcode, Type *Dst, VectorType *VecTy, unsigned Index,
1128 TTIImpl->getExtractWithExtendCost(Opcode, Dst, VecTy, Index, CostKind);
1129 assert(Cost >= 0 && "TTI should not produce negative costs!");
1130 return Cost;
1131}
1132
1134 unsigned Opcode, TTI::TargetCostKind CostKind, const Instruction *I) const {
1135 assert((I == nullptr || I->getOpcode() == Opcode) &&
1136 "Opcode should reflect passed instruction.");
1137 InstructionCost Cost = TTIImpl->getCFInstrCost(Opcode, CostKind, I);
1138 assert(Cost >= 0 && "TTI should not produce negative costs!");
1139 return Cost;
1140}
1141
1143 unsigned Opcode, Type *ValTy, Type *CondTy, CmpInst::Predicate VecPred,
1145 OperandValueInfo Op2Info, const Instruction *I) const {
1146 assert((I == nullptr || I->getOpcode() == Opcode) &&
1147 "Opcode should reflect passed instruction.");
1148 InstructionCost Cost = TTIImpl->getCmpSelInstrCost(
1149 Opcode, ValTy, CondTy, VecPred, CostKind, Op1Info, Op2Info, I);
1150 assert(Cost >= 0 && "TTI should not produce negative costs!");
1151 return Cost;
1152}
1153
1155 unsigned Opcode, Type *Val, TTI::TargetCostKind CostKind, unsigned Index,
1156 const Value *Op0, const Value *Op1, TTI::VectorInstrContext VIC) const {
1157 assert((Opcode == Instruction::InsertElement ||
1158 Opcode == Instruction::ExtractElement) &&
1159 "Expecting Opcode to be insertelement/extractelement.");
1161 TTIImpl->getVectorInstrCost(Opcode, Val, CostKind, Index, Op0, Op1, VIC);
1162 assert(Cost >= 0 && "TTI should not produce negative costs!");
1163 return Cost;
1164}
1165
1167 unsigned Opcode, Type *Val, TTI::TargetCostKind CostKind, unsigned Index,
1168 Value *Scalar, ArrayRef<std::tuple<Value *, User *, int>> ScalarUserAndIdx,
1169 TTI::VectorInstrContext VIC) const {
1170 assert((Opcode == Instruction::InsertElement ||
1171 Opcode == Instruction::ExtractElement) &&
1172 "Expecting Opcode to be insertelement/extractelement.");
1173 InstructionCost Cost = TTIImpl->getVectorInstrCost(
1174 Opcode, Val, CostKind, Index, Scalar, ScalarUserAndIdx, VIC);
1175 assert(Cost >= 0 && "TTI should not produce negative costs!");
1176 return Cost;
1177}
1178
1181 unsigned Index, TTI::VectorInstrContext VIC) const {
1182 // FIXME: Assert that Opcode is either InsertElement or ExtractElement.
1183 // This is mentioned in the interface description and respected by all
1184 // callers, but never asserted upon.
1186 TTIImpl->getVectorInstrCost(I, Val, CostKind, Index, VIC);
1187 assert(Cost >= 0 && "TTI should not produce negative costs!");
1188 return Cost;
1189}
1190
1192 unsigned Opcode, Type *Val, TTI::TargetCostKind CostKind,
1193 unsigned Index) const {
1195 TTIImpl->getIndexedVectorInstrCostFromEnd(Opcode, Val, CostKind, Index);
1196 assert(Cost >= 0 && "TTI should not produce negative costs!");
1197 return Cost;
1198}
1199
1201 unsigned Opcode, TTI::TargetCostKind CostKind) const {
1202 assert((Opcode == Instruction::InsertValue ||
1203 Opcode == Instruction::ExtractValue) &&
1204 "Expecting Opcode to be insertvalue/extractvalue.");
1205 InstructionCost Cost = TTIImpl->getInsertExtractValueCost(Opcode, CostKind);
1206 assert(Cost >= 0 && "TTI should not produce negative costs!");
1207 return Cost;
1208}
1209
1211 Type *EltTy, int ReplicationFactor, int VF, const APInt &DemandedDstElts,
1213 InstructionCost Cost = TTIImpl->getReplicationShuffleCost(
1214 EltTy, ReplicationFactor, VF, DemandedDstElts, CostKind);
1215 assert(Cost >= 0 && "TTI should not produce negative costs!");
1216 return Cost;
1217}
1218
1220 unsigned Opcode, Type *Src, Align Alignment, unsigned AddressSpace,
1222 const Instruction *I) const {
1223 assert((I == nullptr || I->getOpcode() == Opcode) &&
1224 "Opcode should reflect passed instruction.");
1225 InstructionCost Cost = TTIImpl->getMemoryOpCost(
1226 Opcode, Src, Alignment, AddressSpace, CostKind, OpInfo, I);
1227 assert(Cost >= 0 && "TTI should not produce negative costs!");
1228 return Cost;
1229}
1230
1232 unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef<unsigned> Indices,
1233 Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind,
1234 bool UseMaskForCond, bool UseMaskForGaps) const {
1235 InstructionCost Cost = TTIImpl->getInterleavedMemoryOpCost(
1236 Opcode, VecTy, Factor, Indices, Alignment, AddressSpace, CostKind,
1237 UseMaskForCond, UseMaskForGaps);
1238 assert(Cost >= 0 && "TTI should not produce negative costs!");
1239 return Cost;
1240}
1241
1245 InstructionCost Cost = TTIImpl->getIntrinsicInstrCost(ICA, CostKind);
1246 assert(Cost >= 0 && "TTI should not produce negative costs!");
1247 return Cost;
1248}
1249
1251 const MemIntrinsicCostAttributes &MICA,
1253 InstructionCost Cost = TTIImpl->getMemIntrinsicInstrCost(MICA, CostKind);
1254 assert(Cost >= 0 && "TTI should not produce negative costs!");
1255 return Cost;
1256}
1257
1260 ArrayRef<Type *> Tys,
1262 InstructionCost Cost = TTIImpl->getCallInstrCost(F, RetTy, Tys, CostKind);
1263 assert(Cost >= 0 && "TTI should not produce negative costs!");
1264 return Cost;
1265}
1266
1268 return TTIImpl->getNumberOfParts(Tp);
1269}
1270
1272 Type *PtrTy, ScalarEvolution *SE, const SCEV *Ptr,
1275 TTIImpl->getAddressComputationCost(PtrTy, SE, Ptr, CostKind);
1276 assert(Cost >= 0 && "TTI should not produce negative costs!");
1277 return Cost;
1278}
1279
1281 InstructionCost Cost = TTIImpl->getMemcpyCost(I);
1282 assert(Cost >= 0 && "TTI should not produce negative costs!");
1283 return Cost;
1284}
1285
1287 return TTIImpl->getMaxMemIntrinsicInlineSizeThreshold();
1288}
1289
1291 unsigned Opcode, VectorType *Ty, std::optional<FastMathFlags> FMF,
1294 TTIImpl->getArithmeticReductionCost(Opcode, Ty, FMF, CostKind);
1295 assert(Cost >= 0 && "TTI should not produce negative costs!");
1296 return Cost;
1297}
1298
1303 TTIImpl->getMinMaxReductionCost(IID, Ty, FMF, CostKind);
1304 assert(Cost >= 0 && "TTI should not produce negative costs!");
1305 return Cost;
1306}
1307
1309 unsigned Opcode, bool IsUnsigned, Type *ResTy, VectorType *Ty,
1310 std::optional<FastMathFlags> FMF, TTI::TargetCostKind CostKind) const {
1311 return TTIImpl->getExtendedReductionCost(Opcode, IsUnsigned, ResTy, Ty, FMF,
1312 CostKind);
1313}
1314
1316 bool IsUnsigned, unsigned RedOpcode, Type *ResTy, VectorType *Ty,
1318 return TTIImpl->getMulAccReductionCost(IsUnsigned, RedOpcode, ResTy, Ty,
1319 CostKind);
1320}
1321
1324 return TTIImpl->getCostOfKeepingLiveOverCall(Tys);
1325}
1326
1328 MemIntrinsicInfo &Info) const {
1329 return TTIImpl->getTgtMemIntrinsic(Inst, Info);
1330}
1331
1333 return TTIImpl->getAtomicMemIntrinsicMaxElementSize();
1334}
1335
1337 IntrinsicInst *Inst, Type *ExpectedType, bool CanCreate) const {
1338 return TTIImpl->getOrCreateResultFromMemIntrinsic(Inst, ExpectedType,
1339 CanCreate);
1340}
1341
1343 LLVMContext &Context, Value *Length, unsigned SrcAddrSpace,
1344 unsigned DestAddrSpace, Align SrcAlign, Align DestAlign,
1345 std::optional<uint32_t> AtomicElementSize) const {
1346 return TTIImpl->getMemcpyLoopLoweringType(Context, Length, SrcAddrSpace,
1347 DestAddrSpace, SrcAlign, DestAlign,
1348 AtomicElementSize);
1349}
1350
1352 SmallVectorImpl<Type *> &OpsOut, LLVMContext &Context,
1353 unsigned RemainingBytes, unsigned SrcAddrSpace, unsigned DestAddrSpace,
1354 Align SrcAlign, Align DestAlign,
1355 std::optional<uint32_t> AtomicCpySize) const {
1356 TTIImpl->getMemcpyLoopResidualLoweringType(
1357 OpsOut, Context, RemainingBytes, SrcAddrSpace, DestAddrSpace, SrcAlign,
1358 DestAlign, AtomicCpySize);
1359}
1360
1362 const Function *Callee) const {
1363 return TTIImpl->areInlineCompatible(Caller, Callee);
1364}
1365
1366unsigned
1368 const CallBase &Call,
1369 unsigned DefaultCallPenalty) const {
1370 return TTIImpl->getInlineCallPenalty(F, Call, DefaultCallPenalty);
1371}
1372
1374 const Function *Caller, const Attribute &Attr) const {
1375 return TTIImpl->shouldCopyAttributeWhenOutliningFrom(Caller, Attr);
1376}
1378 const Function *Callee,
1379 ArrayRef<Type *> Types) const {
1380 return TTIImpl->areTypesABICompatible(Caller, Callee, Types);
1381}
1382
1384 Type *Ty) const {
1385 return TTIImpl->isIndexedLoadLegal(Mode, Ty);
1386}
1387
1389 Type *Ty) const {
1390 return TTIImpl->isIndexedStoreLegal(Mode, Ty);
1391}
1392
1394 return TTIImpl->getLoadStoreVecRegBitWidth(AS);
1395}
1396
1398 return TTIImpl->isLegalToVectorizeLoad(LI);
1399}
1400
1402 return TTIImpl->isLegalToVectorizeStore(SI);
1403}
1404
1406 unsigned ChainSizeInBytes, Align Alignment, unsigned AddrSpace) const {
1407 return TTIImpl->isLegalToVectorizeLoadChain(ChainSizeInBytes, Alignment,
1408 AddrSpace);
1409}
1410
1412 unsigned ChainSizeInBytes, Align Alignment, unsigned AddrSpace) const {
1413 return TTIImpl->isLegalToVectorizeStoreChain(ChainSizeInBytes, Alignment,
1414 AddrSpace);
1415}
1416
1418 const RecurrenceDescriptor &RdxDesc, ElementCount VF) const {
1419 return TTIImpl->isLegalToVectorizeReduction(RdxDesc, VF);
1420}
1421
1423 return TTIImpl->isElementTypeLegalForScalableVector(Ty);
1424}
1425
1427 unsigned LoadSize,
1428 unsigned ChainSizeInBytes,
1429 VectorType *VecTy) const {
1430 return TTIImpl->getLoadVectorFactor(VF, LoadSize, ChainSizeInBytes, VecTy);
1431}
1432
1434 unsigned StoreSize,
1435 unsigned ChainSizeInBytes,
1436 VectorType *VecTy) const {
1437 return TTIImpl->getStoreVectorFactor(VF, StoreSize, ChainSizeInBytes, VecTy);
1438}
1439
1441 bool IsEpilogue) const {
1442 return TTIImpl->preferFixedOverScalableIfEqualCost(IsEpilogue);
1443}
1444
1446 Type *Ty) const {
1447 return TTIImpl->preferInLoopReduction(Kind, Ty);
1448}
1449
1451 return TTIImpl->preferAlternateOpcodeVectorization();
1452}
1453
1455 return TTIImpl->preferPredicatedReductionSelect();
1456}
1457
1459 ElementCount Iters) const {
1460 return TTIImpl->preferEpilogueVectorization(Iters);
1461}
1462
1464 return TTIImpl->shouldConsiderVectorizationRegPressure();
1465}
1466
1469 return TTIImpl->getVPLegalizationStrategy(VPI);
1470}
1471
1473 return TTIImpl->hasArmWideBranch(Thumb);
1474}
1475
1477 return TTIImpl->getFeatureMask(F);
1478}
1479
1481 return TTIImpl->getPriorityMask(F);
1482}
1483
1485 return TTIImpl->isMultiversionedFunction(F);
1486}
1487
1489 return TTIImpl->getMaxNumArgs();
1490}
1491
1493 return TTIImpl->shouldExpandReduction(II);
1494}
1495
1498 const IntrinsicInst *II) const {
1499 return TTIImpl->getPreferredExpandedReductionShuffle(II);
1500}
1501
1503 return TTIImpl->getGISelRematGlobalCost();
1504}
1505
1507 return TTIImpl->getMinTripCountTailFoldingThreshold();
1508}
1509
1511 return TTIImpl->supportsScalableVectors();
1512}
1513
1515 return TTIImpl->enableScalableVectorization();
1516}
1517
1519 return TTIImpl->hasActiveVectorLength();
1520}
1521
1523 Instruction *I, SmallVectorImpl<Use *> &OpsToSink) const {
1524 return TTIImpl->isProfitableToSinkOperands(I, OpsToSink);
1525}
1526
1528 return TTIImpl->isVectorShiftByScalarCheap(Ty);
1529}
1530
1531unsigned
1533 Type *ArrayType) const {
1534 return TTIImpl->getNumBytesToPadGlobalArray(Size, ArrayType);
1535}
1536
1538 const Function &F,
1539 SmallVectorImpl<std::pair<StringRef, int64_t>> &LB) const {
1540 return TTIImpl->collectKernelLaunchBounds(F, LB);
1541}
1542
1544 return TTIImpl->allowVectorElementIndexingUsingGEP();
1545}
1546
1548
1549TargetIRAnalysis::TargetIRAnalysis() : TTICallback(&getDefaultTTI) {}
1550
1552 std::function<Result(const Function &)> TTICallback)
1553 : TTICallback(std::move(TTICallback)) {}
1554
1557 assert(!F.isIntrinsic() && "Should not request TTI for intrinsics");
1558 return TTICallback(F);
1559}
1560
1561AnalysisKey TargetIRAnalysis::Key;
1562
1563TargetIRAnalysis::Result TargetIRAnalysis::getDefaultTTI(const Function &F) {
1564 return Result(F.getDataLayout());
1565}
1566
1567// Register the basic pass.
1569 "Target Transform Information", false, true)
1571
1572void TargetTransformInfoWrapperPass::anchor() {}
1573
1576
1580
1582 FunctionAnalysisManager DummyFAM;
1583 TTI = TIRA.run(F, DummyFAM);
1584 return *TTI;
1585}
1586
for(const MachineOperand &MO :llvm::drop_begin(OldMI.operands(), Desc.getNumOperands()))
assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
static cl::opt< OutputCostKind > CostKind("cost-kind", cl::desc("Target cost kind"), cl::init(OutputCostKind::RecipThroughput), cl::values(clEnumValN(OutputCostKind::RecipThroughput, "throughput", "Reciprocal throughput"), clEnumValN(OutputCostKind::Latency, "latency", "Instruction latency"), clEnumValN(OutputCostKind::CodeSize, "code-size", "Code size"), clEnumValN(OutputCostKind::SizeAndLatency, "size-latency", "Code size and latency"), clEnumValN(OutputCostKind::All, "all", "Print all cost kinds")))
static cl::opt< bool > ForceNestedLoop("force-nested-hardware-loop", cl::Hidden, cl::init(false), cl::desc("Force allowance of nested hardware loops"))
static cl::opt< bool > ForceHardwareLoopPHI("force-hardware-loop-phi", cl::Hidden, cl::init(false), cl::desc("Force hardware loop counter to be updated through a phi"))
This file provides various utilities for inspecting and working with the control flow graph in LLVM I...
Module.h This file contains the declarations for the Module class.
#define F(x, y, z)
Definition MD5.cpp:54
#define I(x, y, z)
Definition MD5.cpp:57
uint64_t IntrinsicInst * II
if(PassOpts->AAPipeline)
#define INITIALIZE_PASS(passName, arg, name, cfg, analysis)
Definition PassSupport.h:56
This file defines the SmallVector class.
static TableGen::Emitter::Opt Y("gen-skeleton-entry", EmitSkeleton, "Generate example skeleton entry")
static TableGen::Emitter::OptClass< SkeletonEmitter > X("gen-skeleton-class", "Generate example skeleton class")
static SymbolRef::Type getType(const Symbol *Sym)
Definition TapiFile.cpp:39
This file provides helpers for the implementation of a TargetTransformInfo-conforming class.
static cl::opt< unsigned > PredictableBranchThreshold("predictable-branch-threshold", cl::init(99), cl::Hidden, cl::desc("Use this to override the target's predictable branch threshold (%)."))
static cl::opt< bool > EnableReduxCost("costmodel-reduxcost", cl::init(false), cl::Hidden, cl::desc("Recognize reduction patterns."))
static cl::opt< unsigned > MinPageSize("min-page-size", cl::init(0), cl::Hidden, cl::desc("Use this to override the target's minimum page size."))
static cl::opt< unsigned > CacheLineSize("cache-line-size", cl::init(0), cl::Hidden, cl::desc("Use this to override the target cache line size when " "specified by the user."))
This pass exposes codegen information to IR-level passes.
Class for arbitrary precision integers.
Definition APInt.h:78
an instruction to allocate memory on the stack
This class represents an incoming formal argument to a Function.
Definition Argument.h:32
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
Definition ArrayRef.h:40
iterator end() const
Definition ArrayRef.h:131
iterator begin() const
Definition ArrayRef.h:130
Class to represent array types.
A cache of @llvm.assume calls within a function.
Functions, function parameters, and return types can have attributes to indicate how they should be t...
Definition Attributes.h:105
LLVM Basic Block Representation.
Definition BasicBlock.h:62
BlockFrequencyInfo pass uses BlockFrequencyInfoImpl implementation to estimate IR basic block frequen...
Conditional or Unconditional Branch instruction.
Base class for all callable instructions (InvokeInst and CallInst) Holds everything related to callin...
Function * getCalledFunction() const
Returns the function called, or null if this is an indirect function invocation or the function signa...
User::op_iterator arg_begin()
Return the iterator pointing to the beginning of the argument list.
User::op_iterator arg_end()
Return the iterator pointing to the end of the argument list.
Predicate
This enumeration lists the possible predicates for CmpInst subclasses.
Definition InstrTypes.h:676
This is an important base class in LLVM.
Definition Constant.h:43
A parsed version of the target data layout string in and methods for querying it.
Definition DataLayout.h:64
Concrete subclass of DominatorTreeBase that is used to compute a normal dominator tree.
Definition Dominators.h:164
LLVM_ABI bool dominates(const BasicBlock *BB, const Use &U) const
Return true if the (end of the) basic block BB dominates the use U.
Convenience struct for specifying and reasoning about fast-math flags.
Definition FMF.h:23
Class to represent function types.
FunctionType * getFunctionType() const
Returns the FunctionType for me.
Definition Function.h:211
ImmutablePass class - This class is used to provide information that does not need to be run.
Definition Pass.h:285
ImmutablePass(char &pid)
Definition Pass.h:287
The core instruction combiner logic.
LLVM_ABI IntrinsicCostAttributes(Intrinsic::ID Id, const CallBase &CI, InstructionCost ScalarCost=InstructionCost::getInvalid(), bool TypeBasedOnly=false)
A wrapper class for inspecting calls to intrinsic functions.
This is an important class for using LLVM in a threaded context.
Definition LLVMContext.h:68
An instruction for reading from memory.
Wrapper class to LoopBlocksDFS that provides a standard begin()/end() interface for the DFS reverse p...
void perform(const LoopInfo *LI)
Traverse the loop blocks and store the DFS result.
LoopT * getLoopFor(const BlockT *BB) const
Return the inner most loop that BB lives in.
Represents a single loop in the control flow graph.
Definition LoopInfo.h:40
Information for memory intrinsic cost model.
The optimization diagnostic interface.
Analysis providing profile information.
The RecurrenceDescriptor is used to identify recurrences variables in a loop.
This class represents a constant integer value.
This class represents an analyzed expression in the program.
The main scalar evolution driver.
LLVM_ABI uint64_t getTypeSizeInBits(Type *Ty) const
Return the size in bits of the specified type, for which isSCEVable must return true.
LLVM_ABI bool isLoopInvariant(const SCEV *S, const Loop *L)
Return true if the value of the given SCEV is unchanging in the specified loop.
LLVM_ABI const SCEV * getExitCount(const Loop *L, const BasicBlock *ExitingBlock, ExitCountKind Kind=Exact)
Return the number of times the backedge executes before the given exit would be taken; if not exactly...
This is a 'bitvector' (really, a variable-sized bit array), optimized for the case when the array is ...
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
StackOffset holds a fixed and a scalable offset in bytes.
Definition TypeSize.h:30
An instruction for storing to memory.
Multiway switch.
Analysis pass providing the TargetTransformInfo.
LLVM_ABI Result run(const Function &F, FunctionAnalysisManager &)
LLVM_ABI TargetIRAnalysis()
Default construct a target IR analysis.
Provides information about what library functions are available for the current target.
bool getLibFunc(StringRef funcName, LibFunc &F) const
Searches for a particular function name.
StringRef getName(LibFunc F) const
bool isFunctionVectorizable(StringRef F, const ElementCount &VF) const
CRTP base class for use as a mix-in that aids implementing a TargetTransformInfo-compatible class.
Wrapper pass for TargetTransformInfo.
TargetTransformInfoWrapperPass()
We must provide a default constructor for the pass but it should never be used.
TargetTransformInfo & getTTI(const Function &F)
This pass provides access to the codegen interfaces that are needed for IR-level transformations.
LLVM_ABI bool getTgtMemIntrinsic(IntrinsicInst *Inst, MemIntrinsicInfo &Info) const
LLVM_ABI Value * getOrCreateResultFromMemIntrinsic(IntrinsicInst *Inst, Type *ExpectedType, bool CanCreate=true) const
LLVM_ABI bool isLegalToVectorizeLoad(LoadInst *LI) const
LLVM_ABI std::optional< unsigned > getVScaleForTuning() const
static LLVM_ABI CastContextHint getCastContextHint(const Instruction *I)
Calculates a CastContextHint from I.
LLVM_ABI unsigned getMaxNumArgs() const
LLVM_ABI bool addrspacesMayAlias(unsigned AS0, unsigned AS1) const
Return false if a AS0 address cannot possibly alias a AS1 address.
LLVM_ABI bool isLegalMaskedScatter(Type *DataType, Align Alignment) const
Return true if the target supports masked scatter.
LLVM_ABI bool shouldBuildLookupTables() const
Return true if switches should be turned into lookup tables for the target.
LLVM_ABI bool isLegalToVectorizeStore(StoreInst *SI) const
LLVM_ABI InstructionCost getMulAccReductionCost(bool IsUnsigned, unsigned RedOpcode, Type *ResTy, VectorType *Ty, TTI::TargetCostKind CostKind=TTI::TCK_RecipThroughput) const
Calculate the cost of an extended reduction pattern, similar to getArithmeticReductionCost of an Add/...
LLVM_ABI bool areTypesABICompatible(const Function *Caller, const Function *Callee, ArrayRef< Type * > Types) const
LLVM_ABI bool enableAggressiveInterleaving(bool LoopHasReductions) const
Don't restrict interleaved unrolling to small loops.
LLVM_ABI bool isMultiversionedFunction(const Function &F) const
Returns true if this is an instance of a function with multiple versions.
LLVM_ABI InstructionUniformity getInstructionUniformity(const Value *V) const
Get target-specific uniformity information for an instruction.
LLVM_ABI bool isFCmpOrdCheaperThanFCmpZero(Type *Ty) const
Return true if it is faster to check if a floating-point value is NaN (or not-NaN) versus a compariso...
LLVM_ABI bool isLegalMaskedStore(Type *DataType, Align Alignment, unsigned AddressSpace, MaskKind MaskKind=VariableOrConstantMask) const
Return true if the target supports masked store.
LLVM_ABI bool supportsEfficientVectorElementLoadStore() const
If target has efficient vector element load/store instructions, it can return true here so that inser...
LLVM_ABI unsigned getAssumedAddrSpace(const Value *V) const
LLVM_ABI bool preferAlternateOpcodeVectorization() const
LLVM_ABI bool shouldDropLSRSolutionIfLessProfitable() const
Return true if LSR should drop a found solution if it's calculated to be less profitable than the bas...
LLVM_ABI bool isLSRCostLess(const TargetTransformInfo::LSRCost &C1, const TargetTransformInfo::LSRCost &C2) const
Return true if LSR cost of C1 is lower than C2.
VectorInstrContext
Represents a hint about the context in which an insert/extract is used.
@ None
The insert/extract is not used with a load/store.
@ Load
The value being inserted comes from a load (InsertElement only).
@ Store
The extracted value is stored (ExtractElement only).
LLVM_ABI unsigned getPrefetchDistance() const
LLVM_ABI Type * getMemcpyLoopLoweringType(LLVMContext &Context, Value *Length, unsigned SrcAddrSpace, unsigned DestAddrSpace, Align SrcAlign, Align DestAlign, std::optional< uint32_t > AtomicElementSize=std::nullopt) const
LLVM_ABI bool isLegalMaskedExpandLoad(Type *DataType, Align Alignment) const
Return true if the target supports masked expand load.
LLVM_ABI bool prefersVectorizedAddressing() const
Return true if target doesn't mind addresses in vectors.
LLVM_ABI InstructionCost getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy, CmpInst::Predicate VecPred, TTI::TargetCostKind CostKind=TTI::TCK_RecipThroughput, OperandValueInfo Op1Info={OK_AnyValue, OP_None}, OperandValueInfo Op2Info={OK_AnyValue, OP_None}, const Instruction *I=nullptr) const
LLVM_ABI bool hasBranchDivergence(const Function *F=nullptr) const
Return true if branch divergence exists.
LLVM_ABI bool preferEpilogueVectorization(ElementCount Iters) const
Return true if the loop vectorizer should consider vectorizing an otherwise scalar epilogue loop if t...
LLVM_ABI MemCmpExpansionOptions enableMemCmpExpansion(bool OptSize, bool IsZeroCmp) const
LLVM_ABI void getUnrollingPreferences(Loop *L, ScalarEvolution &, UnrollingPreferences &UP, OptimizationRemarkEmitter *ORE) const
Get target-customized preferences for the generic loop unrolling transformation.
LLVM_ABI bool shouldBuildLookupTablesForConstant(Constant *C) const
Return true if switches should be turned into lookup tables containing this constant value for the ta...
LLVM_ABI TailFoldingStyle getPreferredTailFoldingStyle() const
Query the target what the preferred style of tail folding is.
LLVM_ABI bool supportsTailCallFor(const CallBase *CB) const
If target supports tail call on CB.
LLVM_ABI std::optional< Instruction * > instCombineIntrinsic(InstCombiner &IC, IntrinsicInst &II) const
Targets can implement their own combinations for target-specific intrinsics.
LLVM_ABI bool isProfitableLSRChainElement(Instruction *I) const
LLVM_ABI TypeSize getRegisterBitWidth(RegisterKind K) const
MaskKind
Some targets only support masked load/store with a constant mask.
LLVM_ABI unsigned getInlineCallPenalty(const Function *F, const CallBase &Call, unsigned DefaultCallPenalty) const
Returns a penalty for invoking call Call in F.
LLVM_ABI InstructionCost getOperandsScalarizationOverhead(ArrayRef< Type * > Tys, TTI::TargetCostKind CostKind, TTI::VectorInstrContext VIC=TTI::VectorInstrContext::None) const
Estimate the overhead of scalarizing operands with the given types.
LLVM_ABI bool hasActiveVectorLength() const
LLVM_ABI bool isExpensiveToSpeculativelyExecute(const Instruction *I) const
Return true if the cost of the instruction is too high to speculatively execute and should be kept be...
LLVM_ABI bool preferFixedOverScalableIfEqualCost(bool IsEpilogue) const
LLVM_ABI bool isLegalMaskedGather(Type *DataType, Align Alignment) const
Return true if the target supports masked gather.
static LLVM_ABI OperandValueInfo commonOperandInfo(const Value *X, const Value *Y)
Collect common data between two OperandValueInfo inputs.
LLVM_ABI InstructionCost getMemoryOpCost(unsigned Opcode, Type *Src, Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind=TTI::TCK_RecipThroughput, OperandValueInfo OpdInfo={OK_AnyValue, OP_None}, const Instruction *I=nullptr) const
LLVM_ABI std::optional< unsigned > getMaxVScale() const
LLVM_ABI InstructionCost getReplicationShuffleCost(Type *EltTy, int ReplicationFactor, int VF, const APInt &DemandedDstElts, TTI::TargetCostKind CostKind) const
LLVM_ABI bool allowVectorElementIndexingUsingGEP() const
Returns true if GEP should not be used to index into vectors for this target.
LLVM_ABI InstructionCost getInterleavedMemoryOpCost(unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef< unsigned > Indices, Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind=TTI::TCK_RecipThroughput, bool UseMaskForCond=false, bool UseMaskForGaps=false) const
LLVM_ABI bool isSingleThreaded() const
LLVM_ABI std::optional< Value * > simplifyDemandedVectorEltsIntrinsic(InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts, APInt &UndefElts2, APInt &UndefElts3, std::function< void(Instruction *, unsigned, APInt, APInt &)> SimplifyAndSetOp) const
Can be used to implement target-specific instruction combining.
LLVM_ABI bool enableOrderedReductions() const
Return true if we should be enabling ordered reductions for the target.
LLVM_ABI unsigned getInliningCostBenefitAnalysisProfitableMultiplier() const
LLVM_ABI InstructionCost getShuffleCost(ShuffleKind Kind, VectorType *DstTy, VectorType *SrcTy, ArrayRef< int > Mask={}, TTI::TargetCostKind CostKind=TTI::TCK_RecipThroughput, int Index=0, VectorType *SubTp=nullptr, ArrayRef< const Value * > Args={}, const Instruction *CxtI=nullptr) const
LLVM_ABI InstructionCost getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA, TTI::TargetCostKind CostKind) const
LLVM_ABI InstructionCost getArithmeticReductionCost(unsigned Opcode, VectorType *Ty, std::optional< FastMathFlags > FMF, TTI::TargetCostKind CostKind=TTI::TCK_RecipThroughput) const
Calculate the cost of vector reduction intrinsics.
LLVM_ABI unsigned getAtomicMemIntrinsicMaxElementSize() const
LLVM_ABI InstructionCost getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src, TTI::CastContextHint CCH, TTI::TargetCostKind CostKind=TTI::TCK_SizeAndLatency, const Instruction *I=nullptr) const
LLVM_ABI InstructionCost getVectorInstrCost(unsigned Opcode, Type *Val, TTI::TargetCostKind CostKind, unsigned Index=-1, const Value *Op0=nullptr, const Value *Op1=nullptr, TTI::VectorInstrContext VIC=TTI::VectorInstrContext::None) const
LLVM_ABI std::pair< KnownBits, KnownBits > computeKnownBitsAddrSpaceCast(unsigned ToAS, const Value &PtrOp) const
LLVM_ABI bool LSRWithInstrQueries() const
Return true if the loop strength reduce pass should make Instruction* based TTI queries to isLegalAdd...
LLVM_ABI unsigned getStoreVectorFactor(unsigned VF, unsigned StoreSize, unsigned ChainSizeInBytes, VectorType *VecTy) const
LLVM_ABI VPLegalization getVPLegalizationStrategy(const VPIntrinsic &PI) const
static LLVM_ABI PartialReductionExtendKind getPartialReductionExtendKind(Instruction *I)
Get the kind of extension that an instruction represents.
LLVM_ABI bool shouldConsiderVectorizationRegPressure() const
LLVM_ABI bool enableWritePrefetching() const
LLVM_ABI bool shouldTreatInstructionLikeSelect(const Instruction *I) const
Should the Select Optimization pass treat the given instruction like a select, potentially converting...
LLVM_ABI bool isNoopAddrSpaceCast(unsigned FromAS, unsigned ToAS) const
LLVM_ABI bool shouldMaximizeVectorBandwidth(TargetTransformInfo::RegisterKind K) const
LLVM_ABI InstructionCost getGEPCost(Type *PointeeType, const Value *Ptr, ArrayRef< const Value * > Operands, Type *AccessType=nullptr, TargetCostKind CostKind=TCK_SizeAndLatency) const
Estimate the cost of a GEP operation when lowered.
LLVM_ABI bool isLegalToVectorizeStoreChain(unsigned ChainSizeInBytes, Align Alignment, unsigned AddrSpace) const
LLVM_ABI bool isLegalInterleavedAccessType(VectorType *VTy, unsigned Factor, Align Alignment, unsigned AddrSpace) const
Return true is the target supports interleaved access for the given vector type VTy,...
LLVM_ABI unsigned getRegUsageForType(Type *Ty) const
Returns the estimated number of registers required to represent Ty.
LLVM_ABI bool isLegalBroadcastLoad(Type *ElementTy, ElementCount NumElements) const
\Returns true if the target supports broadcasting a load to a vector of type <NumElements x ElementTy...
LLVM_ABI bool isIndexedStoreLegal(enum MemIndexedMode Mode, Type *Ty) const
LLVM_ABI std::pair< const Value *, unsigned > getPredicatedAddrSpace(const Value *V) const
LLVM_ABI InstructionCost getExtendedReductionCost(unsigned Opcode, bool IsUnsigned, Type *ResTy, VectorType *Ty, std::optional< FastMathFlags > FMF, TTI::TargetCostKind CostKind=TTI::TCK_RecipThroughput) const
Calculate the cost of an extended reduction pattern, similar to getArithmeticReductionCost of a reduc...
LLVM_ABI unsigned getLoadStoreVecRegBitWidth(unsigned AddrSpace) const
LLVM_ABI ReductionShuffle getPreferredExpandedReductionShuffle(const IntrinsicInst *II) const
static LLVM_ABI OperandValueInfo getOperandInfo(const Value *V)
Collect properties of V used in cost analysis, e.g. OP_PowerOf2.
LLVM_ABI unsigned getRegisterClassForType(bool Vector, Type *Ty=nullptr) const
LLVM_ABI bool isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset, bool HasBaseReg, int64_t Scale, unsigned AddrSpace=0, Instruction *I=nullptr, int64_t ScalableOffset=0) const
Return true if the addressing mode represented by AM is legal for this target, for a load/store of th...
LLVM_ABI PopcntSupportKind getPopcntSupport(unsigned IntTyWidthInBit) const
Return hardware support for population count.
LLVM_ABI unsigned getEstimatedNumberOfCaseClusters(const SwitchInst &SI, unsigned &JTSize, ProfileSummaryInfo *PSI, BlockFrequencyInfo *BFI) const
LLVM_ABI bool isElementTypeLegalForScalableVector(Type *Ty) const
LLVM_ABI bool forceScalarizeMaskedGather(VectorType *Type, Align Alignment) const
Return true if the target forces scalarizing of llvm.masked.gather intrinsics.
LLVM_ABI unsigned getMaxPrefetchIterationsAhead() const
LLVM_ABI bool canHaveNonUndefGlobalInitializerInAddressSpace(unsigned AS) const
Return true if globals in this address space can have initializers other than undef.
LLVM_ABI ElementCount getMinimumVF(unsigned ElemWidth, bool IsScalable) const
LLVM_ABI InstructionCost getIntImmCostIntrin(Intrinsic::ID IID, unsigned Idx, const APInt &Imm, Type *Ty, TargetCostKind CostKind) const
LLVM_ABI bool enableMaskedInterleavedAccessVectorization() const
Enable matching of interleaved access groups that contain predicated accesses or gaps and therefore v...
LLVM_ABI InstructionCost getIntImmCostInst(unsigned Opc, unsigned Idx, const APInt &Imm, Type *Ty, TargetCostKind CostKind, Instruction *Inst=nullptr) const
Return the expected cost of materialization for the given integer immediate of the specified type for...
LLVM_ABI bool isLegalStridedLoadStore(Type *DataType, Align Alignment) const
Return true if the target supports strided load.
LLVM_ABI TargetTransformInfo & operator=(TargetTransformInfo &&RHS)
LLVM_ABI InstructionCost getMinMaxReductionCost(Intrinsic::ID IID, VectorType *Ty, FastMathFlags FMF=FastMathFlags(), TTI::TargetCostKind CostKind=TTI::TCK_RecipThroughput) const
TargetCostKind
The kind of cost model.
@ TCK_RecipThroughput
Reciprocal throughput.
LLVM_ABI InstructionCost getArithmeticInstrCost(unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind=TTI::TCK_RecipThroughput, TTI::OperandValueInfo Opd1Info={TTI::OK_AnyValue, TTI::OP_None}, TTI::OperandValueInfo Opd2Info={TTI::OK_AnyValue, TTI::OP_None}, ArrayRef< const Value * > Args={}, const Instruction *CxtI=nullptr, const TargetLibraryInfo *TLibInfo=nullptr) const
This is an approximation of reciprocal throughput of a math/logic op.
LLVM_ABI bool enableSelectOptimize() const
Should the Select Optimization pass be enabled and ran.
LLVM_ABI bool collectFlatAddressOperands(SmallVectorImpl< int > &OpIndexes, Intrinsic::ID IID) const
Return any intrinsic address operand indexes which may be rewritten if they use a flat address space ...
OperandValueProperties
Additional properties of an operand's values.
LLVM_ABI int getInliningLastCallToStaticBonus() const
LLVM_ABI InstructionCost getPointersChainCost(ArrayRef< const Value * > Ptrs, const Value *Base, const PointersChainInfo &Info, Type *AccessTy, TargetCostKind CostKind=TTI::TCK_RecipThroughput) const
Estimate the cost of a chain of pointers (typically pointer operands of a chain of loads or stores wi...
LLVM_ABI bool isIndexedLoadLegal(enum MemIndexedMode Mode, Type *Ty) const
LLVM_ABI unsigned getMaximumVF(unsigned ElemWidth, unsigned Opcode) const
LLVM_ABI bool isLegalICmpImmediate(int64_t Imm) const
Return true if the specified immediate is legal icmp immediate, that is the target has icmp instructi...
LLVM_ABI bool isTypeLegal(Type *Ty) const
Return true if this type is legal.
LLVM_ABI bool isLegalToVectorizeReduction(const RecurrenceDescriptor &RdxDesc, ElementCount VF) const
LLVM_ABI std::optional< unsigned > getCacheAssociativity(CacheLevel Level) const
LLVM_ABI bool isLegalNTLoad(Type *DataType, Align Alignment) const
Return true if the target supports nontemporal load.
LLVM_ABI InstructionCost getMemcpyCost(const Instruction *I) const
LLVM_ABI unsigned adjustInliningThreshold(const CallBase *CB) const
LLVM_ABI bool isLegalAddImmediate(int64_t Imm) const
Return true if the specified immediate is legal add immediate, that is the target has add instruction...
LLVM_ABI bool isTargetIntrinsicWithStructReturnOverloadAtField(Intrinsic::ID ID, int RetIdx) const
Identifies if the vector form of the intrinsic that returns a struct is overloaded at the struct elem...
LLVM_ABI unsigned getLoadVectorFactor(unsigned VF, unsigned LoadSize, unsigned ChainSizeInBytes, VectorType *VecTy) const
LLVM_ABI InstructionCost getMemIntrinsicInstrCost(const MemIntrinsicCostAttributes &MICA, TTI::TargetCostKind CostKind) const
LLVM_ABI bool canSaveCmp(Loop *L, BranchInst **BI, ScalarEvolution *SE, LoopInfo *LI, DominatorTree *DT, AssumptionCache *AC, TargetLibraryInfo *LibInfo) const
Return true if the target can save a compare for loop count, for example hardware loop saves a compar...
LLVM_ABI bool isTargetIntrinsicTriviallyScalarizable(Intrinsic::ID ID) const
LLVM_ABI Value * rewriteIntrinsicWithAddressSpace(IntrinsicInst *II, Value *OldV, Value *NewV) const
Rewrite intrinsic call II such that OldV will be replaced with NewV, which has a different address sp...
LLVM_ABI InstructionCost getCostOfKeepingLiveOverCall(ArrayRef< Type * > Tys) const
LLVM_ABI unsigned getMinPrefetchStride(unsigned NumMemAccesses, unsigned NumStridedMemAccesses, unsigned NumPrefetches, bool HasCall) const
Some HW prefetchers can handle accesses up to a certain constant stride.
LLVM_ABI bool shouldPrefetchAddressSpace(unsigned AS) const
LLVM_ABI InstructionCost getIntImmCost(const APInt &Imm, Type *Ty, TargetCostKind CostKind) const
Return the expected cost of materializing for the given integer immediate of the specified type.
LLVM_ABI unsigned getMinVectorRegisterBitWidth() const
LLVM_ABI InstructionCost getAddressComputationCost(Type *PtrTy, ScalarEvolution *SE, const SCEV *Ptr, TTI::TargetCostKind CostKind) const
LLVM_ABI bool isLegalNTStore(Type *DataType, Align Alignment) const
Return true if the target supports nontemporal store.
LLVM_ABI unsigned getFlatAddressSpace() const
Returns the address space ID for a target's 'flat' address space.
LLVM_ABI bool preferToKeepConstantsAttached(const Instruction &Inst, const Function &Fn) const
It can be advantageous to detach complex constants from their uses to make their generation cheaper.
LLVM_ABI bool hasArmWideBranch(bool Thumb) const
LLVM_ABI const char * getRegisterClassName(unsigned ClassID) const
LLVM_ABI bool shouldConsiderAddressTypePromotion(const Instruction &I, bool &AllowPromotionWithoutCommonHeader) const
LLVM_ABI APInt getPriorityMask(const Function &F) const
Returns a bitmask constructed from the target-features or fmv-features metadata of a function corresp...
LLVM_ABI BranchProbability getPredictableBranchThreshold() const
If a branch or a select condition is skewed in one direction by more than this factor,...
LLVM_ABI TargetTransformInfo(std::unique_ptr< const TargetTransformInfoImplBase > Impl)
Construct a TTI object using a type implementing the Concept API below.
LLVM_ABI bool preferInLoopReduction(RecurKind Kind, Type *Ty) const
LLVM_ABI unsigned getCallerAllocaCost(const CallBase *CB, const AllocaInst *AI) const
LLVM_ABI bool hasConditionalLoadStoreForType(Type *Ty, bool IsStore) const
LLVM_ABI unsigned getCacheLineSize() const
LLVM_ABI bool allowsMisalignedMemoryAccesses(LLVMContext &Context, unsigned BitWidth, unsigned AddressSpace=0, Align Alignment=Align(1), unsigned *Fast=nullptr) const
Determine if the target supports unaligned memory accesses.
LLVM_ABI bool shouldCopyAttributeWhenOutliningFrom(const Function *Caller, const Attribute &Attr) const
LLVM_ABI APInt getAddrSpaceCastPreservedPtrMask(unsigned SrcAS, unsigned DstAS) const
Return the preserved ptr bit mask that is safe to cast integer to pointer with new address space.
LLVM_ABI int getInlinerVectorBonusPercent() const
LLVM_ABI unsigned getEpilogueVectorizationMinVF() const
LLVM_ABI void collectKernelLaunchBounds(const Function &F, SmallVectorImpl< std::pair< StringRef, int64_t > > &LB) const
Collect kernel launch bounds for F into LB.
PopcntSupportKind
Flags indicating the kind of support for population count.
LLVM_ABI bool preferPredicatedReductionSelect() const
LLVM_ABI InstructionCost getIntImmCodeSizeCost(unsigned Opc, unsigned Idx, const APInt &Imm, Type *Ty) const
Return the expected cost for the given integer when optimising for size.
LLVM_ABI AddressingModeKind getPreferredAddressingMode(const Loop *L, ScalarEvolution *SE) const
Return the preferred addressing mode LSR should make efforts to generate.
LLVM_ABI bool isLoweredToCall(const Function *F) const
Test whether calls to a function lower to actual program function calls.
LLVM_ABI bool isLegalToVectorizeLoadChain(unsigned ChainSizeInBytes, Align Alignment, unsigned AddrSpace) const
LLVM_ABI bool isHardwareLoopProfitable(Loop *L, ScalarEvolution &SE, AssumptionCache &AC, TargetLibraryInfo *LibInfo, HardwareLoopInfo &HWLoopInfo) const
Query the target whether it would be profitable to convert the given loop into a hardware loop.
LLVM_ABI unsigned getInliningThresholdMultiplier() const
LLVM_ABI InstructionCost getBranchMispredictPenalty() const
Returns estimated penalty of a branch misprediction in latency.
LLVM_ABI unsigned getNumberOfRegisters(unsigned ClassID) const
LLVM_ABI bool isLegalAltInstr(VectorType *VecTy, unsigned Opcode0, unsigned Opcode1, const SmallBitVector &OpcodeMask) const
Return true if this is an alternating opcode pattern that can be lowered to a single instruction on t...
LLVM_ABI bool isProfitableToHoist(Instruction *I) const
Return true if it is profitable to hoist instruction in the then/else to before if.
LLVM_ABI bool supportsScalableVectors() const
LLVM_ABI bool hasVolatileVariant(Instruction *I, unsigned AddrSpace) const
Return true if the given instruction (assumed to be a memory access instruction) has a volatile varia...
LLVM_ABI bool isLegalMaskedCompressStore(Type *DataType, Align Alignment) const
Return true if the target supports masked compress store.
LLVM_ABI std::optional< unsigned > getMinPageSize() const
LLVM_ABI bool isFPVectorizationPotentiallyUnsafe() const
Indicate that it is potentially unsafe to automatically vectorize floating-point operations because t...
LLVM_ABI InstructionCost getInsertExtractValueCost(unsigned Opcode, TTI::TargetCostKind CostKind) const
LLVM_ABI bool shouldBuildRelLookupTables() const
Return true if lookup tables should be turned into relative lookup tables.
LLVM_ABI unsigned getStoreMinimumVF(unsigned VF, Type *ScalarMemTy, Type *ScalarValTy) const
LLVM_ABI std::optional< unsigned > getCacheSize(CacheLevel Level) const
LLVM_ABI std::optional< Value * > simplifyDemandedUseBitsIntrinsic(InstCombiner &IC, IntrinsicInst &II, APInt DemandedMask, KnownBits &Known, bool &KnownBitsComputed) const
Can be used to implement target-specific instruction combining.
LLVM_ABI bool isLegalAddScalableImmediate(int64_t Imm) const
Return true if adding the specified scalable immediate is legal, that is the target has add instructi...
LLVM_ABI bool isTargetIntrinsicWithScalarOpAtArg(Intrinsic::ID ID, unsigned ScalarOpdIdx) const
Identifies if the vector form of the intrinsic has a scalar operand.
LLVM_ABI bool hasDivRemOp(Type *DataType, bool IsSigned) const
Return true if the target has a unified operation to calculate division and remainder.
LLVM_ABI InstructionCost getAltInstrCost(VectorType *VecTy, unsigned Opcode0, unsigned Opcode1, const SmallBitVector &OpcodeMask, TTI::TargetCostKind CostKind=TTI::TCK_RecipThroughput) const
Returns the cost estimation for alternating opcode pattern that can be lowered to a single instructio...
LLVM_ABI bool enableInterleavedAccessVectorization() const
Enable matching of interleaved access groups.
LLVM_ABI unsigned getMinTripCountTailFoldingThreshold() const
LLVM_ABI InstructionCost getPartialReductionCost(unsigned Opcode, Type *InputTypeA, Type *InputTypeB, Type *AccumType, ElementCount VF, PartialReductionExtendKind OpAExtend, PartialReductionExtendKind OpBExtend, std::optional< unsigned > BinOp, TTI::TargetCostKind CostKind, std::optional< FastMathFlags > FMF) const
LLVM_ABI InstructionCost getInstructionCost(const User *U, ArrayRef< const Value * > Operands, TargetCostKind CostKind) const
Estimate the cost of a given IR user when lowered.
LLVM_ABI unsigned getMaxInterleaveFactor(ElementCount VF) const
LLVM_ABI bool enableScalableVectorization() const
LLVM_ABI bool useFastCCForInternalCall(Function &F) const
Return true if the input function is internal, should use fastcc calling convention.
LLVM_ABI bool isVectorShiftByScalarCheap(Type *Ty) const
Return true if it's significantly cheaper to shift a vector by a uniform scalar than by an amount whi...
LLVM_ABI bool isNumRegsMajorCostOfLSR() const
Return true if LSR major cost is number of registers.
LLVM_ABI unsigned getInliningCostBenefitAnalysisSavingsMultiplier() const
LLVM_ABI bool isLegalMaskedVectorHistogram(Type *AddrType, Type *DataType) const
LLVM_ABI unsigned getGISelRematGlobalCost() const
LLVM_ABI unsigned getNumBytesToPadGlobalArray(unsigned Size, Type *ArrayType) const
MemIndexedMode
The type of load/store indexing.
LLVM_ABI bool isLegalMaskedLoad(Type *DataType, Align Alignment, unsigned AddressSpace, MaskKind MaskKind=VariableOrConstantMask) const
Return true if the target supports masked load.
LLVM_ABI InstructionCost getIndexedVectorInstrCostFromEnd(unsigned Opcode, Type *Val, TTI::TargetCostKind CostKind, unsigned Index) const
LLVM_ABI bool areInlineCompatible(const Function *Caller, const Function *Callee) const
LLVM_ABI bool useColdCCForColdCall(Function &F) const
Return true if the input function which is cold at all call sites, should use coldcc calling conventi...
LLVM_ABI InstructionCost getFPOpCost(Type *Ty) const
Return the expected cost of supporting the floating point operation of the specified type.
LLVM_ABI bool supportsTailCalls() const
If the target supports tail calls.
LLVM_ABI bool canMacroFuseCmp() const
Return true if the target can fuse a compare and branch.
LLVM_ABI bool isValidAddrSpaceCast(unsigned FromAS, unsigned ToAS) const
Query the target whether the specified address space cast from FromAS to ToAS is valid.
LLVM_ABI unsigned getNumberOfParts(Type *Tp) const
AddressingModeKind
Which addressing mode Loop Strength Reduction will try to generate.
LLVM_ABI InstructionCost getScalingFactorCost(Type *Ty, GlobalValue *BaseGV, StackOffset BaseOffset, bool HasBaseReg, int64_t Scale, unsigned AddrSpace=0) const
Return the cost of the scaling factor used in the addressing mode represented by AM for this target,...
LLVM_ABI bool isTruncateFree(Type *Ty1, Type *Ty2) const
Return true if it's free to truncate a value of type Ty1 to type Ty2.
LLVM_ABI bool isProfitableToSinkOperands(Instruction *I, SmallVectorImpl< Use * > &Ops) const
Return true if sinking I's operands to the same basic block as I is profitable, e....
LLVM_ABI void getMemcpyLoopResidualLoweringType(SmallVectorImpl< Type * > &OpsOut, LLVMContext &Context, unsigned RemainingBytes, unsigned SrcAddrSpace, unsigned DestAddrSpace, Align SrcAlign, Align DestAlign, std::optional< uint32_t > AtomicCpySize=std::nullopt) const
LLVM_ABI bool preferPredicateOverEpilogue(TailFoldingInfo *TFI) const
Query the target whether it would be prefered to create a predicated vector loop, which can avoid the...
LLVM_ABI bool forceScalarizeMaskedScatter(VectorType *Type, Align Alignment) const
Return true if the target forces scalarizing of llvm.masked.scatter intrinsics.
LLVM_ABI bool isTargetIntrinsicWithOverloadTypeAtArg(Intrinsic::ID ID, int OpdIdx) const
Identifies if the vector form of the intrinsic is overloaded on the type of the operand at index OpdI...
static VectorInstrContext getVectorInstrContextHint(const Instruction *I)
Calculates a VectorInstrContext from I.
LLVM_ABI bool haveFastSqrt(Type *Ty) const
Return true if the hardware has a fast square-root instruction.
LLVM_ABI bool shouldExpandReduction(const IntrinsicInst *II) const
LLVM_ABI InstructionCost getScalarizationOverhead(VectorType *Ty, const APInt &DemandedElts, bool Insert, bool Extract, TTI::TargetCostKind CostKind, bool ForPoisonSrc=true, ArrayRef< Value * > VL={}, TTI::VectorInstrContext VIC=TTI::VectorInstrContext::None) const
Estimate the overhead of scalarizing an instruction.
LLVM_ABI uint64_t getMaxMemIntrinsicInlineSizeThreshold() const
Returns the maximum memset / memcpy size in bytes that still makes it profitable to inline the call.
ShuffleKind
The various kinds of shuffle patterns for vector queries.
LLVM_ABI APInt getFeatureMask(const Function &F) const
Returns a bitmask constructed from the target-features or fmv-features metadata of a function corresp...
LLVM_ABI void getPeelingPreferences(Loop *L, ScalarEvolution &SE, PeelingPreferences &PP) const
Get target-customized preferences for the generic loop peeling transformation.
LLVM_ABI InstructionCost getCallInstrCost(Function *F, Type *RetTy, ArrayRef< Type * > Tys, TTI::TargetCostKind CostKind=TTI::TCK_SizeAndLatency) const
LLVM_ABI InstructionCost getCFInstrCost(unsigned Opcode, TTI::TargetCostKind CostKind=TTI::TCK_SizeAndLatency, const Instruction *I=nullptr) const
CastContextHint
Represents a hint about the context in which a cast is used.
@ Masked
The cast is used with a masked load/store.
@ None
The cast is not used with a load/store of any kind.
@ Normal
The cast is used with a normal load/store.
@ GatherScatter
The cast is used with a gather/scatter.
LLVM_ABI InstructionCost getExtractWithExtendCost(unsigned Opcode, Type *Dst, VectorType *VecTy, unsigned Index, TTI::TargetCostKind CostKind) const
OperandValueKind
Additional information about an operand's possible values.
CacheLevel
The possible cache levels.
The instances of the Type class are immutable: once they are created, they are never changed.
Definition Type.h:45
LLVM_ABI bool isScalableTy(SmallPtrSetImpl< const Type * > &Visited) const
Return true if this is a type whose size is a known multiple of vscale.
Definition Type.cpp:61
static LLVM_ABI IntegerType * getInt32Ty(LLVMContext &C)
Definition Type.cpp:296
Type * getScalarType() const
If this is a vector type, return the element type, otherwise return 'this'.
Definition Type.h:352
This is the common base class for vector predication intrinsics.
LLVM Value Representation.
Definition Value.h:75
Type * getType() const
All values are typed, get the type of this value.
Definition Value.h:256
Base class of all SIMD vector types.
ElementCount getElementCount() const
Return an ElementCount instance to represent the (possibly scalable) number of elements in the vector...
constexpr ScalarTy getKnownMinValue() const
Returns the minimum value this quantity can represent.
Definition TypeSize.h:165
CallInst * Call
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
Definition CallingConv.h:24
@ Fast
Attempts to make calls as fast as possible (e.g.
Definition CallingConv.h:41
@ C
The default llvm calling convention, compatible with C.
Definition CallingConv.h:34
initializer< Ty > init(const Ty &Val)
This is an optimization pass for GlobalISel generic memory operations.
Definition Types.h:26
@ Length
Definition DWP.cpp:532
InstructionCost Cost
decltype(auto) dyn_cast(const From &Val)
dyn_cast<X> - Return the argument parameter cast to the specified type.
Definition Casting.h:643
LLVM_ABI Value * getSplatValue(const Value *V)
Get splat value if the input is a splat vector or return nullptr.
bool containsIrreducibleCFG(RPOTraversalT &RPOTraversal, const LoopInfoT &LI)
Return true if the control flow in RPOTraversal is irreducible.
Definition CFG.h:149
bool isa(const From &Val)
isa<X> - Return true if the parameter to the template is an instance of one of the template type argu...
Definition Casting.h:547
LLVM_ABI ImmutablePass * createTargetTransformInfoWrapperPass(TargetIRAnalysis TIRA)
Create an analysis pass wrapper around a TTI object.
RecurKind
These are the kinds of recurrences that we support.
constexpr unsigned BitWidth
OutputIt move(R &&Range, OutputIt Out)
Provide wrappers to std::move which take ranges instead of having to pass begin/end explicitly.
Definition STLExtras.h:1917
auto predecessors(const MachineBasicBlock *BB)
AnalysisManager< Function > FunctionAnalysisManager
Convenience typedef for the Function analysis manager.
InstructionUniformity
Enum describing how instructions behave with respect to uniformity and divergence,...
Definition Uniformity.h:18
@ AlwaysUniform
The result values are always uniform.
Definition Uniformity.h:23
Implement std::hash so that hash_code can be used in STL containers.
Definition BitVector.h:870
This struct is a compact representation of a valid (non-zero power of two) alignment.
Definition Alignment.h:39
A special type used by analysis passes to provide an address that identifies that particular analysis...
Definition Analysis.h:29
Attributes of a target dependent hardware loop.
LLVM_ABI bool canAnalyze(LoopInfo &LI)
LLVM_ABI bool isHardwareLoopCandidate(ScalarEvolution &SE, LoopInfo &LI, DominatorTree &DT, bool ForceNestedLoop=false, bool ForceHardwareLoopPHI=false)
Information about a load/store intrinsic defined by the target.
Returns options for expansion of memcmp. IsZeroCmp is.
OperandValueInfo mergeWith(const OperandValueInfo OpInfoY)
Describe known properties for a set of pointers.
Parameters that control the generic loop unrolling transformation.