30#define DEBUG_TYPE "tti"
34 cl::desc(
"Recognize reduction patterns."));
38 cl::desc(
"Use this to override the target cache line size when "
39 "specified by the user."));
43 cl::desc(
"Use this to override the target's minimum page size."));
48 "Use this to override the target's predictable branch threshold (%)."));
62 std::unique_ptr<const TargetTransformInfoImplBase> Impl)
79 ScalarizationCost(ScalarizationCost) {
82 FMF = FPMO->getFastMathFlags();
87 ParamTys.insert(ParamTys.begin(), FTy->param_begin(), FTy->param_end());
95 : II(
I), RetTy(RTy), IID(Id), FMF(Flags), ScalarizationCost(ScalarCost) {
96 ParamTys.insert(ParamTys.begin(), Tys.
begin(), Tys.
end());
101 : RetTy(Ty), IID(Id) {
103 Arguments.insert(Arguments.begin(), Args.begin(), Args.end());
104 ParamTys.reserve(Arguments.size());
115 : II(
I), RetTy(RTy), IID(Id), FMF(Flags), ScalarizationCost(ScalarCost) {
116 ParamTys.insert(ParamTys.begin(), Tys.
begin(), Tys.
end());
117 Arguments.insert(Arguments.begin(), Args.begin(), Args.end());
133 L->getExitingBlocks(ExitingBlocks);
138 if (!
L->isLoopLatch(BB)) {
147 if (ConstEC->getValue()->isZero())
168 bool NotAlways =
false;
170 if (!
L->contains(Pred))
188 if (!BI->isConditional())
208 : TTIImpl(
std::make_unique<NoTTIImpl>(
DL)) {}
213 : TTIImpl(
std::
move(Arg.TTIImpl)) {}
216 TTIImpl = std::move(RHS.TTIImpl);
221 return TTIImpl->getInliningThresholdMultiplier();
226 return TTIImpl->getInliningCostBenefitAnalysisSavingsMultiplier();
232 return TTIImpl->getInliningCostBenefitAnalysisProfitableMultiplier();
236 return TTIImpl->getInliningLastCallToStaticBonus();
241 return TTIImpl->adjustInliningThreshold(CB);
246 return TTIImpl->getCallerAllocaCost(CB, AI);
250 return TTIImpl->getInlinerVectorBonusPercent();
256 return TTIImpl->getGEPCost(PointeeType, Ptr, Operands, AccessType,
CostKind);
264 "If pointers have same base address it has to be provided.");
265 return TTIImpl->getPointersChainCost(Ptrs,
Base, Info, AccessTy,
CostKind);
271 return TTIImpl->getEstimatedNumberOfCaseClusters(
SI, JTSize, PSI, BFI);
280 "TTI should not produce negative costs!");
287 : TTIImpl->getPredictableBranchThreshold();
291 return TTIImpl->getBranchMispredictPenalty();
295 return TTIImpl->hasBranchDivergence(
F);
302 if (
Call->hasFnAttr(Attribute::NoDivergenceSource))
305 return TTIImpl->getInstructionUniformity(V);
309 unsigned ToAS)
const {
310 return TTIImpl->isValidAddrSpaceCast(FromAS, ToAS);
314 unsigned ToAS)
const {
315 return TTIImpl->addrspacesMayAlias(FromAS, ToAS);
319 return TTIImpl->getFlatAddressSpace();
324 return TTIImpl->collectFlatAddressOperands(OpIndexes, IID);
328 unsigned ToAS)
const {
329 return TTIImpl->isNoopAddrSpaceCast(FromAS, ToAS);
332std::pair<KnownBits, KnownBits>
334 const Value &PtrOp)
const {
335 return TTIImpl->computeKnownBitsAddrSpaceCast(ToAS, PtrOp);
339 unsigned FromAS,
unsigned ToAS,
const KnownBits &FromPtrBits)
const {
340 return TTIImpl->computeKnownBitsAddrSpaceCast(FromAS, ToAS, FromPtrBits);
344 unsigned SrcAS,
unsigned DstAS)
const {
345 return TTIImpl->getAddrSpaceCastPreservedPtrMask(SrcAS, DstAS);
350 return TTIImpl->canHaveNonUndefGlobalInitializerInAddressSpace(AS);
354 return TTIImpl->getAssumedAddrSpace(V);
358 return TTIImpl->isSingleThreaded();
361std::pair<const Value *, unsigned>
363 return TTIImpl->getPredicatedAddrSpace(V);
368 return TTIImpl->rewriteIntrinsicWithAddressSpace(
II, OldV, NewV);
372 return TTIImpl->isLoweredToCall(
F);
378 return TTIImpl->isHardwareLoopProfitable(L, SE, AC, LibInfo, HWLoopInfo);
382 return TTIImpl->getEpilogueVectorizationMinVF();
387 return TTIImpl->preferPredicateOverEpilogue(TFI);
391 return TTIImpl->getPreferredTailFoldingStyle();
394std::optional<Instruction *>
397 return TTIImpl->instCombineIntrinsic(IC,
II);
402 bool &KnownBitsComputed)
const {
403 return TTIImpl->simplifyDemandedUseBitsIntrinsic(IC,
II, DemandedMask, Known,
411 SimplifyAndSetOp)
const {
412 return TTIImpl->simplifyDemandedVectorEltsIntrinsic(
413 IC,
II, DemandedElts, UndefElts, UndefElts2, UndefElts3,
420 return TTIImpl->getUnrollingPreferences(L, SE, UP, ORE);
425 return TTIImpl->getPeelingPreferences(L, SE, PP);
429 return TTIImpl->isLegalAddImmediate(Imm);
433 return TTIImpl->isLegalAddScalableImmediate(Imm);
437 return TTIImpl->isLegalICmpImmediate(Imm);
442 bool HasBaseReg, int64_t Scale,
445 int64_t ScalableOffset)
const {
446 return TTIImpl->isLegalAddressingMode(Ty, BaseGV, BaseOffset, HasBaseReg,
447 Scale, AddrSpace,
I, ScalableOffset);
452 return TTIImpl->isLSRCostLess(C1, C2);
456 return TTIImpl->isNumRegsMajorCostOfLSR();
460 return TTIImpl->shouldDropLSRSolutionIfLessProfitable();
464 return TTIImpl->isProfitableLSRChainElement(
I);
468 return TTIImpl->canMacroFuseCmp();
475 return TTIImpl->canSaveCmp(L, BI, SE, LI, DT, AC, LibInfo);
481 return TTIImpl->getPreferredAddressingMode(L, SE);
487 return TTIImpl->isLegalMaskedStore(DataType, Alignment,
AddressSpace,
494 return TTIImpl->isLegalMaskedLoad(DataType, Alignment,
AddressSpace,
499 Align Alignment)
const {
500 return TTIImpl->isLegalNTStore(DataType, Alignment);
504 return TTIImpl->isLegalNTLoad(DataType, Alignment);
509 return TTIImpl->isLegalBroadcastLoad(ElementTy, NumElements);
513 Align Alignment)
const {
514 return TTIImpl->isLegalMaskedGather(DataType, Alignment);
518 VectorType *VecTy,
unsigned Opcode0,
unsigned Opcode1,
520 return TTIImpl->isLegalAltInstr(VecTy, Opcode0, Opcode1, OpcodeMask);
524 Align Alignment)
const {
525 return TTIImpl->isLegalMaskedScatter(DataType, Alignment);
529 Align Alignment)
const {
530 return TTIImpl->forceScalarizeMaskedGather(DataType, Alignment);
534 Align Alignment)
const {
535 return TTIImpl->forceScalarizeMaskedScatter(DataType, Alignment);
539 Align Alignment)
const {
540 return TTIImpl->isLegalMaskedCompressStore(DataType, Alignment);
544 Align Alignment)
const {
545 return TTIImpl->isLegalMaskedExpandLoad(DataType, Alignment);
549 Align Alignment)
const {
550 return TTIImpl->isLegalStridedLoadStore(DataType, Alignment);
555 unsigned AddrSpace)
const {
556 return TTIImpl->isLegalInterleavedAccessType(VTy, Factor, Alignment,
561 Type *DataType)
const {
562 return TTIImpl->isLegalMaskedVectorHistogram(AddrType, DataType);
566 return TTIImpl->enableOrderedReductions();
570 return TTIImpl->hasDivRemOp(DataType, IsSigned);
574 unsigned AddrSpace)
const {
575 return TTIImpl->hasVolatileVariant(
I, AddrSpace);
579 return TTIImpl->prefersVectorizedAddressing();
584 int64_t Scale,
unsigned AddrSpace)
const {
586 Ty, BaseGV, BaseOffset, HasBaseReg, Scale, AddrSpace);
587 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
592 return TTIImpl->LSRWithInstrQueries();
596 return TTIImpl->isTruncateFree(Ty1, Ty2);
600 return TTIImpl->isProfitableToHoist(
I);
606 return TTIImpl->isTypeLegal(Ty);
610 return TTIImpl->getRegUsageForType(Ty);
614 return TTIImpl->shouldBuildLookupTables();
619 return TTIImpl->shouldBuildLookupTablesForConstant(
C);
623 return TTIImpl->shouldBuildRelLookupTables();
627 return TTIImpl->useColdCCForColdCall(
F);
631 return TTIImpl->useFastCCForInternalCall(
F);
636 return TTIImpl->isTargetIntrinsicTriviallyScalarizable(
ID);
641 return TTIImpl->isTargetIntrinsicWithScalarOpAtArg(
ID, ScalarOpdIdx);
646 return TTIImpl->isTargetIntrinsicWithOverloadTypeAtArg(
ID, OpdIdx);
651 return TTIImpl->isTargetIntrinsicWithStructReturnOverloadAtField(
ID, RetIdx);
662 I->getOperand(1)->hasOneUse())
677 return TTIImpl->getScalarizationOverhead(Ty, DemandedElts, Insert, Extract,
684 return TTIImpl->getOperandsScalarizationOverhead(Tys,
CostKind, VIC);
688 return TTIImpl->supportsEfficientVectorElementLoadStore();
692 return TTIImpl->supportsTailCalls();
696 return TTIImpl->supportsTailCallFor(CB);
700 bool LoopHasReductions)
const {
701 return TTIImpl->enableAggressiveInterleaving(LoopHasReductions);
706 return TTIImpl->enableMemCmpExpansion(OptSize, IsZeroCmp);
710 return TTIImpl->enableSelectOptimize();
715 return TTIImpl->shouldTreatInstructionLikeSelect(
I);
719 return TTIImpl->enableInterleavedAccessVectorization();
723 return TTIImpl->enableMaskedInterleavedAccessVectorization();
727 return TTIImpl->isFPVectorizationPotentiallyUnsafe();
735 unsigned *
Fast)
const {
736 return TTIImpl->allowsMisalignedMemoryAccesses(Context,
BitWidth,
742 return TTIImpl->getPopcntSupport(IntTyWidthInBit);
746 return TTIImpl->haveFastSqrt(Ty);
751 return TTIImpl->isExpensiveToSpeculativelyExecute(
I);
755 return TTIImpl->isFCmpOrdCheaperThanFCmpZero(Ty);
760 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
769 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
777 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
782 unsigned Opcode,
unsigned Idx,
const APInt &Imm,
Type *Ty,
785 TTIImpl->getIntImmCostInst(Opcode, Idx, Imm, Ty,
CostKind, Inst);
786 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
795 TTIImpl->getIntImmCostIntrin(IID, Idx, Imm, Ty,
CostKind);
796 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
802 return TTIImpl->preferToKeepConstantsAttached(Inst, Fn);
806 return TTIImpl->getNumberOfRegisters(ClassID);
810 bool IsStore)
const {
811 return TTIImpl->hasConditionalLoadStoreForType(Ty, IsStore);
816 return TTIImpl->getRegisterClassForType(
Vector, Ty);
820 return TTIImpl->getRegisterClassName(ClassID);
825 return TTIImpl->getRegisterBitWidth(K);
829 return TTIImpl->getMinVectorRegisterBitWidth();
833 return TTIImpl->getMaxVScale();
837 return TTIImpl->getVScaleForTuning();
842 return TTIImpl->shouldMaximizeVectorBandwidth(K);
846 bool IsScalable)
const {
847 return TTIImpl->getMinimumVF(ElemWidth, IsScalable);
851 unsigned Opcode)
const {
852 return TTIImpl->getMaximumVF(ElemWidth, Opcode);
856 Type *ScalarValTy)
const {
857 return TTIImpl->getStoreMinimumVF(VF, ScalarMemTy, ScalarValTy);
861 const Instruction &
I,
bool &AllowPromotionWithoutCommonHeader)
const {
862 return TTIImpl->shouldConsiderAddressTypePromotion(
863 I, AllowPromotionWithoutCommonHeader);
868 : TTIImpl->getCacheLineSize();
871std::optional<unsigned>
873 return TTIImpl->getCacheSize(Level);
876std::optional<unsigned>
878 return TTIImpl->getCacheAssociativity(Level);
883 : TTIImpl->getMinPageSize();
887 return TTIImpl->getPrefetchDistance();
891 unsigned NumMemAccesses,
unsigned NumStridedMemAccesses,
892 unsigned NumPrefetches,
bool HasCall)
const {
893 return TTIImpl->getMinPrefetchStride(NumMemAccesses, NumStridedMemAccesses,
894 NumPrefetches, HasCall);
898 return TTIImpl->getMaxPrefetchIterationsAhead();
902 return TTIImpl->enableWritePrefetching();
906 return TTIImpl->shouldPrefetchAddressSpace(AS);
910 unsigned Opcode,
Type *InputTypeA,
Type *InputTypeB,
Type *AccumType,
914 return TTIImpl->getPartialReductionCost(Opcode, InputTypeA, InputTypeB,
915 AccumType, VF, OpAExtend, OpBExtend,
920 return TTIImpl->getMaxInterleaveFactor(VF);
934 if (CI->getValue().isPowerOf2())
936 else if (CI->getValue().isNegatedPowerOf2())
946 if (ShuffleInst->isZeroEltSplat())
961 if (CI->getValue().isPowerOf2())
963 else if (CI->getValue().isNegatedPowerOf2())
969 bool AllPow2 =
true, AllNegPow2 =
true;
970 for (
uint64_t I = 0, E = CDS->getNumElements();
I != E; ++
I) {
972 AllPow2 &= CI->getValue().isPowerOf2();
973 AllNegPow2 &= CI->getValue().isNegatedPowerOf2();
974 if (AllPow2 || AllNegPow2)
977 AllPow2 = AllNegPow2 =
false;
986 return {OpInfo, OpProps};
1006 if (TLibInfo && Opcode == Instruction::FRem) {
1010 TLibInfo->
getLibFunc(Instruction::FRem, Ty->getScalarType(), Func) &&
1017 Opcode, Ty,
CostKind, Op1Info, Op2Info, Args, CxtI);
1018 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1023 VectorType *VecTy,
unsigned Opcode0,
unsigned Opcode1,
1026 TTIImpl->getAltInstrCost(VecTy, Opcode0, Opcode1, OpcodeMask,
CostKind);
1027 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1037 "Expected the Mask to match the return size if given");
1039 "Expected the same scalar types");
1041 Kind, DstTy, SrcTy, Mask,
CostKind, Index, SubTp, Args, CxtI);
1042 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1057 case Instruction::CastOps::ZExt:
1059 case Instruction::CastOps::SExt:
1061 case Instruction::CastOps::FPExt:
1074 auto getLoadStoreKind = [](
const Value *V,
unsigned LdStOp,
unsigned MaskedOp,
1075 unsigned GatScatOp) {
1080 if (
I->getOpcode() == LdStOp)
1084 if (
II->getIntrinsicID() == MaskedOp)
1086 if (
II->getIntrinsicID() == GatScatOp)
1093 switch (
I->getOpcode()) {
1094 case Instruction::ZExt:
1095 case Instruction::SExt:
1096 case Instruction::FPExt:
1097 return getLoadStoreKind(
I->getOperand(0), Instruction::Load,
1098 Intrinsic::masked_load, Intrinsic::masked_gather);
1099 case Instruction::Trunc:
1100 case Instruction::FPTrunc:
1102 return getLoadStoreKind(*
I->user_begin(), Instruction::Store,
1103 Intrinsic::masked_store,
1104 Intrinsic::masked_scatter);
1116 assert((
I ==
nullptr ||
I->getOpcode() == Opcode) &&
1117 "Opcode should reflect passed instruction.");
1119 TTIImpl->getCastInstrCost(Opcode, Dst, Src, CCH,
CostKind,
I);
1120 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1128 TTIImpl->getExtractWithExtendCost(Opcode, Dst, VecTy, Index,
CostKind);
1129 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1135 assert((
I ==
nullptr ||
I->getOpcode() == Opcode) &&
1136 "Opcode should reflect passed instruction.");
1138 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1146 assert((
I ==
nullptr ||
I->getOpcode() == Opcode) &&
1147 "Opcode should reflect passed instruction.");
1149 Opcode, ValTy, CondTy, VecPred,
CostKind, Op1Info, Op2Info,
I);
1150 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1157 assert((Opcode == Instruction::InsertElement ||
1158 Opcode == Instruction::ExtractElement) &&
1159 "Expecting Opcode to be insertelement/extractelement.");
1161 TTIImpl->getVectorInstrCost(Opcode, Val,
CostKind, Index, Op0, Op1, VIC);
1162 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1168 Value *Scalar,
ArrayRef<std::tuple<Value *, User *, int>> ScalarUserAndIdx,
1170 assert((Opcode == Instruction::InsertElement ||
1171 Opcode == Instruction::ExtractElement) &&
1172 "Expecting Opcode to be insertelement/extractelement.");
1174 Opcode, Val,
CostKind, Index, Scalar, ScalarUserAndIdx, VIC);
1175 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1186 TTIImpl->getVectorInstrCost(
I, Val,
CostKind, Index, VIC);
1187 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1193 unsigned Index)
const {
1195 TTIImpl->getIndexedVectorInstrCostFromEnd(Opcode, Val,
CostKind, Index);
1196 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1202 assert((Opcode == Instruction::InsertValue ||
1203 Opcode == Instruction::ExtractValue) &&
1204 "Expecting Opcode to be insertvalue/extractvalue.");
1206 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1211 Type *EltTy,
int ReplicationFactor,
int VF,
const APInt &DemandedDstElts,
1214 EltTy, ReplicationFactor, VF, DemandedDstElts,
CostKind);
1215 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1223 assert((
I ==
nullptr ||
I->getOpcode() == Opcode) &&
1224 "Opcode should reflect passed instruction.");
1227 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1234 bool UseMaskForCond,
bool UseMaskForGaps)
const {
1237 UseMaskForCond, UseMaskForGaps);
1238 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1246 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1254 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1263 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1268 return TTIImpl->getNumberOfParts(Tp);
1275 TTIImpl->getAddressComputationCost(PtrTy, SE, Ptr,
CostKind);
1276 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1282 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1287 return TTIImpl->getMaxMemIntrinsicInlineSizeThreshold();
1291 unsigned Opcode,
VectorType *Ty, std::optional<FastMathFlags> FMF,
1294 TTIImpl->getArithmeticReductionCost(Opcode, Ty, FMF,
CostKind);
1295 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1303 TTIImpl->getMinMaxReductionCost(IID, Ty, FMF,
CostKind);
1304 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1311 return TTIImpl->getExtendedReductionCost(Opcode, IsUnsigned, ResTy, Ty, FMF,
1316 bool IsUnsigned,
unsigned RedOpcode,
Type *ResTy,
VectorType *Ty,
1318 return TTIImpl->getMulAccReductionCost(IsUnsigned, RedOpcode, ResTy, Ty,
1324 return TTIImpl->getCostOfKeepingLiveOverCall(Tys);
1329 return TTIImpl->getTgtMemIntrinsic(Inst, Info);
1333 return TTIImpl->getAtomicMemIntrinsicMaxElementSize();
1338 return TTIImpl->getOrCreateResultFromMemIntrinsic(Inst, ExpectedType,
1344 unsigned DestAddrSpace,
Align SrcAlign,
Align DestAlign,
1345 std::optional<uint32_t> AtomicElementSize)
const {
1346 return TTIImpl->getMemcpyLoopLoweringType(Context,
Length, SrcAddrSpace,
1347 DestAddrSpace, SrcAlign, DestAlign,
1353 unsigned RemainingBytes,
unsigned SrcAddrSpace,
unsigned DestAddrSpace,
1355 std::optional<uint32_t> AtomicCpySize)
const {
1356 TTIImpl->getMemcpyLoopResidualLoweringType(
1357 OpsOut, Context, RemainingBytes, SrcAddrSpace, DestAddrSpace, SrcAlign,
1358 DestAlign, AtomicCpySize);
1363 return TTIImpl->areInlineCompatible(Caller, Callee);
1369 unsigned DefaultCallPenalty)
const {
1370 return TTIImpl->getInlineCallPenalty(
F,
Call, DefaultCallPenalty);
1375 return TTIImpl->shouldCopyAttributeWhenOutliningFrom(Caller, Attr);
1380 return TTIImpl->areTypesABICompatible(Caller, Callee, Types);
1385 return TTIImpl->isIndexedLoadLegal(Mode, Ty);
1390 return TTIImpl->isIndexedStoreLegal(Mode, Ty);
1394 return TTIImpl->getLoadStoreVecRegBitWidth(AS);
1398 return TTIImpl->isLegalToVectorizeLoad(LI);
1402 return TTIImpl->isLegalToVectorizeStore(
SI);
1406 unsigned ChainSizeInBytes,
Align Alignment,
unsigned AddrSpace)
const {
1407 return TTIImpl->isLegalToVectorizeLoadChain(ChainSizeInBytes, Alignment,
1412 unsigned ChainSizeInBytes,
Align Alignment,
unsigned AddrSpace)
const {
1413 return TTIImpl->isLegalToVectorizeStoreChain(ChainSizeInBytes, Alignment,
1419 return TTIImpl->isLegalToVectorizeReduction(RdxDesc, VF);
1423 return TTIImpl->isElementTypeLegalForScalableVector(Ty);
1428 unsigned ChainSizeInBytes,
1430 return TTIImpl->getLoadVectorFactor(VF, LoadSize, ChainSizeInBytes, VecTy);
1435 unsigned ChainSizeInBytes,
1437 return TTIImpl->getStoreVectorFactor(VF, StoreSize, ChainSizeInBytes, VecTy);
1441 bool IsEpilogue)
const {
1442 return TTIImpl->preferFixedOverScalableIfEqualCost(IsEpilogue);
1447 return TTIImpl->preferInLoopReduction(Kind, Ty);
1451 return TTIImpl->preferAlternateOpcodeVectorization();
1455 return TTIImpl->preferPredicatedReductionSelect();
1460 return TTIImpl->preferEpilogueVectorization(Iters);
1464 return TTIImpl->shouldConsiderVectorizationRegPressure();
1469 return TTIImpl->getVPLegalizationStrategy(VPI);
1473 return TTIImpl->hasArmWideBranch(Thumb);
1477 return TTIImpl->getFeatureMask(
F);
1481 return TTIImpl->getPriorityMask(
F);
1485 return TTIImpl->isMultiversionedFunction(
F);
1489 return TTIImpl->getMaxNumArgs();
1493 return TTIImpl->shouldExpandReduction(
II);
1499 return TTIImpl->getPreferredExpandedReductionShuffle(
II);
1503 return TTIImpl->getGISelRematGlobalCost();
1507 return TTIImpl->getMinTripCountTailFoldingThreshold();
1511 return TTIImpl->supportsScalableVectors();
1515 return TTIImpl->enableScalableVectorization();
1519 return TTIImpl->hasActiveVectorLength();
1524 return TTIImpl->isProfitableToSinkOperands(
I, OpsToSink);
1528 return TTIImpl->isVectorShiftByScalarCheap(Ty);
1534 return TTIImpl->getNumBytesToPadGlobalArray(
Size,
ArrayType);
1540 return TTIImpl->collectKernelLaunchBounds(
F, LB);
1544 return TTIImpl->allowVectorElementIndexingUsingGEP();
1553 : TTICallback(
std::
move(TTICallback)) {}
1557 assert(!
F.isIntrinsic() &&
"Should not request TTI for intrinsics");
1558 return TTICallback(
F);
1564 return Result(
F.getDataLayout());
1569 "Target Transform Information",
false,
true)
1583 TTI = TIRA.run(
F, DummyFAM);
for(const MachineOperand &MO :llvm::drop_begin(OldMI.operands(), Desc.getNumOperands()))
assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
static cl::opt< OutputCostKind > CostKind("cost-kind", cl::desc("Target cost kind"), cl::init(OutputCostKind::RecipThroughput), cl::values(clEnumValN(OutputCostKind::RecipThroughput, "throughput", "Reciprocal throughput"), clEnumValN(OutputCostKind::Latency, "latency", "Instruction latency"), clEnumValN(OutputCostKind::CodeSize, "code-size", "Code size"), clEnumValN(OutputCostKind::SizeAndLatency, "size-latency", "Code size and latency"), clEnumValN(OutputCostKind::All, "all", "Print all cost kinds")))
static cl::opt< bool > ForceNestedLoop("force-nested-hardware-loop", cl::Hidden, cl::init(false), cl::desc("Force allowance of nested hardware loops"))
static cl::opt< bool > ForceHardwareLoopPHI("force-hardware-loop-phi", cl::Hidden, cl::init(false), cl::desc("Force hardware loop counter to be updated through a phi"))
This file provides various utilities for inspecting and working with the control flow graph in LLVM I...
Module.h This file contains the declarations for the Module class.
uint64_t IntrinsicInst * II
#define INITIALIZE_PASS(passName, arg, name, cfg, analysis)
This file defines the SmallVector class.
static TableGen::Emitter::Opt Y("gen-skeleton-entry", EmitSkeleton, "Generate example skeleton entry")
static TableGen::Emitter::OptClass< SkeletonEmitter > X("gen-skeleton-class", "Generate example skeleton class")
static SymbolRef::Type getType(const Symbol *Sym)
Class for arbitrary precision integers.
an instruction to allocate memory on the stack
This class represents an incoming formal argument to a Function.
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
Class to represent array types.
A cache of @llvm.assume calls within a function.
Functions, function parameters, and return types can have attributes to indicate how they should be t...
LLVM Basic Block Representation.
BlockFrequencyInfo pass uses BlockFrequencyInfoImpl implementation to estimate IR basic block frequen...
Conditional or Unconditional Branch instruction.
Base class for all callable instructions (InvokeInst and CallInst) Holds everything related to callin...
Function * getCalledFunction() const
Returns the function called, or null if this is an indirect function invocation or the function signa...
User::op_iterator arg_begin()
Return the iterator pointing to the beginning of the argument list.
User::op_iterator arg_end()
Return the iterator pointing to the end of the argument list.
Predicate
This enumeration lists the possible predicates for CmpInst subclasses.
This is an important base class in LLVM.
A parsed version of the target data layout string in and methods for querying it.
Concrete subclass of DominatorTreeBase that is used to compute a normal dominator tree.
LLVM_ABI bool dominates(const BasicBlock *BB, const Use &U) const
Return true if the (end of the) basic block BB dominates the use U.
Convenience struct for specifying and reasoning about fast-math flags.
Class to represent function types.
FunctionType * getFunctionType() const
Returns the FunctionType for me.
ImmutablePass class - This class is used to provide information that does not need to be run.
The core instruction combiner logic.
LLVM_ABI IntrinsicCostAttributes(Intrinsic::ID Id, const CallBase &CI, InstructionCost ScalarCost=InstructionCost::getInvalid(), bool TypeBasedOnly=false)
A wrapper class for inspecting calls to intrinsic functions.
This is an important class for using LLVM in a threaded context.
An instruction for reading from memory.
Wrapper class to LoopBlocksDFS that provides a standard begin()/end() interface for the DFS reverse p...
void perform(const LoopInfo *LI)
Traverse the loop blocks and store the DFS result.
LoopT * getLoopFor(const BlockT *BB) const
Return the inner most loop that BB lives in.
Represents a single loop in the control flow graph.
Information for memory intrinsic cost model.
Analysis providing profile information.
The RecurrenceDescriptor is used to identify recurrences variables in a loop.
This class represents a constant integer value.
This class represents an analyzed expression in the program.
The main scalar evolution driver.
LLVM_ABI uint64_t getTypeSizeInBits(Type *Ty) const
Return the size in bits of the specified type, for which isSCEVable must return true.
LLVM_ABI bool isLoopInvariant(const SCEV *S, const Loop *L)
Return true if the value of the given SCEV is unchanging in the specified loop.
LLVM_ABI const SCEV * getExitCount(const Loop *L, const BasicBlock *ExitingBlock, ExitCountKind Kind=Exact)
Return the number of times the backedge executes before the given exit would be taken; if not exactly...
This is a 'bitvector' (really, a variable-sized bit array), optimized for the case when the array is ...
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
StackOffset holds a fixed and a scalable offset in bytes.
An instruction for storing to memory.
Analysis pass providing the TargetTransformInfo.
LLVM_ABI Result run(const Function &F, FunctionAnalysisManager &)
TargetTransformInfo Result
LLVM_ABI TargetIRAnalysis()
Default construct a target IR analysis.
Provides information about what library functions are available for the current target.
bool getLibFunc(StringRef funcName, LibFunc &F) const
Searches for a particular function name.
StringRef getName(LibFunc F) const
bool isFunctionVectorizable(StringRef F, const ElementCount &VF) const
The instances of the Type class are immutable: once they are created, they are never changed.
LLVM_ABI bool isScalableTy(SmallPtrSetImpl< const Type * > &Visited) const
Return true if this is a type whose size is a known multiple of vscale.
static LLVM_ABI IntegerType * getInt32Ty(LLVMContext &C)
Type * getScalarType() const
If this is a vector type, return the element type, otherwise return 'this'.
This is the common base class for vector predication intrinsics.
LLVM Value Representation.
Type * getType() const
All values are typed, get the type of this value.
Base class of all SIMD vector types.
ElementCount getElementCount() const
Return an ElementCount instance to represent the (possibly scalable) number of elements in the vector...
constexpr ScalarTy getKnownMinValue() const
Returns the minimum value this quantity can represent.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
@ Fast
Attempts to make calls as fast as possible (e.g.
@ C
The default llvm calling convention, compatible with C.
initializer< Ty > init(const Ty &Val)
This is an optimization pass for GlobalISel generic memory operations.
decltype(auto) dyn_cast(const From &Val)
dyn_cast<X> - Return the argument parameter cast to the specified type.
LLVM_ABI Value * getSplatValue(const Value *V)
Get splat value if the input is a splat vector or return nullptr.
bool containsIrreducibleCFG(RPOTraversalT &RPOTraversal, const LoopInfoT &LI)
Return true if the control flow in RPOTraversal is irreducible.
bool isa(const From &Val)
isa<X> - Return true if the parameter to the template is an instance of one of the template type argu...
LLVM_ABI ImmutablePass * createTargetTransformInfoWrapperPass(TargetIRAnalysis TIRA)
Create an analysis pass wrapper around a TTI object.
RecurKind
These are the kinds of recurrences that we support.
constexpr unsigned BitWidth
OutputIt move(R &&Range, OutputIt Out)
Provide wrappers to std::move which take ranges instead of having to pass begin/end explicitly.
auto predecessors(const MachineBasicBlock *BB)
AnalysisManager< Function > FunctionAnalysisManager
Convenience typedef for the Function analysis manager.
InstructionUniformity
Enum describing how instructions behave with respect to uniformity and divergence,...
@ AlwaysUniform
The result values are always uniform.
Implement std::hash so that hash_code can be used in STL containers.
This struct is a compact representation of a valid (non-zero power of two) alignment.
A special type used by analysis passes to provide an address that identifies that particular analysis...
Attributes of a target dependent hardware loop.
LLVM_ABI bool canAnalyze(LoopInfo &LI)
HardwareLoopInfo()=delete
LLVM_ABI bool isHardwareLoopCandidate(ScalarEvolution &SE, LoopInfo &LI, DominatorTree &DT, bool ForceNestedLoop=false, bool ForceHardwareLoopPHI=false)
Information about a load/store intrinsic defined by the target.