30#define DEBUG_TYPE "tti"
34 cl::desc(
"Recognize reduction patterns."));
38 cl::desc(
"Use this to override the target cache line size when "
39 "specified by the user."));
43 cl::desc(
"Use this to override the target's minimum page size."));
48 "Use this to override the target's predictable branch threshold (%)."));
62 std::unique_ptr<const TargetTransformInfoImplBase> Impl)
79 ScalarizationCost(ScalarizationCost) {
82 FMF = FPMO->getFastMathFlags();
87 ParamTys.push_back(Arg->getType());
95 : II(
I), RetTy(RTy), IID(Id), FMF(Flags), ScalarizationCost(ScalarCost) {
96 ParamTys.insert(ParamTys.begin(), Tys.
begin(), Tys.
end());
101 : RetTy(Ty), IID(Id) {
103 Arguments.insert(Arguments.begin(), Args.begin(), Args.end());
104 ParamTys.reserve(Arguments.size());
113 : II(
I), RetTy(RTy), IID(Id), FMF(Flags), ScalarizationCost(ScalarCost),
115 ParamTys.insert(ParamTys.begin(), Tys.
begin(), Tys.
end());
116 Arguments.insert(Arguments.begin(), Args.begin(), Args.end());
132 L->getExitingBlocks(ExitingBlocks);
137 if (!
L->isLoopLatch(BB)) {
146 if (ConstEC->getValue()->isZero())
167 bool NotAlways =
false;
169 if (!
L->contains(Pred))
204 : TTIImpl(
std::make_unique<NoTTIImpl>(
DL)) {}
209 : TTIImpl(
std::
move(Arg.TTIImpl)) {}
212 TTIImpl = std::move(RHS.TTIImpl);
217 return TTIImpl->getInliningThresholdMultiplier();
222 return TTIImpl->getInliningCostBenefitAnalysisSavingsMultiplier();
228 return TTIImpl->getInliningCostBenefitAnalysisProfitableMultiplier();
232 return TTIImpl->getInliningLastCallToStaticBonus();
237 return TTIImpl->adjustInliningThreshold(CB);
242 return TTIImpl->getCallerAllocaCost(CB, AI);
246 return TTIImpl->getInlinerVectorBonusPercent();
252 return TTIImpl->getGEPCost(PointeeType, Ptr,
Operands,
CostKind, AccessType);
260 "If pointers have same base address it has to be provided.");
261 return TTIImpl->getPointersChainCost(Ptrs,
Base, Info, AccessTy,
CostKind);
267 return TTIImpl->getEstimatedNumberOfCaseClusters(
SI, JTSize, PSI, BFI);
276 "TTI should not produce negative costs!");
283 : TTIImpl->getPredictableBranchThreshold();
287 return TTIImpl->getBranchMispredictPenalty();
291 return TTIImpl->hasBranchDivergence(
F);
299 Call->hasFnAttr(Attribute::NoDivergenceSource))
306 unsigned ToAS)
const {
307 return TTIImpl->isValidAddrSpaceCast(FromAS, ToAS);
311 unsigned ToAS)
const {
312 return TTIImpl->addrspacesMayAlias(FromAS, ToAS);
316 return TTIImpl->getFlatAddressSpace();
320 unsigned AS2)
const {
321 assert(AS1 != AS2 &&
"Expected distinct address spaces");
322 return TTIImpl->getAddressSpaceJoin(AS1, AS2);
327 return TTIImpl->collectFlatAddressOperands(OpIndexes, IID);
331 unsigned ToAS)
const {
332 return TTIImpl->isNoopAddrSpaceCast(FromAS, ToAS);
335std::pair<KnownBits, KnownBits>
337 const Value &PtrOp)
const {
338 return TTIImpl->computeKnownBitsAddrSpaceCast(ToAS, PtrOp);
342 unsigned FromAS,
unsigned ToAS,
const KnownBits &FromPtrBits)
const {
343 return TTIImpl->computeKnownBitsAddrSpaceCast(FromAS, ToAS, FromPtrBits);
347 unsigned SrcAS,
unsigned DstAS)
const {
348 return TTIImpl->getAddrSpaceCastPreservedPtrMask(SrcAS, DstAS);
353 return TTIImpl->canHaveNonUndefGlobalInitializerInAddressSpace(AS);
357 return TTIImpl->getAssumedAddrSpace(V);
360std::pair<const Value *, unsigned>
362 return TTIImpl->getPredicatedAddrSpace(V);
367 return TTIImpl->rewriteIntrinsicWithAddressSpace(
II, OldV, NewV);
371 return TTIImpl->isLoweredToCall(
F);
377 return TTIImpl->isHardwareLoopProfitable(L, SE, AC, LibInfo, HWLoopInfo);
381 return TTIImpl->getEpilogueVectorizationMinVF();
386 return TTIImpl->preferTailFoldingOverEpilogue(TFI);
390 return TTIImpl->getPreferredTailFoldingStyle();
393std::optional<Instruction *>
396 return TTIImpl->instCombineIntrinsic(IC,
II);
401 bool &KnownBitsComputed)
const {
402 return TTIImpl->simplifyDemandedUseBitsIntrinsic(IC,
II, DemandedMask,
Known,
410 SimplifyAndSetOp)
const {
411 return TTIImpl->simplifyDemandedVectorEltsIntrinsic(
412 IC,
II, DemandedElts, UndefElts, UndefElts2, UndefElts3,
419 return TTIImpl->getUnrollingPreferences(L, SE, UP, ORE);
424 return TTIImpl->getPeelingPreferences(L, SE, PP);
428 return TTIImpl->isLegalAddImmediate(
Imm);
432 return TTIImpl->isLegalAddScalableImmediate(
Imm);
436 return TTIImpl->isLegalICmpImmediate(
Imm);
441 bool HasBaseReg, int64_t Scale,
444 int64_t ScalableOffset)
const {
445 return TTIImpl->isLegalAddressingMode(Ty, BaseGV, BaseOffset, HasBaseReg,
446 Scale, AddrSpace,
I, ScalableOffset);
451 return TTIImpl->isLSRCostLess(C1, C2);
455 return TTIImpl->isNumRegsMajorCostOfLSR();
459 return TTIImpl->shouldDropLSRSolutionIfLessProfitable();
463 return TTIImpl->isProfitableLSRChainElement(
I);
467 return TTIImpl->canMacroFuseCmp();
474 return TTIImpl->canSaveCmp(L, BI, SE, LI, DT, AC, LibInfo);
480 return TTIImpl->getPreferredAddressingMode(L, SE);
486 return TTIImpl->isLegalMaskedStore(DataType, Alignment,
AddressSpace,
493 return TTIImpl->isLegalMaskedLoad(DataType, Alignment,
AddressSpace,
498 Align Alignment)
const {
499 return TTIImpl->isLegalNTStore(DataType, Alignment);
503 return TTIImpl->isLegalNTLoad(DataType, Alignment);
508 return TTIImpl->isLegalBroadcastLoad(ElementTy, NumElements);
512 Align Alignment)
const {
513 return TTIImpl->isLegalMaskedGather(DataType, Alignment);
517 VectorType *VecTy,
unsigned Opcode0,
unsigned Opcode1,
519 return TTIImpl->isLegalAltInstr(VecTy, Opcode0, Opcode1, OpcodeMask);
523 Align Alignment)
const {
524 return TTIImpl->isLegalMaskedScatter(DataType, Alignment);
528 Align Alignment)
const {
529 return TTIImpl->forceScalarizeMaskedGather(DataType, Alignment);
533 Align Alignment)
const {
534 return TTIImpl->forceScalarizeMaskedScatter(DataType, Alignment);
538 Align Alignment)
const {
539 return TTIImpl->isLegalMaskedCompressStore(DataType, Alignment);
543 Align Alignment)
const {
544 return TTIImpl->isLegalMaskedExpandLoad(DataType, Alignment);
548 Align Alignment)
const {
549 return TTIImpl->isLegalStridedLoadStore(DataType, Alignment);
554 unsigned AddrSpace)
const {
555 return TTIImpl->isLegalInterleavedAccessType(VTy, Factor, Alignment,
560 Type *DataType)
const {
561 return TTIImpl->isLegalMaskedVectorHistogram(AddrType, DataType);
565 return TTIImpl->enableOrderedReductions();
569 return TTIImpl->hasDivRemOp(DataType, IsSigned);
573 unsigned AddrSpace)
const {
574 return TTIImpl->hasVolatileVariant(
I, AddrSpace);
578 return TTIImpl->prefersVectorizedAddressing();
583 int64_t Scale,
unsigned AddrSpace)
const {
585 Ty, BaseGV, BaseOffset, HasBaseReg, Scale, AddrSpace);
586 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
591 return TTIImpl->LSRWithInstrQueries();
595 return TTIImpl->isTruncateFree(Ty1, Ty2);
599 return TTIImpl->isProfitableToHoist(
I);
605 return TTIImpl->isTypeLegal(Ty);
609 return TTIImpl->getRegUsageForType(Ty);
613 return TTIImpl->shouldBuildLookupTables();
618 return TTIImpl->shouldBuildLookupTablesForConstant(
C);
622 return TTIImpl->getMinimumLookupTableEntryBitWidth();
626 return TTIImpl->shouldBuildRelLookupTables();
630 return TTIImpl->useColdCCForColdCall(
F);
634 return TTIImpl->useFastCCForInternalCall(
F);
639 return TTIImpl->isTargetIntrinsicWithScalarOpAtArg(ID, ScalarOpdIdx);
644 return TTIImpl->isTargetIntrinsicWithOverloadTypeAtArg(ID, OpdIdx);
649 return TTIImpl->isTargetIntrinsicWithStructReturnOverloadAtField(ID, RetIdx);
656 return Ctx1 == Ctx2 ? Ctx1 : TargetTransformInfo::VectorInstrContext::None;
667 I->getOperand(1)->hasOneUse())
683 return TTIImpl->getBuildVectorContextHint(Mask, Scalars, GatherUseOps);
690 return TTIImpl->getScalarizationOverhead(Ty, DemandedElts, Insert, Extract,
697 return TTIImpl->getOperandsScalarizationOverhead(Tys,
CostKind, VIC);
701 return TTIImpl->supportsEfficientVectorElementLoadStore();
705 return TTIImpl->supportsTailCalls();
709 return TTIImpl->supportsTailCallFor(CB);
713 bool LoopHasReductions)
const {
714 return TTIImpl->enableAggressiveInterleaving(LoopHasReductions);
719 return TTIImpl->enableMemCmpExpansion(OptSize, IsZeroCmp);
723 return TTIImpl->enableSelectOptimize();
728 return TTIImpl->shouldTreatInstructionLikeSelect(
I);
732 return TTIImpl->enableInterleavedAccessVectorization();
736 return TTIImpl->enableMaskedInterleavedAccessVectorization();
740 return TTIImpl->isFPVectorizationPotentiallyUnsafe();
748 unsigned *
Fast)
const {
749 return TTIImpl->allowsMisalignedMemoryAccesses(Context,
BitWidth,
755 return TTIImpl->getPopcntSupport(IntTyWidthInBit);
759 return TTIImpl->haveFastSqrt(Ty);
763 return TTIImpl->haveFastClmul(Ty);
768 return TTIImpl->isExpensiveToSpeculativelyExecute(
I);
772 return TTIImpl->isFCmpOrdCheaperThanFCmpZero(Ty);
777 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
786 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
794 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
799 unsigned Opcode,
unsigned Idx,
const APInt &
Imm,
Type *Ty,
802 TTIImpl->getIntImmCostInst(Opcode, Idx,
Imm, Ty,
CostKind, Inst);
803 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
812 TTIImpl->getIntImmCostIntrin(IID, Idx,
Imm, Ty,
CostKind);
813 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
819 return TTIImpl->preferToKeepConstantsAttached(Inst, Fn);
823 return TTIImpl->getNumberOfRegisters(ClassID);
827 bool IsStore)
const {
828 return TTIImpl->hasConditionalLoadStoreForType(Ty, IsStore);
833 return TTIImpl->getRegisterClassForType(
Vector, Ty);
837 return TTIImpl->getRegisterClassName(ClassID);
842 return TTIImpl->getRegisterClassSpillCost(ClassID,
CostKind);
847 return TTIImpl->getRegisterClassReloadCost(ClassID,
CostKind);
852 return TTIImpl->getRegisterBitWidth(
K);
856 return TTIImpl->getMinVectorRegisterBitWidth();
860 return TTIImpl->getVScaleForTuning();
865 return TTIImpl->shouldMaximizeVectorBandwidth(
K);
869 bool IsScalable)
const {
870 return TTIImpl->getMinimumVF(ElemWidth, IsScalable);
874 unsigned Opcode)
const {
875 return TTIImpl->getMaximumVF(ElemWidth, Opcode);
881 unsigned AddrSpace)
const {
882 return TTIImpl->getStoreMinimumVF(VF, ScalarMemTy, ScalarValTy, Alignment,
887 const Instruction &
I,
bool &AllowPromotionWithoutCommonHeader)
const {
888 return TTIImpl->shouldConsiderAddressTypePromotion(
889 I, AllowPromotionWithoutCommonHeader);
894 : TTIImpl->getCacheLineSize();
897std::optional<unsigned>
899 return TTIImpl->getCacheSize(Level);
902std::optional<unsigned>
904 return TTIImpl->getCacheAssociativity(Level);
909 : TTIImpl->getMinPageSize();
913 return TTIImpl->getPrefetchDistance();
917 unsigned NumMemAccesses,
unsigned NumStridedMemAccesses,
918 unsigned NumPrefetches,
bool HasCall)
const {
919 return TTIImpl->getMinPrefetchStride(NumMemAccesses, NumStridedMemAccesses,
920 NumPrefetches, HasCall);
924 return TTIImpl->getMaxPrefetchIterationsAhead();
928 return TTIImpl->enableWritePrefetching();
932 return TTIImpl->shouldPrefetchAddressSpace(AS);
936 unsigned Opcode,
Type *InputTypeA,
Type *InputTypeB,
Type *AccumType,
940 return TTIImpl->getPartialReductionCost(Opcode, InputTypeA, InputTypeB,
941 AccumType, VF, OpAExtend, OpBExtend,
947 bool HasUnorderedReductions)
const {
948 return TTIImpl->getMaxInterleaveFactor(VF, HasUnorderedReductions);
962 if (CI->getValue().isPowerOf2())
964 else if (CI->getValue().isNegatedPowerOf2())
974 if (ShuffleInst->isZeroEltSplat())
989 if (CI->getValue().isPowerOf2())
991 else if (CI->getValue().isNegatedPowerOf2())
997 bool AllPow2 =
true, AllNegPow2 =
true;
998 for (uint64_t
I = 0, E = CDS->getNumElements();
I != E; ++
I) {
1000 AllPow2 &= CI->getValue().isPowerOf2();
1001 AllNegPow2 &= CI->getValue().isNegatedPowerOf2();
1002 if (AllPow2 || AllNegPow2)
1005 AllPow2 = AllNegPow2 =
false;
1014 return {OpInfo, OpProps};
1034 if (TLibInfo && Opcode == Instruction::FRem) {
1036 LibFunc Func = TLibInfo->
getLibFunc(Instruction::FRem, Ty->getScalarType());
1037 if (VecTy && Func != NotLibFunc &&
1044 Opcode, Ty,
CostKind, Op1Info, Op2Info, Args, CxtI);
1045 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1050 VectorType *VecTy,
unsigned Opcode0,
unsigned Opcode1,
1053 TTIImpl->getAltInstrCost(VecTy, Opcode0, Opcode1, OpcodeMask,
CostKind);
1054 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1065 "Expected the Mask to match the return size if given");
1067 "Expected the same scalar types");
1069 Kind, DstTy, SrcTy,
CostKind, Mask, Index, SubTp, Args, CxtI, VIC);
1070 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1086 return Instruction::CastOps::ZExt;
1088 return Instruction::CastOps::SExt;
1090 return Instruction::CastOps::FPExt;
1101 case Instruction::CastOps::ZExt:
1103 case Instruction::CastOps::SExt:
1105 case Instruction::CastOps::FPExt:
1118 auto getLoadStoreKind = [](
const Value *V,
unsigned LdStOp,
unsigned MaskedOp,
1119 unsigned GatScatOp) {
1124 if (
I->getOpcode() == LdStOp)
1128 if (
II->getIntrinsicID() == MaskedOp)
1130 if (
II->getIntrinsicID() == GatScatOp)
1137 switch (
I->getOpcode()) {
1138 case Instruction::ZExt:
1139 case Instruction::SExt:
1140 case Instruction::FPExt:
1141 return getLoadStoreKind(
I->getOperand(0), Instruction::Load,
1142 Intrinsic::masked_load, Intrinsic::masked_gather);
1143 case Instruction::Trunc:
1144 case Instruction::FPTrunc:
1146 return getLoadStoreKind(*
I->user_begin(), Instruction::Store,
1147 Intrinsic::masked_store,
1148 Intrinsic::masked_scatter);
1160 assert((
I ==
nullptr ||
I->getOpcode() == Opcode) &&
1161 "Opcode should reflect passed instruction.");
1163 TTIImpl->getCastInstrCost(Opcode, Dst, Src, CCH,
CostKind,
I);
1164 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1172 TTIImpl->getExtractWithExtendCost(Opcode, Dst, VecTy, Index,
CostKind);
1173 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1179 assert((
I ==
nullptr ||
I->getOpcode() == Opcode) &&
1180 "Opcode should reflect passed instruction.");
1182 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1190 assert((
I ==
nullptr ||
I->getOpcode() == Opcode) &&
1191 "Opcode should reflect passed instruction.");
1193 Opcode, ValTy, CondTy, VecPred,
CostKind, Op1Info, Op2Info,
I);
1194 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1201 assert((Opcode == Instruction::InsertElement ||
1202 Opcode == Instruction::ExtractElement) &&
1203 "Expecting Opcode to be insertelement/extractelement.");
1205 TTIImpl->getVectorInstrCost(Opcode, Val,
CostKind, Index, Op0, Op1, VIC);
1206 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1212 Value *Scalar,
ArrayRef<std::tuple<Value *, User *, int>> ScalarUserAndIdx,
1214 assert((Opcode == Instruction::InsertElement ||
1215 Opcode == Instruction::ExtractElement) &&
1216 "Expecting Opcode to be insertelement/extractelement.");
1218 Opcode, Val,
CostKind, Index, Scalar, ScalarUserAndIdx, VIC);
1219 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1230 TTIImpl->getVectorInstrCost(
I, Val,
CostKind, Index, VIC);
1231 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1237 unsigned Index)
const {
1239 TTIImpl->getIndexedVectorInstrCostFromEnd(Opcode, Val,
CostKind, Index);
1240 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1246 assert((Opcode == Instruction::InsertValue ||
1247 Opcode == Instruction::ExtractValue) &&
1248 "Expecting Opcode to be insertvalue/extractvalue.");
1250 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1255 Type *EltTy,
int ReplicationFactor,
int VF,
const APInt &DemandedDstElts,
1258 EltTy, ReplicationFactor, VF, DemandedDstElts,
CostKind);
1259 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1267 assert((
I ==
nullptr ||
I->getOpcode() == Opcode) &&
1268 "Opcode should reflect passed instruction.");
1271 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1278 bool UseMaskForCond,
bool UseMaskForGaps)
const {
1281 UseMaskForCond, UseMaskForGaps);
1282 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1290 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1298 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1307 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1312 return TTIImpl->getNumberOfParts(Tp);
1319 TTIImpl->getAddressComputationCost(PtrTy, SE, Ptr,
CostKind);
1320 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1326 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1331 return TTIImpl->getMaxMemIntrinsicInlineSizeThreshold();
1335 unsigned Opcode,
VectorType *Ty, std::optional<FastMathFlags> FMF,
1338 TTIImpl->getArithmeticReductionCost(Opcode, Ty, FMF,
CostKind);
1339 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1347 TTIImpl->getMinMaxReductionCost(IID, Ty, FMF,
CostKind);
1348 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1355 return TTIImpl->getExtendedReductionCost(Opcode, IsUnsigned, ResTy, Ty, FMF,
1360 bool IsUnsigned,
unsigned RedOpcode,
Type *ResTy,
VectorType *Ty,
1362 return TTIImpl->getMulAccReductionCost(IsUnsigned, RedOpcode, ResTy, Ty,
1368 return TTIImpl->getCostOfKeepingLiveOverCall(Tys);
1373 return TTIImpl->getTgtMemIntrinsic(Inst, Info);
1377 return TTIImpl->getAtomicMemIntrinsicMaxElementSize();
1382 return TTIImpl->getOrCreateResultFromMemIntrinsic(Inst, ExpectedType,
1388 unsigned DestAddrSpace,
Align SrcAlign,
Align DestAlign,
1389 std::optional<uint32_t> AtomicElementSize)
const {
1390 return TTIImpl->getMemcpyLoopLoweringType(Context,
Length, SrcAddrSpace,
1391 DestAddrSpace, SrcAlign, DestAlign,
1397 unsigned RemainingBytes,
unsigned SrcAddrSpace,
unsigned DestAddrSpace,
1399 std::optional<uint32_t> AtomicCpySize)
const {
1400 TTIImpl->getMemcpyLoopResidualLoweringType(
1401 OpsOut, Context, RemainingBytes, SrcAddrSpace, DestAddrSpace, SrcAlign,
1402 DestAlign, AtomicCpySize);
1407 return TTIImpl->areInlineCompatible(Caller, Callee);
1413 unsigned DefaultCallPenalty)
const {
1414 return TTIImpl->getInlineCallPenalty(
F,
Call, DefaultCallPenalty);
1419 return TTIImpl->shouldCopyAttributeWhenOutliningFrom(Caller, Attr);
1424 return TTIImpl->areTypesABICompatible(Caller, Callee, Types);
1429 return TTIImpl->isIndexedLoadLegal(Mode, Ty);
1434 return TTIImpl->isIndexedStoreLegal(Mode, Ty);
1438 return TTIImpl->getLoadStoreVecRegBitWidth(AS);
1442 return TTIImpl->isLegalToVectorizeLoad(LI);
1446 return TTIImpl->isLegalToVectorizeStore(
SI);
1450 unsigned ChainSizeInBytes,
Align Alignment,
unsigned AddrSpace)
const {
1451 return TTIImpl->isLegalToVectorizeLoadChain(ChainSizeInBytes, Alignment,
1456 unsigned ChainSizeInBytes,
Align Alignment,
unsigned AddrSpace)
const {
1457 return TTIImpl->isLegalToVectorizeStoreChain(ChainSizeInBytes, Alignment,
1463 return TTIImpl->isLegalToVectorizeReduction(RdxDesc, VF);
1467 return TTIImpl->isElementTypeLegalForScalableVector(Ty);
1472 unsigned ChainSizeInBytes,
1474 return TTIImpl->getLoadVectorFactor(VF, LoadSize, ChainSizeInBytes, VecTy);
1479 unsigned ChainSizeInBytes,
1481 return TTIImpl->getStoreVectorFactor(VF, StoreSize, ChainSizeInBytes, VecTy);
1485 return TTIImpl->preferFixedOverScalableIfEqualCost();
1490 return TTIImpl->preferInLoopReduction(Kind, Ty);
1494 return TTIImpl->preferAlternateOpcodeVectorization();
1498 return TTIImpl->preferSLPInstCountCheck();
1502 return TTIImpl->preferPredicatedReductionSelect();
1507 return TTIImpl->preferEpilogueVectorization(Iters);
1511 return TTIImpl->shouldConsiderVectorizationRegPressure();
1516 return TTIImpl->getVPLegalizationStrategy(VPI);
1520 return TTIImpl->hasArmWideBranch(Thumb);
1524 return TTIImpl->getFeatureMask(
F);
1528 return TTIImpl->getPriorityMask(
F);
1532 return TTIImpl->isMultiversionedFunction(
F);
1536 return TTIImpl->getMaxNumArgs();
1540 return TTIImpl->shouldExpandReduction(
II);
1546 return TTIImpl->getPreferredExpandedReductionShuffle(
II);
1550 return TTIImpl->getGISelRematGlobalCost();
1554 return TTIImpl->getMinTripCountTailFoldingThreshold();
1558 return TTIImpl->supportsScalableVectors();
1562 return TTIImpl->enableScalableVectorization();
1566 return TTIImpl->hasActiveVectorLength();
1571 return TTIImpl->isProfitableToSinkOperands(
I, OpsToSink);
1575 return TTIImpl->isVectorShiftByScalarCheap(Ty);
1581 return TTIImpl->getNumBytesToPadGlobalArray(
Size,
ArrayType);
1587 return TTIImpl->collectKernelLaunchBounds(
F, LB);
1591 return TTIImpl->allowVectorElementIndexingUsingGEP();
1596 return TTIImpl->isUniform(
I, UniformArgs);
1605 : TTICallback(
std::
move(TTICallback)) {}
1609 assert(!
F.isIntrinsic() &&
"Should not request TTI for intrinsics");
1610 return TTICallback(
F);
1616 return Result(
F.getDataLayout());
1621 "Target Transform Information",
false,
true)
1635 TTI = TIRA.run(
F, DummyFAM);
for(const MachineOperand &MO :llvm::drop_begin(OldMI.operands(), Desc.getNumOperands()))
assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
static GCRegistry::Add< ShadowStackGC > C("shadow-stack", "Very portable GC for uncooperative code generators")
static cl::opt< OutputCostKind > CostKind("cost-kind", cl::desc("Target cost kind"), cl::init(OutputCostKind::RecipThroughput), cl::values(clEnumValN(OutputCostKind::RecipThroughput, "throughput", "Reciprocal throughput"), clEnumValN(OutputCostKind::Latency, "latency", "Instruction latency"), clEnumValN(OutputCostKind::CodeSize, "code-size", "Code size"), clEnumValN(OutputCostKind::SizeAndLatency, "size-latency", "Code size and latency"), clEnumValN(OutputCostKind::All, "all", "Print all cost kinds")))
static cl::opt< bool > ForceNestedLoop("force-nested-hardware-loop", cl::Hidden, cl::init(false), cl::desc("Force allowance of nested hardware loops"))
static cl::opt< bool > ForceHardwareLoopPHI("force-hardware-loop-phi", cl::Hidden, cl::init(false), cl::desc("Force hardware loop counter to be updated through a phi"))
This file provides various utilities for inspecting and working with the control flow graph in LLVM I...
Module.h This file contains the declarations for the Module class.
uint64_t IntrinsicInst * II
#define INITIALIZE_PASS(passName, arg, name, cfg, analysis)
This file defines the SmallVector class.
static TableGen::Emitter::Opt Y("gen-skeleton-entry", EmitSkeleton, "Generate example skeleton entry")
static SymbolRef::Type getType(const Symbol *Sym)
Class for arbitrary precision integers.
an instruction to allocate memory on the stack
This class represents an incoming formal argument to a Function.
Represent a constant reference to an array (0 or more elements consecutively in memory),...
Class to represent array types.
A cache of @llvm.assume calls within a function.
Functions, function parameters, and return types can have attributes to indicate how they should be t...
LLVM Basic Block Representation.
BlockFrequencyInfo pass uses BlockFrequencyInfoImpl implementation to estimate IR basic block frequen...
Base class for all callable instructions (InvokeInst and CallInst) Holds everything related to callin...
User::op_iterator arg_begin()
Return the iterator pointing to the beginning of the argument list.
User::op_iterator arg_end()
Return the iterator pointing to the end of the argument list.
iterator_range< User::op_iterator > args()
Iteration adapter for range-for loops.
Predicate
This enumeration lists the possible predicates for CmpInst subclasses.
Conditional Branch instruction.
This is an important base class in LLVM.
A parsed version of the target data layout string in and methods for querying it.
Concrete subclass of DominatorTreeBase that is used to compute a normal dominator tree.
LLVM_ABI bool dominates(const BasicBlock *BB, const Use &U) const
Return true if the (end of the) basic block BB dominates the use U.
Convenience struct for specifying and reasoning about fast-math flags.
ImmutablePass class - This class is used to provide information that does not need to be run.
The core instruction combiner logic.
Class to represent integer types.
LLVM_ABI IntrinsicCostAttributes(Intrinsic::ID Id, const CallBase &CI, InstructionCost ScalarCost=InstructionCost::getInvalid(), bool TypeBasedOnly=false)
A wrapper class for inspecting calls to intrinsic functions.
This is an important class for using LLVM in a threaded context.
An instruction for reading from memory.
Wrapper class to LoopBlocksDFS that provides a standard begin()/end() interface for the DFS reverse p...
void perform(const LoopInfo *LI)
Traverse the loop blocks and store the DFS result.
LoopT * getLoopFor(const BlockT *BB) const
Return the inner most loop that BB lives in.
Represents a single loop in the control flow graph.
Information for memory intrinsic cost model.
Analysis providing profile information.
The RecurrenceDescriptor is used to identify recurrences variables in a loop.
This class represents a constant integer value.
This class represents an analyzed expression in the program.
The main scalar evolution driver.
LLVM_ABI uint64_t getTypeSizeInBits(Type *Ty) const
Return the size in bits of the specified type, for which isSCEVable must return true.
LLVM_ABI bool isLoopInvariant(const SCEV *S, const Loop *L)
Return true if the value of the given SCEV is unchanging in the specified loop.
LLVM_ABI const SCEV * getExitCount(const Loop *L, const BasicBlock *ExitingBlock, ExitCountKind Kind=Exact)
Return the number of times the backedge executes before the given exit would be taken; if not exactly...
This is a 'bitvector' (really, a variable-sized bit array), optimized for the case when the array is ...
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
StackOffset holds a fixed and a scalable offset in bytes.
An instruction for storing to memory.
Analysis pass providing the TargetTransformInfo.
LLVM_ABI Result run(const Function &F, FunctionAnalysisManager &)
TargetTransformInfo Result
LLVM_ABI TargetIRAnalysis()
Default construct a target IR analysis.
Provides information about what library functions are available for the current target.
StringRef getName(LibFunc F) const
bool isFunctionVectorizable(StringRef F, const ElementCount &VF) const
LibFunc getLibFunc(StringRef funcName) const
Searches for a particular function name.
The instances of the Type class are immutable: once they are created, they are never changed.
static LLVM_ABI IntegerType * getInt32Ty(LLVMContext &C)
Type * getScalarType() const
If this is a vector type, return the element type, otherwise return 'this'.
LLVM_ABI bool isScalableTy() const
Return true if this is a type whose size is a known multiple of vscale.
This is the common base class for vector predication intrinsics.
LLVM Value Representation.
Type * getType() const
All values are typed, get the type of this value.
Base class of all SIMD vector types.
ElementCount getElementCount() const
Return an ElementCount instance to represent the (possibly scalable) number of elements in the vector...
constexpr ScalarTy getKnownMinValue() const
Returns the minimum value this quantity can represent.
An efficient, type-erasing, non-owning reference to a callable.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
initializer< Ty > init(const Ty &Val)
This is an optimization pass for GlobalISel generic memory operations.
@ Known
Known to have no common set bits.
decltype(auto) dyn_cast(const From &Val)
dyn_cast<X> - Return the argument parameter cast to the specified type.
VectorInstrContext
Represents a hint about the context in which a vector instruction or intrinsic is used.
@ None
The instruction is not folded.
@ Load
The value being inserted comes from a load (InsertElement only).
@ Store
The extracted value is stored (ExtractElement only).
LLVM_ABI Value * getSplatValue(const Value *V)
Get splat value if the input is a splat vector or return nullptr.
bool containsIrreducibleCFG(RPOTraversalT &RPOTraversal, const LoopInfoT &LI)
Return true if the control flow in RPOTraversal is irreducible.
bool isa(const From &Val)
isa<X> - Return true if the parameter to the template is an instance of one of the template type argu...
LLVM_ABI ImmutablePass * createTargetTransformInfoWrapperPass(TargetIRAnalysis TIRA)
Create an analysis pass wrapper around a TTI object.
RecurKind
These are the kinds of recurrences that we support.
@ Fast
Assign the register banks as fast as possible (default).
constexpr unsigned BitWidth
OutputIt move(R &&Range, OutputIt Out)
Provide wrappers to std::move which take ranges instead of having to pass begin/end explicitly.
auto predecessors(const MachineBasicBlock *BB)
AnalysisManager< Function > FunctionAnalysisManager
Convenience typedef for the Function analysis manager.
ValueUniformity
Enum describing how values behave with respect to uniformity and divergence, to answer the question: ...
@ NeverUniform
The result value can never be assumed to be uniform.
@ Default
The result value is uniform if and only if all operands are uniform.
Implement std::hash so that hash_code can be used in STL containers.
This struct is a compact representation of a valid (non-zero power of two) alignment.
A special type used by analysis passes to provide an address that identifies that particular analysis...
Attributes of a target dependent hardware loop.
LLVM_ABI bool canAnalyze(LoopInfo &LI)
HardwareLoopInfo()=delete
LLVM_ABI bool isHardwareLoopCandidate(ScalarEvolution &SE, LoopInfo &LI, DominatorTree &DT, bool ForceNestedLoop=false, bool ForceHardwareLoopPHI=false)
Information about a load/store intrinsic defined by the target.