42 return Reg == RHS.Reg &&
Offset == RHS.Offset;
46static std::optional<CFARegOffsetInfo>
49 if (CFALocation.getLocation() !=
59 assert(MaybeLoc &&
"the register should be included in the unwinding row");
62 switch (
Loc.getLocation()) {
78 return {
Loc.getRegister()};
86 : State(Context), Context(Context), MCII(MCII),
87 MCRI(Context->getRegisterInfo()), IsEH(IsEH) {
90 if (MCRI->get(LLVMReg).IsArtificial || MCRI->get(LLVMReg).IsConstant)
93 DWARFRegNum Reg = MCRI->getDwarfRegNum(LLVMReg, IsEH);
103 nullptr, MCRI->getDwarfRegNum(MCRI->getProgramCounter(), IsEH)));
105 for (
auto &&InitialFrameStateCFIDirective :
106 Context->getAsmInfo()->getInitialFrameState())
107 State.update(InitialFrameStateCFIDirective);
109 auto MaybeCurrentRow = State.getCurrentUnwindRow();
110 assert(MaybeCurrentRow &&
"there should be at least one row");
113 "the CFA information should be describable in [reg + offset] in here");
114 auto CFA = *MaybeCFA;
129 auto MaybePrevRow = State.getCurrentUnwindRow();
130 assert(MaybePrevRow &&
"the analysis should have initialized the "
131 "state with at least one row by now");
132 auto PrevRow = *MaybePrevRow;
139 Writes.
insert(MCRI->getDwarfRegNum(
151 auto MaybeNextRow = State.getCurrentUnwindRow();
152 assert(MaybeNextRow &&
"previous row existed, so should the current row");
153 auto NextRow = *MaybeNextRow;
155 checkCFADiff(Inst, PrevRow, NextRow, Writes);
158 DWARFRegNum Reg = MCRI->getDwarfRegNum(LLVMReg, IsEH);
160 checkRegDiff(Inst, Reg, PrevRow, NextRow, Writes);
174 assert(!MaybeNextLoc &&
"the register unwind info suddenly appeared here");
177 assert(MaybeNextLoc &&
"the register unwind info suddenly vanished here");
179 auto PrevLoc = MaybePrevLoc.value();
180 auto NextLoc = MaybeNextLoc.value();
184 if (!(PrevLoc == NextLoc))
185 Context->reportWarning(
187 formatv(
"the dwarf register {0} does not have a LLVM number, but its "
188 "unwind info changed. Ignoring this change",
192 const char *
RegName = MCRI->getName(*MaybeLLVMReg);
202 if (PrevLoc == NextLoc) {
204 if (Writes.
count(UsedReg)) {
205 auto MaybeLLVMUsedReg = MCRI->getLLVMRegNum(UsedReg, IsEH);
206 assert(MaybeLLVMUsedReg &&
"instructions will always write to a "
207 "register that has an LLVM register number");
208 Context->reportError(
210 formatv(
"changed register {1}, that register {0}'s unwinding rule "
211 "uses, but there is no CFI directives about it",
212 RegName, MCRI->getName(*MaybeLLVMUsedReg)));
218 if (PrevLoc.getLocation() != NextLoc.getLocation()) {
219 Context->reportWarning(
221 formatv(
"validating changes happening to register {0} unwinding "
222 "rule structure is not implemented yet",
228 Context->reportWarning(
230 formatv(
"validating changes happening to register {0} unwinding "
231 "rule register set is not implemented yet",
237 if (Writes.
count(UsedReg)) {
238 Context->reportWarning(
240 formatv(
"register {0} unwinding rule's offset is changed, and one of "
241 "the rule's registers is modified, but validating the "
242 "modification amount is not implemented yet",
247 Context->reportError(
248 Inst.
getLoc(),
formatv(
"register {0} unwinding rule's offset is changed, "
249 "but not any of the rule's registers are modified",
253void DWARFCFIAnalysis::checkCFADiff(
const MCInst &Inst,
263 Context->reportWarning(Inst.
getLoc(),
264 "CFA rule changed to [reg + offset], this "
265 "transition will not be checked");
269 Context->reportWarning(Inst.
getLoc(),
270 "CFA rule is not [reg + offset], not checking it");
275 Context->reportWarning(Inst.
getLoc(),
276 "CFA rule changed from [reg + offset], this "
277 "transition will not be checked");
281 auto PrevCFA = *MaybePrevCFA;
282 auto NextCFA = *MaybeNextCFA;
284 auto MaybeLLVMPrevReg = MCRI->getLLVMRegNum(PrevCFA.Reg, IsEH);
285 const char *PrevCFARegName =
286 MaybeLLVMPrevReg ? MCRI->getName(*MaybeLLVMPrevReg) :
"";
287 auto MaybeLLVMNextReg = MCRI->getLLVMRegNum(NextCFA.Reg, IsEH);
288 const char *NextCFARegName =
289 MaybeLLVMNextReg ? MCRI->getName(*MaybeLLVMNextReg) :
"";
291 if (PrevCFA == NextCFA) {
292 if (!Writes.
count(PrevCFA.Reg))
295 Context->reportError(
297 formatv(
"modified CFA register {0} but not changed CFA rule",
302 if (PrevCFA.Reg != NextCFA.Reg) {
303 Context->reportWarning(
305 formatv(
"CFA register changed from register {0} to register {1}, "
306 "validating this change is not implemented yet",
307 PrevCFARegName, NextCFARegName));
311 if (Writes.
count(PrevCFA.Reg)) {
312 Context->reportWarning(
313 Inst.
getLoc(),
formatv(
"CFA offset is changed from {0} to {1}, and CFA "
314 "register {2} is modified, but validating the "
315 "modification amount is not implemented yet",
316 PrevCFA.Offset, NextCFA.Offset, PrevCFARegName));
320 Context->reportError(
322 formatv(
"did not modify CFA register {0} but changed CFA rule",
for(const MachineOperand &MO :llvm::drop_begin(OldMI.operands(), Desc.getNumOperands()))
assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")
static std::optional< CFARegOffsetInfo > getCFARegOffsetInfo(const dwarf::UnwindRow &UnwindRow)
static SmallSet< DWARFRegNum, 4 > getUnwindRuleRegSet(const dwarf::UnwindRow &UnwindRow, DWARFRegNum Reg)
This file declares DWARFCFIAnalysis class.
This file declares DWARFCFIState class.
This file contains helper functions to find and list registers that are tracked by the unwinding info...
This file defines the SmallSet class.
This file defines the SmallVector class.
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
LLVM_ABI void update(const MCInst &Inst, ArrayRef< MCCFIInstruction > Directives)
LLVM_ABI DWARFCFIAnalysis(MCContext *Context, MCInstrInfo const &MCII, bool IsEH, ArrayRef< MCCFIInstruction > Prologue)
static MCCFIInstruction createUndefined(MCSymbol *L, unsigned Register, SMLoc Loc={})
.cfi_undefined From now on the previous value of Register can't be restored anymore.
static MCCFIInstruction createOffset(MCSymbol *L, unsigned Register, int64_t Offset, SMLoc Loc={})
.cfi_offset Previous value of Register is saved at offset Offset from CFA.
static MCCFIInstruction createSameValue(MCSymbol *L, unsigned Register, SMLoc Loc={})
.cfi_same_value Current value of Register is the same as in the previous frame.
Context object for machine code objects.
Instances of this class represent a single low-level machine instruction.
unsigned getNumOperands() const
unsigned getOpcode() const
const MCOperand & getOperand(unsigned i) const
Describe properties that are true of each instruction in the target description file.
unsigned char NumImplicitDefs
unsigned getNumDefs() const
Return the number of MachineOperands that are register definitions.
ArrayRef< MCPhysReg > implicit_defs() const
Return a list of registers that are potentially written by any instance of this machine instruction.
Interface to description of machine instruction set.
std::optional< MCRegister > getLLVMRegNum(uint64_t RegNum, bool isEH) const
Map a dwarf register back to a target register.
SmallSet - This maintains a set of unique values, optimizing for the case when the set is small (less...
size_type count(const T &V) const
count - Return 1 if the element is in the set, 0 otherwise.
std::pair< const_iterator, bool > insert(const T &V)
insert - Insert an element into the set if it isn't already there.
std::optional< UnwindLocation > getRegisterLocation(uint32_t RegNum) const
Return the location for the register in RegNum if there is a location.
@ Undefined
Register is not available and can't be recovered.
@ Constant
Value is a constant value contained in "Offset": reg = Offset.
@ DWARFExpr
Register or CFA value is in or at a value found by evaluating a DWARF expression: reg = eval(dwarf_ex...
@ Same
Register value is in the register, nothing needs to be done to unwind it: reg = reg.
@ CFAPlusOffset
Register is in or at the CFA plus an offset: reg = CFA + offset reg = defef(CFA + offset)
@ Unspecified
Not specified.
@ RegPlusOffset
Register or CFA is in or at a register plus offset, optionally in an address space: reg = reg + offse...
A class that represents a single row in the unwind table that is decoded by parsing the DWARF Call Fr...
UnwindLocation & getCFAValue()
RegisterLocations & getRegisterLocations()
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
This is an optimization pass for GlobalISel generic memory operations.
SmallVector< MCPhysReg > getTrackingRegs(const MCRegisterInfo *MCRI)
auto formatv(bool Validate, const char *Fmt, Ts &&...Vals)
DWARFExpression::Operation Op
MCRegister getSuperReg(const MCRegisterInfo *MCRI, MCRegister Reg)
bool operator==(const CFARegOffsetInfo &RHS) const
CFARegOffsetInfo(DWARFRegNum Reg, int64_t Offset)