LLVM 20.0.0git
Public Types | Public Member Functions | List of all members
llvm::MCInst Class Reference

Instances of this class represent a single low-level machine instruction. More...

#include "llvm/MC/MCInst.h"

Public Types

using iterator = SmallVectorImpl< MCOperand >::iterator
 
using const_iterator = SmallVectorImpl< MCOperand >::const_iterator
 

Public Member Functions

 MCInst ()=default
 
void setOpcode (unsigned Op)
 
unsigned getOpcode () const
 
void setFlags (unsigned F)
 
unsigned getFlags () const
 
void setLoc (SMLoc loc)
 
SMLoc getLoc () const
 
const MCOperand & getOperand (unsigned i) const
 
MCOperand & getOperand (unsigned i)
 
unsigned getNumOperands () const
 
void addOperand (const MCOperand Op)
 
void clear ()
 
void erase (iterator I)
 
void erase (iterator First, iterator Last)
 
size_t size () const
 
iterator begin ()
 
const_iterator begin () const
 
iterator end ()
 
const_iterator end () const
 
iterator insert (iterator I, const MCOperand &Op)
 
void print (raw_ostream &OS, const MCRegisterInfo *RegInfo=nullptr) const
 
void dump () const
 
void dump_pretty (raw_ostream &OS, const MCInstPrinter *Printer=nullptr, StringRef Separator=" ", const MCRegisterInfo *RegInfo=nullptr) const
 Dump the MCInst as prettily as possible using the additional MC structures, if given.
 
void dump_pretty (raw_ostream &OS, StringRef Name, StringRef Separator=" ", const MCRegisterInfo *RegInfo=nullptr) const
 

Detailed Description

Instances of this class represent a single low-level machine instruction.

Definition at line 185 of file MCInst.h.

Member Typedef Documentation

◆ const_iterator

using llvm::MCInst::const_iterator = SmallVectorImpl<MCOperand>::const_iterator

Definition at line 214 of file MCInst.h.

◆ iterator

using llvm::MCInst::iterator = SmallVectorImpl<MCOperand>::iterator

Definition at line 213 of file MCInst.h.

Constructor & Destructor Documentation

◆ MCInst()

llvm::MCInst::MCInst ( )
default

Member Function Documentation

◆ addOperand()

void llvm::MCInst::addOperand ( const MCOperand  Op)
inline

Definition at line 211 of file MCInst.h.

References Operands.

Referenced by llvm::X86Operand::addAbsMemOperands(), llvm::HexagonMCInstrInfo::addConstExtender(), llvm::MCInstBuilder::addDFPImm(), llvm::X86Operand::addDstIdxOperands(), llvm::MCInstBuilder::addExpr(), llvm::X86Operand::addExpr(), XtensaOperand::addExpr(), llvm::X86Operand::addGR16orGR32orGR64Operands(), llvm::X86Operand::addGR32orGR64Operands(), llvm::MCInstBuilder::addImm(), llvm::MCInstBuilder::addInst(), llvm::X86Operand::addMaskPairOperands(), llvm::X86Operand::addMemOffsOperands(), llvm::X86Operand::addMemOperands(), addNegOperand(), llvm::MCInstBuilder::addOperand(), addOperand(), addOps(), addOpsFromMDNode(), addOptionalImmOperand(), llvm::MCInstBuilder::addReg(), llvm::X86Operand::addRegOperands(), XtensaOperand::addRegOperands(), llvm::MCInstBuilder::addSFPImm(), llvm::X86Operand::addSrcIdxOperands(), llvm::addStringImm(), llvm::X86Operand::addTILEPairOperands(), convertSSEToAVX(), llvm::HexagonMCShuffler::copyTo(), Decode2RImmInstruction(), Decode2RUSInstruction(), Decode3RImmInstruction(), DecodeACC64DSPRegisterClass(), DecodeAddiur2Simm7(), DecodeAddrMode2IdxInstruction(), DecodeAddrMode3Instruction(), DecodeAddrMode5FP16Operand(), DecodeAddrMode5Operand(), DecodeAddrMode6Operand(), DecodeAddrModeImm12Operand(), DecodeAddSubERegInstruction(), DecodeAddSubImmShift(), DecodeAdrInstruction(), DecodeAFGR64RegisterClass(), DecodeANDI16Imm(), DecodeArmMOVTWInstruction(), DecodeARRegisterClass(), DecodeASRRegsRegisterClass(), decodeB4constOperand(), decodeB4constuOperand(), DecodeBankedReg(), DecodeBFAfterTargetOperand(), DecodeBFLabelOperand(), DecodeBitfieldMaskOperand(), DecodeBitpOperand(), DecodeBranchImmInstruction(), decodeBranchOperand(), DecodeBranchTarget(), DecodeBranchTarget10MM(), DecodeBranchTarget1SImm16(), DecodeBranchTarget21(), DecodeBranchTarget21MM(), DecodeBranchTarget26(), DecodeBranchTarget26MM(), DecodeBranchTarget7MM(), DecodeBranchTargetMM(), DecodeCacheeOp_CacheOpR6(), DecodeCacheOp(), DecodeCacheOpMM(), decodeCallOperand(), decodeCallTarget(), DecodeCCOutOperand(), DecodeCCRRegisterClass(), DecodeCCRU6Instruction(), DecodeCFRRegisterClass(), DecodeCLRMGPRRegisterClass(), decodeCLUIImmOperand(), decodeCondBranch(), decodeCondBrTarget(), DecodeCOP0RegisterClass(), DecodeCOP2RegisterClass(), DecodeCopMemInstruction(), DecodeCoprocessor(), DecodeCoprocPairRegisterClass(), DecodeCoprocRegsRegisterClass(), DecodeCPSInstruction(), decodeCRBitMOperand(), DecodeCtrRegs64RegisterClass(), DecodeCtrRegsRegisterClass(), DecodeDFPRegsRegisterClass(), decodeDirectBrTarget(), decodeDispRIHashOperand(), decodeDispRIX16Operand(), decodeDispRIXOperand(), decodeDispSPE2Operand(), decodeDispSPE4Operand(), decodeDispSPE8Operand(), DecodeDPairRegisterClass(), DecodeDPairSpacedRegisterClass(), DecodeDPRRegisterClass(), DecodeF128RegisterClass(), DecodeF32RegisterClass(), decodeFBRk(), DecodeFCCRegisterClass(), DecodeFCCRegsRegisterClass(), DecodeFCSRRegisterClass(), DecodeFGR32RegisterClass(), DecodeFGR64RegisterClass(), DecodeFGRCCRegisterClass(), decodeFIOARr(), decodeFIOBIT(), decodeFIORdA(), DecodeFixedPointScaleImm32(), DecodeFixedPointScaleImm64(), decodeFLPMX(), DecodeFMem(), DecodeFMem2(), DecodeFMem3(), DecodeFMemCop2MMR6(), DecodeFMemCop2R6(), DecodeFMemMMR2(), DecodeFMOVLaneInstruction(), DecodeForVMRSandVMSR(), DecodeFPR16RegisterClass(), DecodeFPR32CRegisterClass(), DecodeFPR32RegisterClass(), DecodeFPR64CRegisterClass(), DecodeFPR64RegisterClass(), DecodeFPRegsRegisterClass(), decodeFRMArg(), DecodeFromCyclicRange(), decodeFWRdK(), DecodeGPR32RegisterClass(), DecodeGPR64RegisterClass(), DecodeGPR64x8ClassRegisterClass(), DecodeGPR8RegisterClass(), DecodeGPRCRegisterClass(), DecodeGPRF16RegisterClass(), DecodeGPRF32RegisterClass(), DecodeGPRMM16MovePRegisterClass(), DecodeGPRMM16RegisterClass(), DecodeGPRMM16ZeroRegisterClass(), DecodeGPRPairnospRegisterClass(), DecodeGPRPairRegisterClass(), DecodeGPRRegisterClass(), DecodeGPRSeqPairsClassRegisterClass(), DecodeGPRSPRegisterClass(), DecodeGPRspRegisterClass(), DecodeGPRwithAPSR_NZCVnospRegisterClass(), DecodeGPRwithAPSRRegisterClass(), DecodeGPRwithZRRegisterClass(), DecodeGPRX1X5RegisterClass(), DecodeGRRegsRegisterClass(), DecodeGuestRegs64RegisterClass(), DecodeGuestRegsRegisterClass(), DecodeHI32DSPRegisterClass(), DecodeHINTInstruction(), DecodeHWRegsRegisterClass(), DecodeI32RegisterClass(), DecodeI64RegisterClass(), decodeImm12Operand(), decodeImm1_16Operand(), decodeImm1n_15Operand(), DecodeImm32(), decodeImm32n_95Operand(), decodeImm8_sh8Operand(), decodeImm8Operand(), DecodeImm8OptLsl(), decodeImmShiftOpValue(), decodeImmZeroOperand(), DecodeInsSize(), DecodeInstSyncBarrierOption(), DecodeIntPairRegisterClass(), DecodeIntRegsRegisterClass(), DecodeIT(), decodeJMPIXImmOperand(), decodeJumpOperand(), DecodeJumpTarget(), DecodeJumpTargetMM(), DecodeJumpTargetXMM(), DecodeL2RUSInstruction(), decodeL32ROperand(), DecodeLASX256RegisterClass(), DecodeLazyLoadStoreMul(), DecodeLD8RegisterClass(), DecodeLdLImmInstruction(), DecodeLdRLImmInstruction(), decodeLenOperand(), DecodeLi16Imm(), DecodeLO32DSPRegisterClass(), DecodeLoadByte15(), decodeLoadStore(), DecodeLogicalImmInstruction(), DecodeLOLoop(), DecodeLongShiftOperand(), decodeLRW16Imm8(), DecodeLSX128RegisterClass(), DecodeMatrixTile(), DecodeMatrixTileListRegisterClass(), DecodeMem(), decodeMem16Operand(), decodeMem32nOperand(), decodeMem32Operand(), decodeMem8Operand(), DecodeMemBarrierOption(), DecodeMemEVA(), DecodeMemExtend(), DecodeMemMMGPImm7Lsl2(), DecodeMemMMImm12(), DecodeMemMMImm16(), DecodeMemMMImm4(), DecodeMemMMImm9(), DecodeMemMMReglistImm4Lsl2(), DecodeMemMMSPImm5Lsl2(), DecodeMemMultipleWritebackInstruction(), decodeMemoryOpValue(), decodeMemri(), DecodeMEMrs9(), DecodemGPRRegisterClass(), DecodeMISCRegisterClass(), DecodeModImmInstruction(), DecodeModImmTiedInstruction(), DecodeModRegsRegisterClass(), DecodeMoveHRegInstruction(), DecodeMoveImmInstruction(), DecodeMovePRegPair(), DecodeMQPRRegisterClass(), DecodeMQQPRRegisterClass(), DecodeMQQQQPRRegisterClass(), DecodeMRSSystemRegister(), DecodeMSA128BRegisterClass(), DecodeMSA128DRegisterClass(), DecodeMSA128HRegisterClass(), DecodeMSA128Mem(), DecodeMSA128WRegisterClass(), DecodeMSACtrlRegisterClass(), DecodeMSRMask(), DecodeMSRSystemRegister(), DecodeMveAddrModeQ(), DecodeMVEModImmInstruction(), DecodeMVEOverlappingLongShift(), DecodeMVEPairVectorIndexOperand(), DecodeMVEVADCInstruction(), DecodeMVEVCMP(), DecodeMveVCTP(), DecodeMVEVPNOT(), DecodeNegImmOperand(), DecodeNEONComplexLane64Instruction(), decodeOImmOperand(), DecodePairLdStInstruction(), decodePCDBLOperand(), DecodePCRelLabel16(), DecodePCRelLabel19(), DecodePCRelLabel9(), DecodePOOL16BEncodedField(), DecodePostIdxReg(), DecodePowerTwoOperand(), DecodePPR2Mul2RegisterClass(), DecodePredicateOperand(), decodePredicateOperand(), DecodePredNoALOperand(), DecodePrefeOpMM(), DecodePRFMRegInstruction(), DecodePRRegsRegisterClass(), DecodeQFPRegsRegisterClass(), DecodeQPRRegisterClass(), decodeRegisterClass(), DecodeRegisterClass(), DecodeRegListOperand(), DecodeRegListOperand16(), DecodeRegSeqOperand(), DecodeRegSeqOperandD1(), DecodeRegSeqOperandD2(), DecodeRegSeqOperandF1(), DecodeRegSeqOperandF2(), DecodeRestrictedFPPredicateOperand(), DecodeRestrictedIPredicateOperand(), DecodeRestrictedSPredicateOperand(), DecodeRestrictedUPredicateOperand(), DecodeRFEInstruction(), DecoderForMRRC2AndMCRR2(), decodeRiMemoryValue(), DecodeRRegsRegisterClass(), decodeRrMemoryValue(), decodeRTZArg(), DecodeRUSInstruction(), decodeRVCInstrRdRs1ImmZero(), decodeRVCInstrRdRs1Rs2(), decodeRVCInstrRdRs1UImm(), decodeRVCInstrRdSImm(), DecodeSCRRegisterClass(), DecodeSETPANInstruction(), DecodesFPR128RegisterClass(), DecodesFPR32RegisterClass(), DecodesFPR64_VRegisterClass(), DecodesFPR64RegisterClass(), DecodesGPRRegisterClass(), decodeShiftImm(), DecodeShiftRight16Imm(), DecodeShiftRight32Imm(), DecodeShiftRight64Imm(), DecodeShiftRight8Imm(), decodeShimm1_31Operand(), DecodeSignedLdStInstruction(), DecodeSignedOperand(), DecodeSImm(), DecodeSimm18Lsl3(), DecodeSimm19Lsl2(), DecodeSimm23Lsl2(), DecodeSimm9SP(), decodeSImmOperand(), decodeSImmOperandAndLsl1(), DecodeSImmWithOffsetAndScale(), DecodeSimpleRegisterClass(), DecodeSOPwithRS12(), DecodeSOPwithRU6(), DecodeSORegImmOperand(), DecodeSORegMemOperand(), DecodeSORegRegOperand(), DecodeSpecial3LlSc(), decodeSplsValue(), DecodeSPRRegisterClass(), DecodeSR07RegisterClass(), DecodeSRRegisterClass(), DecodeStLImmInstruction(), DecodeSVCROp(), DecodeSVEIncDecImm(), DecodeSVELogicalImmInstruction(), DecodeSymbolicOperandOff(), DecodeSyncI(), DecodeSyncI_MM(), DecodeSynciR6(), DecodeSyspXzrInstruction(), DecodeSysRegs64RegisterClass(), DecodeSysRegsRegisterClass(), DecodeSystemPStateImm0_15Instruction(), DecodeSystemPStateImm0_1Instruction(), DecodeT2AddrModeImm0_1020s4(), DecodeT2AddrModeImm12(), DecodeT2AddrModeSOReg(), DecodeT2AddSubSPImm(), DecodeT2Adr(), DecodeT2BInstruction(), DecodeT2BROperand(), DecodeT2CPSInstruction(), DecodeT2HintSpaceInstruction(), DecodeT2Imm7(), DecodeT2Imm7S4(), DecodeT2Imm8(), DecodeT2Imm8S4(), DecodeT2LoadLabel(), DecodeT2MOVTWInstruction(), DecodeT2ShifterImmOperand(), DecodeT2SOImm(), DecodetcGPRRegisterClass(), DecodeTestAndBranch(), DecodetGPREvenRegisterClass(), DecodetGPROddRegisterClass(), DecodeThreeAddrSRegInstruction(), DecodeThumbAddrModeIS(), DecodeThumbAddrModePC(), DecodeThumbAddrModeSP(), DecodeThumbAddSpecialReg(), DecodeThumbAddSPImm(), DecodeThumbAddSPReg(), DecodeThumbBCCTargetOperand(), DecodeThumbBLTargetOperand(), DecodeThumbBLXOffset(), DecodeThumbBROperand(), DecodeThumbCmpBROperand(), DecodeThumbCPS(), DecodeTSBInstruction(), decodeUimm4Operand(), decodeUimm5Operand(), decodeUImmLog2XLenOperand(), decodeUImmOperand(), DecodeUImmWithOffsetAndScale(), DecodeUnconditionalBranch(), DecodeUnsignedLdStInstruction(), DecodeV64RegisterClass(), DecodeVCVTD(), DecodeVCVTImmOperand(), DecodeVCVTQ(), DecodeVecShiftLImm(), DecodeVecShiftRImm(), DecodeVLD1DupInstruction(), DecodeVLD1LN(), DecodeVLD2DupInstruction(), DecodeVLD2LN(), DecodeVLD3DupInstruction(), DecodeVLD3LN(), DecodeVLD4DupInstruction(), DecodeVLD4LN(), DecodeVLDInstruction(), DecodeVM512RegisterClass(), decodeVMaskReg(), DecodeVMOVModImmInstruction(), DecodeVMRegisterClass(), DecodeVPTMaskOperand(), DecodeVRM2RegisterClass(), DecodeVRM4RegisterClass(), DecodeVRM8RegisterClass(), DecodeVRRegisterClass(), DecodeVSCCLRM(), DecodeVSHLMaxInstruction(), decodeVSRpEvenOperands(), DecodeVST1LN(), DecodeVST2LN(), DecodeVST3LN(), DecodeVST4LN(), DecodeVSTInstruction(), DecodeVSTRVLDR_SYSREG(), decodeXTHeadMemPair(), decodeZcmpRlist(), decodeZcmpSpimm(), DecodeZK(), DecodeZPR2Mul2RegisterClass(), DecodeZPR4Mul4RegisterClass(), DecodeZPRMul2_MinMax(), llvm::HexagonMCInstrInfo::deriveDuplex(), llvm::HexagonMCInstrInfo::deriveExtender(), EmitBinary(), emitBinary(), emitBSIC(), llvm::MipsTargetELFStreamer::emitDirectiveCpLoad(), llvm::MipsTargetELFStreamer::emitDirectiveCpreturn(), llvm::MipsTargetStreamer::emitII(), llvm::ARMAsmPrinter::emitInstruction(), llvm::HexagonAsmPrinter::emitInstruction(), emitLEASLrri(), emitLEASLzzi(), emitLEAzii(), emitLEAzzi(), llvm::MipsTargetStreamer::emitR(), EmitRDPC(), llvm::MipsTargetStreamer::emitRRIII(), llvm::MipsTargetStreamer::emitRRRX(), llvm::MipsTargetStreamer::emitRRX(), llvm::MipsTargetStreamer::emitRX(), EmitSETHI(), emitSIC(), llvm::HexagonAsmPrinter::EmitSled(), getCompoundInsn(), llvm::ARMInstrInfo::getNop(), llvm::HexagonLowerToMC(), llvm::HexagonAsmPrinter::HexagonProcessInstruction(), llvm::BTFDebug::InstLower(), llvm::AArch64MCInstLower::Lower(), AMDGPUMCInstLower::lower(), llvm::ARCMCInstLower::Lower(), llvm::BPFMCInstLower::Lower(), llvm::CSKYMCInstLower::Lower(), llvm::LanaiMCInstLower::Lower(), llvm::M68kMCInstLower::Lower(), llvm::MipsMCInstLower::Lower(), llvm::MSP430MCInstLower::Lower(), llvm::SystemZMCInstLower::lower(), llvm::WebAssemblyMCInstLower::lower(), llvm::XCoreMCInstLower::Lower(), llvm::SPIRVMCInstLower::lower(), lowerAlignmentHint(), llvm::LowerARMMachineInstrToMCInst(), llvm::AVRMCInstLower::lowerInstruction(), llvm::lowerLoongArchMachineInstrToMCInst(), llvm::LowerPPCMachineInstrToMCInst(), lowerRISCVVMachineInstrToMCInst(), llvm::LowerSparcMachineInstrToMCInst(), llvm::XtensaAsmPrinter::lowerToMCInst(), llvm::LowerVEMachineInstrToMCInst(), makeCombineInst(), llvm::HexagonMCInstrInfo::padEndloop(), llvm::ARMInstPrinter::printInst(), llvm::ARMAsmBackend::relaxInstruction(), llvm::CSKYAsmBackend::relaxInstruction(), llvm::RISCVAsmBackend::relaxInstruction(), translateDstIndex(), translateFPRegister(), translateImmediate(), translateMaskRegister(), translateOperand(), translateRegister(), translateRMMemory(), translateSrcIndex(), and llvm::AMDGPUSymbolizer::tryAddingSymbolicOperand().

◆ begin() [1/2]

iterator llvm::MCInst::begin ( )
inline

Definition at line 220 of file MCInst.h.

References Operands.

Referenced by lookForCompound(), llvm::WebAssemblyMCInstLower::lower(), llvm::Hexagon::PacketIterator::operator++(), and llvm::HexagonMCInstrInfo::replaceDuplex().

◆ begin() [2/2]

const_iterator llvm::MCInst::begin ( ) const
inline

Definition at line 221 of file MCInst.h.

References Operands.

◆ clear()

void llvm::MCInst::clear ( )
inline

Definition at line 216 of file MCInst.h.

References Operands.

Referenced by llvm::HexagonMCShuffler::copyTo(), DecodeL5RInstructionFail(), llvm::MipsTargetELFStreamer::emitDirectiveCpLoad(), llvm::HexagonAsmPrinter::HexagonProcessInstruction(), and translateInstruction().

◆ dump()

LLVM_DUMP_METHOD void MCInst::dump ( ) const

Definition at line 107 of file MCInst.cpp.

References llvm::dbgs(), and print().

Referenced by llvm::CSKYAsmBackend::relaxInstruction(), and llvm::HexagonMCShuffler::reshuffleTo().

◆ dump_pretty() [1/2]

void MCInst::dump_pretty ( raw_ostream &  OS,
const MCInstPrinter *  Printer = nullptr,
StringRef  Separator = " ",
const MCRegisterInfo *  RegInfo = nullptr 
) const

Dump the MCInst as prettily as possible using the additional MC structures, if given.

Operators are separated by the Separator string.

Definition at line 84 of file MCInst.cpp.

References dump_pretty(), getOpcode(), OS, and Printer.

Referenced by dump_pretty(), and llvm::ARMAsmBackend::relaxInstruction().

◆ dump_pretty() [2/2]

void MCInst::dump_pretty ( raw_ostream &  OS,
StringRef  Name,
StringRef  Separator = " ",
const MCRegisterInfo *  RegInfo = nullptr 
) const

Definition at line 91 of file MCInst.cpp.

References getNumOperands(), getOpcode(), getOperand(), Name, OS, and llvm::MCOperand::print().

◆ end() [1/2]

iterator llvm::MCInst::end ( )
inline

Definition at line 222 of file MCInst.h.

References Operands.

Referenced by DecodeRegListOperand(), lookForCompound(), and llvm::Hexagon::PacketIterator::operator++().

◆ end() [2/2]

const_iterator llvm::MCInst::end ( ) const
inline

Definition at line 223 of file MCInst.h.

References Operands.

◆ erase() [1/2]

void llvm::MCInst::erase ( iterator  First,
iterator  Last 
)
inline

Definition at line 218 of file MCInst.h.

References llvm::First, llvm::Last, and Operands.

◆ erase() [2/2]

void llvm::MCInst::erase ( iterator  I)
inline

Definition at line 217 of file MCInst.h.

References I, and Operands.

Referenced by lookForCompound(), removeRegisterOperands(), and llvm::HexagonMCInstrInfo::replaceDuplex().

◆ getFlags()

unsigned llvm::MCInst::getFlags ( ) const
inline

Definition at line 202 of file MCInst.h.

Referenced by llvm::mca::hashMCInst().

◆ getLoc()

SMLoc llvm::MCInst::getLoc ( ) const
inline

Definition at line 205 of file MCInst.h.

Referenced by llvm::HexagonMCInstrInfo::addConstExtender(), llvm::HexagonMCInstrInfo::deriveSubInst(), llvm::MCObjectStreamer::emitInstruction(), llvm::HexagonMCChecker::reportError(), llvm::HexagonMCChecker::reportWarning(), llvm::HexagonShuffler::restrictNoSlot1Store(), and llvm::HexagonShuffler::restrictSlot1AOK().

◆ getNumOperands()

unsigned llvm::MCInst::getNumOperands ( ) const
inline

Definition at line 209 of file MCInst.h.

References Operands.

Referenced by checkLowRegisterList(), decodeAVLdSt(), DecodeT2Adr(), dump_pretty(), llvm::MCStreamer::emitInstruction(), llvm::MipsELFStreamer::emitInstruction(), llvm::HexagonMCELFStreamer::EmitSymbol(), llvm::X86_MC::X86MCInstrAnalysis::evaluateBranch(), llvm::HexagonMCInstrInfo::getDuplexPossibilties(), llvm::mca::hashMCInst(), llvm::HexagonMCInstrInfo::isOrderedDuplexPair(), llvm::isPartOfGOTToPCRelPair(), listContainsReg(), AMDGPUMCInstLower::lower(), llvm::M68kMCInstLower::Lower(), LowerLargeShift(), lowerRISCVVMachineInstrToMCInst(), print(), removeRegisterOperands(), ScaleVectorOffset(), and llvm::mca::verifyOperands().

◆ getOpcode()

unsigned llvm::MCInst::getOpcode ( ) const
inline

Definition at line 199 of file MCInst.h.

Referenced by checkWriteLane(), llvm::X86_MC::X86MCInstrAnalysis::clearsSuperRegisters(), llvm::TargetSchedModel::computeInstrLatency(), convertSSEToAVX(), llvm::mca::InstrBuilder::createInstruction(), llvm::mca::RISCVInstrumentManager::createInstruments(), cvtVOP3DstOpSelOnly(), DecodeAddrMode2IdxInstruction(), DecodeAddrMode3Instruction(), DecodeAddSubERegInstruction(), DecodeArmMOVTWInstruction(), DecodeAuthLoadInstruction(), decodeAVLdSt(), DecodeBranchImmInstruction(), decodeBranchOperand(), DecodeCopMemInstruction(), DecodeExclusiveLdStInstruction(), DecodeForVMRSandVMSR(), DecodeLogicalImmInstruction(), DecodeLOLoop(), DecodeMem(), DecodeMemEVA(), DecodeMemMMImm12(), DecodeMemMMImm4(), DecodeMemMMImm9(), DecodeMemMMReglistImm4Lsl2(), DecodeMemMultipleWritebackInstruction(), DecodeModImmInstruction(), DecodeMoveImmInstruction(), DecodeMSA128Mem(), DecodeMSRMask(), DecodeMVEModImmInstruction(), DecodeMVEOverlappingLongShift(), DecodePairLdStInstruction(), DecodePCRelLabel19(), DecodePredicateOperand(), DecodePRFMRegInstruction(), DecodeRegListOperand(), DecodeRegListOperand16(), DecoderForMRRC2AndMCRR2(), DecodeSignedLdStInstruction(), DecodeSpecial3LlSc(), DecodeSVELogicalImmInstruction(), DecodeT2AddrModeImm12(), DecodeT2AddrModeImm8(), DecodeT2AddrModeSOReg(), DecodeT2LdStPre(), DecodeT2LoadImm12(), DecodeT2LoadImm8(), DecodeT2LoadLabel(), DecodeT2LoadShift(), DecodeT2LoadT(), DecodeT2MOVTWInstruction(), DecodeTBLInstruction(), DecodeThreeAddrSRegInstruction(), DecodeThumbAddSpecialReg(), DecodeThumbAddSPReg(), DecodeTSBInstruction(), DecodeUnsignedLdStInstruction(), DecodeVCVTImmOperand(), DecodeVLD1DupInstruction(), DecodeVLD2DupInstruction(), DecodeVLDInstruction(), DecodeVMOVModImmInstruction(), llvm::AMDGPUDisassembler::decodeVOPDDstYOp(), DecodeVSCCLRM(), DecodeVSTInstruction(), DecodeVSTRVLDR_SYSREG(), decodeXTHeadMemPair(), llvm::HexagonMCInstrInfo::deriveSubInst(), dump_pretty(), llvm::AsmPrinter::emitFunctionBody(), llvm::HexagonMCELFStreamer::emitInstruction(), llvm::MipsMCCodeEmitter::encodeInstruction(), llvm::X86_MC::X86MCInstrAnalysis::evaluateBranch(), llvm::X86_MC::X86MCInstrAnalysis::evaluateMemoryOperandAddress(), getCompoundOp(), llvm::HexagonMCInstrInfo::getDesc(), llvm::HexagonMCInstrInfo::getDuplexCandidateGroup(), llvm::HexagonMCInstrInfo::getDuplexPossibilties(), llvm::X86_MC::X86MCInstrAnalysis::getMemoryOperandRelocationOffset(), llvm::HexagonMCInstrInfo::getName(), llvm::MCSchedModel::getReciprocalThroughput(), getRegisterForMxtrDSP(), getRelaxedOpcode(), getRelaxedOpcodeArith(), getRelaxedOpcodeBranch(), llvm::mca::InstrumentManager::getSchedClassID(), llvm::mca::RISCVInstrumentManager::getSchedClassID(), llvm::HexagonMCInstrInfo::getType(), llvm::mca::hashMCInst(), hasShortDelaySlot(), llvm::HexagonMCInstrInfo::hasTmpDst(), llvm::HexagonLowerToMC(), llvm::HexagonAsmPrinter::HexagonProcessInstruction(), instIsBreakpoint(), IsAGPROperand(), llvm::MCInstrAnalysis::isBranch(), llvm::HexagonMCInstrInfo::isBundle(), llvm::MCInstrAnalysis::isCall(), llvm::MCInstrAnalysis::isConditionalBranch(), llvm::HexagonMCInstrInfo::isConstExtended(), isFirstMacroFusibleInst(), llvm::HexagonMCInstrInfo::isImmext(), llvm::MCInstrAnalysis::isIndirectBranch(), isOrderedCompoundPair(), llvm::HexagonMCInstrInfo::isOrderedDuplexPair(), llvm::isPartOfGOTToPCRelPair(), llvm::MCInstrAnalysis::isReturn(), llvm::HexagonMCInstrInfo::isSolo(), llvm::HexagonMCInstrInfo::isSubInstruction(), llvm::MCInstrAnalysis::isTerminator(), llvm::MCInstrAnalysis::isUnconditionalBranch(), lookForCompound(), llvm::AArch64MCInstLower::Lower(), LowerLargeShift(), lowerRISCVVMachineInstrToMCInst(), llvm::MCInstrAnalysis::mayAffectControlFlow(), llvm::ARMAsmBackend::mayNeedRelaxation(), llvm::CSKYAsmBackend::mayNeedRelaxation(), llvm::RISCVAsmBackend::mayNeedRelaxation(), PermitsD32(), llvm::mca::AMDGPUInstrPostProcess::postProcessInstruction(), print(), llvm::ARMAsmBackend::relaxInstruction(), llvm::CSKYAsmBackend::relaxInstruction(), llvm::RISCVAsmBackend::relaxInstruction(), removeRegisterOperands(), llvm::HexagonMCInstrInfo::requiresSlot(), ScaleVectorOffset(), llvm::HexagonMCInstrInfo::subInstWouldBeExtended(), translateInstruction(), and llvm::WebAssemblyAsmTypeCheck::typeCheck().

◆ getOperand() [1/2]

MCOperand & llvm::MCInst::getOperand ( unsigned  i)
inline

Definition at line 208 of file MCInst.h.

References Operands.

◆ getOperand() [2/2]

const MCOperand & llvm::MCInst::getOperand ( unsigned  i) const
inline

Definition at line 207 of file MCInst.h.

References Operands.

Referenced by llvm::HexagonMCInstrInfo::addConstExtender(), addOps(), llvm::adjustPqBits(), checkLowRegisterList(), checkWriteLane(), llvm::X86_MC::X86MCInstrAnalysis::clearsSuperRegisters(), convertSSEToAVX(), llvm::mca::InstrBuilder::createInstruction(), llvm::mca::RISCVInstrumentManager::createInstruments(), cvtVOP3DstOpSelOnly(), DecodeBFAfterTargetOperand(), DecodeInsSize(), DecodeMoveImmInstruction(), DecodeRegListOperand(), decodeRVCInstrRdRs1ImmZero(), decodeRVCInstrRdRs1Rs2(), decodeRVCInstrRdRs1UImm(), llvm::AMDGPUDisassembler::decodeVOPDDstYOp(), llvm::HexagonMCInstrInfo::deriveSubInst(), dump_pretty(), llvm::MCStreamer::emitInstruction(), llvm::MipsELFStreamer::emitInstruction(), llvm::HexagonMCELFStreamer::EmitSymbol(), llvm::X86_MC::X86MCInstrAnalysis::evaluateBranch(), evaluateMemOpAddrForAddrMode3(), evaluateMemOpAddrForAddrMode5(), evaluateMemOpAddrForAddrMode5FP16(), evaluateMemOpAddrForAddrMode_i12(), evaluateMemOpAddrForAddrModeT2_i8s4(), evaluateMemOpAddrForAddrModeT2_pc(), llvm::X86_MC::X86MCInstrAnalysis::evaluateMemoryOperandAddress(), llvm::HexagonMCInstrInfo::extenderForIndex(), getCompoundOp(), llvm::HexagonMCInstrInfo::getDuplexCandidateGroup(), llvm::HexagonMCInstrInfo::getDuplexPossibilties(), llvm::HexagonMCInstrInfo::getExtendableOperand(), llvm::X86_MC::X86MCInstrAnalysis::getMemoryOperandRelocationOffset(), llvm::HexagonMCInstrInfo::getNewValueOperand(), llvm::HexagonMCInstrInfo::getNewValueOperand2(), getRegisterForMxtrC0(), getRegisterForMxtrDSP(), getRegisterForMxtrFP(), llvm::mca::hashMCInst(), hasShortDelaySlot(), llvm::HexagonAsmPrinter::HexagonProcessInstruction(), llvm::HexagonMCInstrInfo::instruction(), IsAGPROperand(), llvm::HexagonMCInstrInfo::isBundle(), llvm::HexagonMCInstrInfo::isInnerLoop(), llvm::HexagonMCInstrInfo::isMemReorderDisabled(), isOrderedCompoundPair(), llvm::HexagonMCInstrInfo::isOrderedDuplexPair(), llvm::HexagonMCInstrInfo::isOuterLoop(), llvm::isPartOfGOTToPCRelPair(), llvm::HexagonMCInstrInfo::isPredRegister(), listContainsReg(), LowerLargeShift(), llvm::HexagonMCInstrInfo::minConstant(), needsExpandMemInst(), llvm::HexagonMCInstrInfo::predicateInfo(), print(), llvm::HexagonInstPrinter::printInst(), llvm::CSKYAsmBackend::relaxInstruction(), llvm::RISCVAsmBackend::relaxInstruction(), removeRegisterOperands(), llvm::HexagonMCInstrInfo::replaceDuplex(), ScaleVectorOffset(), llvm::HexagonMCInstrInfo::setInnerLoop(), llvm::HexagonMCInstrInfo::setMemReorderDisabled(), llvm::HexagonMCInstrInfo::setOuterLoop(), llvm::HexagonMCInstrInfo::subInstWouldBeExtended(), llvm::WebAssemblyAsmTypeCheck::typeCheck(), and llvm::mca::verifyOperands().

◆ insert()

iterator llvm::MCInst::insert ( iterator  I,
const MCOperand &  Op 
)
inline

Definition at line 225 of file MCInst.h.

References I, and Operands.

Referenced by llvm::WebAssemblyMCInstLower::lower().

◆ print()

void MCInst::print ( raw_ostream &  OS,
const MCRegisterInfo *  RegInfo = nullptr 
) const

Definition at line 75 of file MCInst.cpp.

References getNumOperands(), getOpcode(), getOperand(), OS, and llvm::MCOperand::print().

Referenced by dump().

◆ setFlags()

void llvm::MCInst::setFlags ( unsigned  F)
inline

Definition at line 201 of file MCInst.h.

References F.

Referenced by llvm::SPIRVMCInstLower::lower().

◆ setLoc()

void llvm::MCInst::setLoc ( SMLoc  loc)
inline

Definition at line 204 of file MCInst.h.

Referenced by llvm::HexagonMCInstrInfo::addConstExtender(), llvm::HexagonMCShuffler::copyTo(), llvm::MipsTargetStreamer::emitII(), llvm::MipsTargetStreamer::emitR(), llvm::MipsTargetStreamer::emitRRIII(), llvm::MipsTargetStreamer::emitRRRX(), llvm::MipsTargetStreamer::emitRRX(), llvm::MipsTargetStreamer::emitRX(), and llvm::MCInstBuilder::setLoc().

◆ setOpcode()

void llvm::MCInst::setOpcode ( unsigned  Op)
inline

Definition at line 198 of file MCInst.h.

Referenced by convertSSEToAVX(), Decode2OpInstructionFail(), DecodeBranchImmInstruction(), decodeCondBranch(), DecodeCPSInstruction(), decodeFBRk(), DecodeL2OpInstructionFail(), DecodeL5RInstructionFail(), decodeLoadStore(), DecodeLOLoop(), DecodeMemMultipleWritebackInstruction(), DecodeMVEOverlappingLongShift(), DecodeSETPANInstruction(), DecodeT2AddSubSPImm(), DecodeT2Adr(), DecodeT2CPSInstruction(), DecodeT2HintSpaceInstruction(), DecodeT2LdStPre(), DecodeT2LoadImm12(), DecodeT2LoadImm8(), DecodeT2LoadLabel(), DecodeT2LoadShift(), DecodeT2LoadT(), DecodeThumb2BCCInstruction(), DecodeVCVTD(), DecodeVCVTQ(), llvm::HexagonMCInstrInfo::deriveDuplex(), llvm::HexagonMCInstrInfo::deriveExtender(), llvm::X86AsmPrinter::emitBasicBlockEnd(), EmitBinary(), emitBinary(), emitBSIC(), llvm::MipsTargetELFStreamer::emitDirectiveCpLoad(), llvm::MipsTargetELFStreamer::emitDirectiveCpreturn(), llvm::MipsTargetStreamer::emitII(), llvm::ARMAsmPrinter::emitInstruction(), llvm::HexagonAsmPrinter::emitInstruction(), emitLEASLrri(), emitLEASLzzi(), emitLEAzii(), emitLEAzzi(), llvm::MipsTargetStreamer::emitR(), EmitRDPC(), llvm::MipsTargetStreamer::emitRRIII(), llvm::MipsTargetStreamer::emitRRRX(), llvm::MipsTargetStreamer::emitRRX(), llvm::MipsTargetStreamer::emitRX(), EmitSETHI(), emitSIC(), llvm::HexagonAsmPrinter::EmitSled(), llvm::MipsMCCodeEmitter::encodeInstruction(), getCompoundInsn(), getMIMnemonic(), llvm::ARMInstrInfo::getNop(), llvm::PPCInstrInfo::getNop(), llvm::X86InstrInfo::getNop(), llvm::HexagonLowerToMC(), llvm::HexagonAsmPrinter::HexagonProcessInstruction(), llvm::BTFDebug::InstLower(), llvm::AArch64MCInstLower::Lower(), AMDGPUMCInstLower::lower(), llvm::ARCMCInstLower::Lower(), llvm::BPFMCInstLower::Lower(), llvm::CSKYMCInstLower::Lower(), llvm::LanaiMCInstLower::Lower(), llvm::M68kMCInstLower::Lower(), llvm::MipsMCInstLower::Lower(), llvm::MSP430MCInstLower::Lower(), llvm::SystemZMCInstLower::lower(), llvm::WebAssemblyMCInstLower::lower(), llvm::XCoreMCInstLower::Lower(), llvm::SPIRVMCInstLower::lower(), lowerAlignmentHint(), llvm::LowerARMMachineInstrToMCInst(), llvm::AVRMCInstLower::lowerInstruction(), LowerLargeShift(), llvm::lowerLoongArchMachineInstrToMCInst(), llvm::LowerPPCMachineInstrToMCInst(), lowerRISCVVMachineInstrToMCInst(), llvm::LowerSparcMachineInstrToMCInst(), llvm::XtensaAsmPrinter::lowerToMCInst(), llvm::LowerVEMachineInstrToMCInst(), makeCombineInst(), llvm::MCInstBuilder::MCInstBuilder(), llvm::HexagonMCInstrInfo::padEndloop(), llvm::ARMInstPrinter::printInst(), llvm::ARMAsmBackend::relaxInstruction(), llvm::CSKYAsmBackend::relaxInstruction(), llvm::RISCVAsmBackend::relaxInstruction(), removeRegisterOperands(), and translateInstruction().

◆ size()

size_t llvm::MCInst::size ( ) const
inline

Definition at line 219 of file MCInst.h.

References Operands.

Referenced by llvm::HexagonMCInstrInfo::bundleSize(), llvm::HexagonMCInstrInfo::isBundle(), llvm::HexagonMCInstrInfo::minConstant(), llvm::HexagonMCInstrInfo::replaceDuplex(), and llvm::HexagonMCInstrInfo::tryCompound().

The documentation for this class was generated from the following files:
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