LLVM 20.0.0git
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#include "llvm/ADT/BitVector.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/ADT/iterator_range.h"
#include "llvm/CodeGen/TargetRegisterInfo.h"
#include "llvm/MC/LaneBitmask.h"
#include "llvm/MC/MCRegister.h"
#include <cassert>
#include <cstdint>
#include <map>
#include <set>
#include <vector>
Go to the source code of this file.
Classes | |
struct | llvm::rdf::IndexedSet< T, N > |
struct | llvm::rdf::RegisterRef |
struct | llvm::rdf::PhysicalRegisterInfo |
struct | llvm::rdf::RegisterAggr |
struct | llvm::rdf::RegisterAggr::ref_iterator |
struct | llvm::rdf::RegisterAggrMap< KeyType > |
struct | llvm::rdf::PrintLaneMaskShort |
struct | std::hash< llvm::rdf::RegisterRef > |
struct | std::hash< llvm::rdf::RegisterAggr > |
struct | std::equal_to< llvm::rdf::RegisterRef > |
struct | std::equal_to< llvm::rdf::RegisterAggr > |
struct | std::less< llvm::rdf::RegisterRef > |
Namespaces | |
namespace | llvm |
This is an optimization pass for GlobalISel generic memory operations. | |
namespace | llvm::rdf |
namespace | std |
Implement std::hash so that hash_code can be used in STL containers. | |
Typedefs | |
using | llvm::rdf::RegisterId = uint32_t |
Functions | |
template<typename T > | |
bool | llvm::rdf::disjoint (const std::set< T > &A, const std::set< T > &B) |
raw_ostream & | llvm::rdf::operator<< (raw_ostream &OS, const RegisterAggr &A) |
raw_ostream & | llvm::rdf::operator<< (raw_ostream &OS, const PrintLaneMaskShort &P) |