LLVM 20.0.0git
XtensaRegisterInfo.h
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1//===-- XtensaRegisterInfo.h - Xtensa Register Information Impl -*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file contains the Xtensa implementation of the TargetRegisterInfo class.
10//
11//===----------------------------------------------------------------------===//
12
13#ifndef LLVM_LIB_TARGET_XTENSA_XTENSAREGISTERINFO_H
14#define LLVM_LIB_TARGET_XTENSA_XTENSAREGISTERINFO_H
15
16#include "Xtensa.h"
18
19#define GET_REGINFO_HEADER
20#include "XtensaGenRegisterInfo.inc"
21
22namespace llvm {
23class TargetRegisterClass;
24class XtensaInstrInfo;
25class XtensaSubtarget;
26
28public:
30
32
33 bool requiresRegisterScavenging(const MachineFunction &MF) const override {
34 return true;
35 }
36
37 bool requiresFrameIndexScavenging(const MachineFunction &MF) const override {
38 return true;
39 }
40
41 const uint16_t *
42 getCalleeSavedRegs(const MachineFunction *MF = 0) const override;
44 CallingConv::ID) const override;
45 BitVector getReservedRegs(const MachineFunction &MF) const override;
46
48 unsigned FIOperandNum,
49 RegScavenger *RS = nullptr) const override;
50
51 Register getFrameRegister(const MachineFunction &MF) const override;
52};
53
54} // end namespace llvm
55
56#endif // LLVM_LIB_TARGET_XTENSA_REGISTERINFO_H
IRTranslator LLVM IR MI
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
const uint16_t * getCalleeSavedRegs(const MachineFunction *MF=0) const override
bool requiresFrameIndexScavenging(const MachineFunction &MF) const override
bool eliminateFrameIndex(MachineBasicBlock::iterator MI, int SPAdj, unsigned FIOperandNum, RegScavenger *RS=nullptr) const override
const XtensaSubtarget & Subtarget
const uint32_t * getCallPreservedMask(const MachineFunction &MF, CallingConv::ID) const override
Register getFrameRegister(const MachineFunction &MF) const override
BitVector getReservedRegs(const MachineFunction &MF) const override
bool requiresRegisterScavenging(const MachineFunction &MF) const override
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18