addBlockPlacement() | llvm::TargetPassConfig | protectedvirtual |
addCheckDebugPass() | llvm::TargetPassConfig | |
addCodeGenPrepare() | llvm::TargetPassConfig | virtual |
addCoreISelPasses() | llvm::TargetPassConfig | protected |
addDebugifyPass() | llvm::TargetPassConfig | |
addFastRegAlloc() | llvm::TargetPassConfig | protectedvirtual |
addGCPasses() | llvm::TargetPassConfig | protectedvirtual |
addGlobalInstructionSelect() | llvm::TargetPassConfig | inlinevirtual |
addILPOpts() | llvm::TargetPassConfig | inlineprotectedvirtual |
addInstSelector() | llvm::TargetPassConfig | inlinevirtual |
addIRPasses() | llvm::TargetPassConfig | virtual |
addIRTranslator() | llvm::TargetPassConfig | inlinevirtual |
addISelPasses() | llvm::TargetPassConfig | |
addISelPrepare() | llvm::TargetPassConfig | virtual |
addLegalizeMachineIR() | llvm::TargetPassConfig | inlinevirtual |
addMachineLateOptimization() | llvm::TargetPassConfig | protectedvirtual |
addMachinePasses() | llvm::TargetPassConfig | virtual |
addMachinePostPasses(const std::string &Banner) | llvm::TargetPassConfig | |
addMachinePrePasses(bool AllowDebugify=true) | llvm::TargetPassConfig | |
addMachineSSAOptimization() | llvm::TargetPassConfig | protectedvirtual |
addOptimizedRegAlloc() | llvm::TargetPassConfig | protectedvirtual |
addPass(AnalysisID PassID) | llvm::TargetPassConfig | protected |
addPass(Pass *P) | llvm::TargetPassConfig | protected |
addPassesToHandleExceptions() | llvm::TargetPassConfig | |
addPostBBSections() | llvm::TargetPassConfig | inlineprotectedvirtual |
addPostFastRegAllocRewrite() | llvm::TargetPassConfig | inlineprotectedvirtual |
addPostRegAlloc() | llvm::TargetPassConfig | inlineprotectedvirtual |
addPostRewrite() | llvm::TargetPassConfig | inlineprotectedvirtual |
addPreEmitPass() | llvm::TargetPassConfig | inlineprotectedvirtual |
addPreEmitPass2() | llvm::TargetPassConfig | inlineprotectedvirtual |
addPreGlobalInstructionSelect() | llvm::TargetPassConfig | inlinevirtual |
addPreISel() | llvm::TargetPassConfig | inlineprotectedvirtual |
addPreLegalizeMachineIR() | llvm::TargetPassConfig | inlinevirtual |
addPreRegAlloc() | llvm::TargetPassConfig | inlineprotectedvirtual |
addPreRegBankSelect() | llvm::TargetPassConfig | inlinevirtual |
addPreRewrite() | llvm::TargetPassConfig | inlineprotectedvirtual |
addPreSched2() | llvm::TargetPassConfig | inlineprotectedvirtual |
addPrintPass(const std::string &Banner) | llvm::TargetPassConfig | |
addRegAssignAndRewriteFast() | llvm::TargetPassConfig | protectedvirtual |
addRegAssignAndRewriteOptimized() | llvm::TargetPassConfig | protectedvirtual |
addRegBankSelect() | llvm::TargetPassConfig | inlinevirtual |
addStripDebugPass() | llvm::TargetPassConfig | |
addVerifyPass(const std::string &Banner) | llvm::TargetPassConfig | |
assignPassManager(PMStack &PMS, PassManagerType T) override | llvm::ModulePass | virtual |
createMachineScheduler(MachineSchedContext *C) const | llvm::TargetPassConfig | inlinevirtual |
createPass(AnalysisID ID) | llvm::Pass | static |
createPostMachineScheduler(MachineSchedContext *C) const | llvm::TargetPassConfig | inlinevirtual |
createPrinterPass(raw_ostream &OS, const std::string &Banner) const override | llvm::ModulePass | virtual |
createRegAllocPass(bool Optimized) | llvm::TargetPassConfig | protectedvirtual |
createTargetRegisterAllocator(bool Optimized) | llvm::TargetPassConfig | protectedvirtual |
disablePass(AnalysisID PassID) | llvm::TargetPassConfig | inline |
DisableVerify | llvm::TargetPassConfig | protected |
doFinalization(Module &) | llvm::Pass | inlinevirtual |
doInitialization(Module &) | llvm::Pass | inlinevirtual |
dump() const | llvm::Pass | |
dumpPassStructure(unsigned Offset=0) | llvm::Pass | virtual |
EnableLoopTermFold | llvm::TargetPassConfig | protected |
enablePass(AnalysisID PassID) | llvm::TargetPassConfig | inline |
EnableSinkAndFold | llvm::TargetPassConfig | protected |
EnableTailMerge | llvm::TargetPassConfig | protected |
getAdjustedAnalysisPointer(AnalysisID ID) | llvm::Pass | virtual |
getAnalysis() const | llvm::Pass | |
getAnalysis(Function &F, bool *Changed=nullptr) | llvm::Pass | |
getAnalysisID(AnalysisID PI) const | llvm::Pass | |
getAnalysisID(AnalysisID PI, Function &F, bool *Changed=nullptr) | llvm::Pass | |
getAnalysisIfAvailable() const | llvm::Pass | |
getAnalysisUsage(AnalysisUsage &) const | llvm::Pass | virtual |
getAsImmutablePass() override | llvm::ImmutablePass | inlinevirtual |
getAsPMDataManager() | llvm::Pass | virtual |
getCSEConfig() const | llvm::TargetPassConfig | virtual |
getEnableSinkAndFold() const | llvm::TargetPassConfig | inline |
getEnableTailMerge() const | llvm::TargetPassConfig | inline |
getLimitedCodeGenPipelineReason() | llvm::TargetPassConfig | static |
getOptimizeRegAlloc() const | llvm::TargetPassConfig | |
getOptLevel() const | llvm::TargetPassConfig | |
getPassID() const | llvm::Pass | inline |
getPassKind() const | llvm::Pass | inline |
getPassName() const | llvm::Pass | virtual |
getPassSubstitution(AnalysisID StandardID) const | llvm::TargetPassConfig | |
getPotentialPassManagerType() const override | llvm::ModulePass | virtual |
getResolver() const | llvm::Pass | inline |
getStartStopInfo(PassInstrumentationCallbacks &PIC) | llvm::TargetPassConfig | static |
getTM() const | llvm::TargetPassConfig | inline |
hasLimitedCodeGenPipeline() | llvm::TargetPassConfig | static |
ID | llvm::TargetPassConfig | static |
ImmutablePass(char &pid) | llvm::ImmutablePass | inlineexplicit |
Impl | llvm::TargetPassConfig | protected |
Initialized | llvm::TargetPassConfig | protected |
initializePass() | llvm::ImmutablePass | virtual |
insertPass(AnalysisID TargetPassID, IdentifyingPassPtr InsertedPassID) | llvm::TargetPassConfig | |
isCustomizedRegAlloc() | llvm::TargetPassConfig | protected |
isGISelCSEEnabled() const | llvm::TargetPassConfig | virtual |
isGlobalISelAbortEnabled() const | llvm::TargetPassConfig | |
isPassSubstitutedOrOverridden(AnalysisID ID) const | llvm::TargetPassConfig | |
lookupPassInfo(const void *TI) | llvm::Pass | static |
lookupPassInfo(StringRef Arg) | llvm::Pass | static |
ModulePass(char &pid) | llvm::ModulePass | inlineexplicit |
mustPreserveAnalysisID(char &AID) const | llvm::Pass | |
operator=(const Pass &)=delete | llvm::Pass | |
Pass(PassKind K, char &pid) | llvm::Pass | inlineexplicit |
Pass(const Pass &)=delete | llvm::Pass | |
preparePassManager(PMStack &) | llvm::Pass | virtual |
print(raw_ostream &OS, const Module *M) const | llvm::Pass | virtual |
printAndVerify(const std::string &Banner) | llvm::TargetPassConfig | |
releaseMemory() | llvm::Pass | virtual |
reportDiagnosticWhenGlobalISelFallback() const | llvm::TargetPassConfig | virtual |
RequireCodeGenSCCOrder | llvm::TargetPassConfig | protected |
requiresCodeGenSCCOrder() const | llvm::TargetPassConfig | inline |
runOnModule(Module &) override | llvm::ImmutablePass | inlinevirtual |
setDisableVerify(bool Disable) | llvm::TargetPassConfig | inline |
setEnableSinkAndFold(bool Enable) | llvm::TargetPassConfig | inline |
setEnableTailMerge(bool Enable) | llvm::TargetPassConfig | inline |
setInitialized() | llvm::TargetPassConfig | inline |
setOpt(bool &Opt, bool Val) | llvm::TargetPassConfig | protected |
setRequiresCodeGenSCCOrder(bool Enable=true) | llvm::TargetPassConfig | inline |
setResolver(AnalysisResolver *AR) | llvm::Pass | |
skipModule(Module &M) const | llvm::ModulePass | protected |
substitutePass(AnalysisID StandardID, IdentifyingPassPtr TargetID) | llvm::TargetPassConfig | |
TargetPassConfig(TargetMachine &TM, PassManagerBase &PM) | llvm::TargetPassConfig | |
TargetPassConfig() | llvm::TargetPassConfig | |
TM | llvm::TargetPassConfig | protected |
usingDefaultRegAlloc() const | llvm::TargetPassConfig | |
verifyAnalysis() const | llvm::Pass | virtual |
willCompleteCodeGenPipeline() | llvm::TargetPassConfig | static |
~ImmutablePass() override | llvm::ImmutablePass | |
~ModulePass() override | llvm::ModulePass | |
~Pass() | llvm::Pass | virtual |
~TargetPassConfig() override | llvm::TargetPassConfig | |