LLVM 20.0.0git
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ARMII - This namespace holds all of the target specific flags that instruction info tracks. More...
Enumerations | |
enum | IndexMode { IndexModeNone = 0 , IndexModePre = 1 , IndexModePost = 2 , IndexModeUpd = 3 } |
ARM Index Modes. More... | |
enum | AddrMode { AddrModeNone = 0 , AddrMode1 = 1 , AddrMode2 = 2 , AddrMode3 = 3 , AddrMode4 = 4 , AddrMode5 = 5 , AddrMode6 = 6 , AddrModeT1_1 = 7 , AddrModeT1_2 = 8 , AddrModeT1_4 = 9 , AddrModeT1_s = 10 , AddrModeT2_i12 = 11 , AddrModeT2_i8 = 12 , AddrModeT2_i8pos = 13 , AddrModeT2_i8neg = 14 , AddrModeT2_so = 15 , AddrModeT2_pc = 16 , AddrModeT2_i8s4 = 17 , AddrMode_i12 = 18 , AddrMode5FP16 = 19 , AddrModeT2_ldrex = 20 , AddrModeT2_i7s4 = 21 , AddrModeT2_i7s2 = 22 , AddrModeT2_i7 = 23 } |
ARM Addressing Modes. More... | |
enum | TOF { MO_NO_FLAG = 0 , MO_LO16 = 0x1 , MO_HI16 = 0x2 , MO_OPTION_MASK = 0xf03 , MO_COFFSTUB = 0x4 , MO_GOT = 0x8 , MO_SBREL = 0x10 , MO_DLLIMPORT = 0x20 , MO_SECREL = 0x40 , MO_NONLAZY = 0x80 , MO_LO_0_7 = 0x100 , MO_LO_8_15 = 0x200 , MO_HI_0_7 = 0x400 , MO_HI_8_15 = 0x800 } |
Target Operand Flag enum. More... | |
enum | { AddrModeMask = 0x1f , IndexModeShift = 5 , IndexModeMask = 3 << IndexModeShift , FormShift = 7 , FormMask = 0x3f << FormShift , Pseudo = 0 << FormShift , MulFrm = 1 << FormShift , BrFrm = 2 << FormShift , BrMiscFrm = 3 << FormShift , DPFrm = 4 << FormShift , DPSoRegFrm = 5 << FormShift , LdFrm = 6 << FormShift , StFrm = 7 << FormShift , LdMiscFrm = 8 << FormShift , StMiscFrm = 9 << FormShift , LdStMulFrm = 10 << FormShift , LdStExFrm = 11 << FormShift , ArithMiscFrm = 12 << FormShift , SatFrm = 13 << FormShift , ExtFrm = 14 << FormShift , VFPUnaryFrm = 15 << FormShift , VFPBinaryFrm = 16 << FormShift , VFPConv1Frm = 17 << FormShift , VFPConv2Frm = 18 << FormShift , VFPConv3Frm = 19 << FormShift , VFPConv4Frm = 20 << FormShift , VFPConv5Frm = 21 << FormShift , VFPLdStFrm = 22 << FormShift , VFPLdStMulFrm = 23 << FormShift , VFPMiscFrm = 24 << FormShift , ThumbFrm = 25 << FormShift , MiscFrm = 26 << FormShift , NGetLnFrm = 27 << FormShift , NSetLnFrm = 28 << FormShift , NDupFrm = 29 << FormShift , NLdStFrm = 30 << FormShift , N1RegModImmFrm = 31 << FormShift , N2RegFrm = 32 << FormShift , NVCVTFrm = 33 << FormShift , NVDupLnFrm = 34 << FormShift , N2RegVShLFrm = 35 << FormShift , N2RegVShRFrm = 36 << FormShift , N3RegFrm = 37 << FormShift , N3RegVShFrm = 38 << FormShift , NVExtFrm = 39 << FormShift , NVMulSLFrm = 40 << FormShift , NVTBLFrm = 41 << FormShift , N3RegCplxFrm = 43 << FormShift , UnaryDP = 1 << 13 , Xform16Bit = 1 << 14 , ThumbArithFlagSetting = 1 << 19 , ValidForTailPredication = 1 << 20 , RetainsPreviousHalfElement = 1 << 21 , HorizontalReduction = 1 << 22 , DoubleWidthResult = 1 << 23 , VecSizeShift = 24 , VecSize = 3 << VecSizeShift , DomainShift = 15 , DomainMask = 15 << DomainShift , DomainGeneral = 0 << DomainShift , DomainVFP = 1 << DomainShift , DomainNEON = 2 << DomainShift , DomainNEONA8 = 4 << DomainShift , DomainMVE = 8 << DomainShift , ShiftTypeShift = 4 , M_BitShift = 5 , ShiftImmShift = 5 , ShiftShift = 7 , N_BitShift = 7 , ImmHiShift = 8 , SoRotImmShift = 8 , RegRsShift = 8 , ExtRotImmShift = 10 , RegRdLoShift = 12 , RegRdShift = 12 , RegRdHiShift = 16 , RegRnShift = 16 , S_BitShift = 20 , W_BitShift = 21 , AM3_I_BitShift = 22 , D_BitShift = 22 , U_BitShift = 23 , P_BitShift = 24 , I_BitShift = 25 , CondShift = 28 } |
Functions | |
static const char * | AddrModeToString (AddrMode addrmode) |
ARMII - This namespace holds all of the target specific flags that instruction info tracks.
anonymous enum |
Definition at line 313 of file ARMBaseInfo.h.
ARM Addressing Modes.
Definition at line 185 of file ARMBaseInfo.h.
ARM Index Modes.
Enumerator | |
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IndexModeNone | |
IndexModePre | |
IndexModePost | |
IndexModeUpd |
Definition at line 177 of file ARMBaseInfo.h.
enum llvm::ARMII::TOF |
Target Operand Flag enum.
Definition at line 242 of file ARMBaseInfo.h.
Definition at line 212 of file ARMBaseInfo.h.
References AddrMode1, AddrMode2, AddrMode3, AddrMode4, AddrMode5, AddrMode5FP16, AddrMode6, AddrMode_i12, AddrModeNone, AddrModeT1_1, AddrModeT1_2, AddrModeT1_4, AddrModeT1_s, AddrModeT2_i12, AddrModeT2_i7, AddrModeT2_i7s2, AddrModeT2_i7s4, AddrModeT2_i8, AddrModeT2_i8neg, AddrModeT2_i8pos, AddrModeT2_i8s4, AddrModeT2_ldrex, AddrModeT2_pc, and AddrModeT2_so.