llvm::amdhsa Namespace Reference

Classes
struct	kernel_descriptor_t

Enumerations
enum	: uint8_t { FLOAT_ROUND_MODE_NEAR_EVEN = 0 , FLOAT_ROUND_MODE_PLUS_INFINITY = 1 , FLOAT_ROUND_MODE_MINUS_INFINITY = 2 , FLOAT_ROUND_MODE_ZERO = 3 }
enum	: uint8_t { FLOAT_DENORM_MODE_FLUSH_SRC_DST = 0 , FLOAT_DENORM_MODE_FLUSH_DST = 1 , FLOAT_DENORM_MODE_FLUSH_SRC = 2 , FLOAT_DENORM_MODE_FLUSH_NONE = 3 }
enum	: uint8_t { SYSTEM_VGPR_WORKITEM_ID_X = 0 , SYSTEM_VGPR_WORKITEM_ID_X_Y = 1 , SYSTEM_VGPR_WORKITEM_ID_X_Y_Z = 2 , SYSTEM_VGPR_WORKITEM_ID_UNDEFINED = 3 }
enum	: int32_t {   COMPUTE_PGM_RSRC1 =(GRANULATED_WORKITEM_VGPR_COUNT, 0, 6) , COMPUTE_PGM_RSRC1 =(GRANULATED_WORKITEM_VGPR_COUNT, 0, 6) , COMPUTE_PGM_RSRC1 =(GRANULATED_WORKITEM_VGPR_COUNT, 0, 6) , COMPUTE_PGM_RSRC1 =(GRANULATED_WORKITEM_VGPR_COUNT, 0, 6) ,   COMPUTE_PGM_RSRC1 =(GRANULATED_WORKITEM_VGPR_COUNT, 0, 6) , COMPUTE_PGM_RSRC1 =(GRANULATED_WORKITEM_VGPR_COUNT, 0, 6) , COMPUTE_PGM_RSRC1 =(GRANULATED_WORKITEM_VGPR_COUNT, 0, 6) , COMPUTE_PGM_RSRC1 =(GRANULATED_WORKITEM_VGPR_COUNT, 0, 6) ,   COMPUTE_PGM_RSRC1_GFX6_GFX11 =(ENABLE_DX10_CLAMP, 21, 1) , COMPUTE_PGM_RSRC1_GFX12_PLUS =(ENABLE_WG_RR_EN, 21, 1) , COMPUTE_PGM_RSRC1 =(GRANULATED_WORKITEM_VGPR_COUNT, 0, 6) , COMPUTE_PGM_RSRC1_GFX6_GFX11 =(ENABLE_DX10_CLAMP, 21, 1) ,   COMPUTE_PGM_RSRC1_GFX12_PLUS =(ENABLE_WG_RR_EN, 21, 1) , COMPUTE_PGM_RSRC1 =(GRANULATED_WORKITEM_VGPR_COUNT, 0, 6) , COMPUTE_PGM_RSRC1 =(GRANULATED_WORKITEM_VGPR_COUNT, 0, 6) , COMPUTE_PGM_RSRC1_GFX6_GFX8 =(RESERVED0, 26, 1) ,   COMPUTE_PGM_RSRC1_GFX9_PLUS =(FP16_OVFL, 26, 1) , COMPUTE_PGM_RSRC1 =(GRANULATED_WORKITEM_VGPR_COUNT, 0, 6) , COMPUTE_PGM_RSRC1_GFX6_GFX9 =(RESERVED2, 29, 3) , COMPUTE_PGM_RSRC1_GFX10_PLUS =(WGP_MODE, 29, 1) ,   COMPUTE_PGM_RSRC1_GFX10_PLUS =(WGP_MODE, 29, 1) , COMPUTE_PGM_RSRC1_GFX10_PLUS =(WGP_MODE, 29, 1) }
enum	: int32_t {   COMPUTE_PGM_RSRC2 =(ENABLE_PRIVATE_SEGMENT, 0, 1) , COMPUTE_PGM_RSRC2 =(ENABLE_PRIVATE_SEGMENT, 0, 1) , COMPUTE_PGM_RSRC2_GFX6_GFX11 =(ENABLE_TRAP_HANDLER, 6, 1) , COMPUTE_PGM_RSRC2_GFX12_PLUS =(RESERVED1, 6, 1) ,   COMPUTE_PGM_RSRC2 =(ENABLE_PRIVATE_SEGMENT, 0, 1) , COMPUTE_PGM_RSRC2 =(ENABLE_PRIVATE_SEGMENT, 0, 1) , COMPUTE_PGM_RSRC2 =(ENABLE_PRIVATE_SEGMENT, 0, 1) , COMPUTE_PGM_RSRC2 =(ENABLE_PRIVATE_SEGMENT, 0, 1) ,   COMPUTE_PGM_RSRC2 =(ENABLE_PRIVATE_SEGMENT, 0, 1) , COMPUTE_PGM_RSRC2 =(ENABLE_PRIVATE_SEGMENT, 0, 1) , COMPUTE_PGM_RSRC2 =(ENABLE_PRIVATE_SEGMENT, 0, 1) , COMPUTE_PGM_RSRC2 =(ENABLE_PRIVATE_SEGMENT, 0, 1) ,   COMPUTE_PGM_RSRC2 =(ENABLE_PRIVATE_SEGMENT, 0, 1) , COMPUTE_PGM_RSRC2 =(ENABLE_PRIVATE_SEGMENT, 0, 1) , COMPUTE_PGM_RSRC2 =(ENABLE_PRIVATE_SEGMENT, 0, 1) , COMPUTE_PGM_RSRC2 =(ENABLE_PRIVATE_SEGMENT, 0, 1) ,   COMPUTE_PGM_RSRC2 =(ENABLE_PRIVATE_SEGMENT, 0, 1) , COMPUTE_PGM_RSRC2 =(ENABLE_PRIVATE_SEGMENT, 0, 1) , COMPUTE_PGM_RSRC2 =(ENABLE_PRIVATE_SEGMENT, 0, 1) , COMPUTE_PGM_RSRC2 =(ENABLE_PRIVATE_SEGMENT, 0, 1) }
enum	: int32_t { COMPUTE_PGM_RSRC3_GFX90A =(ACCUM_OFFSET, 0, 6) , COMPUTE_PGM_RSRC3_GFX90A =(ACCUM_OFFSET, 0, 6) , COMPUTE_PGM_RSRC3_GFX90A =(ACCUM_OFFSET, 0, 6) , COMPUTE_PGM_RSRC3_GFX90A =(ACCUM_OFFSET, 0, 6) }
enum	: int32_t {   COMPUTE_PGM_RSRC3_GFX10_GFX11 =(SHARED_VGPR_COUNT, 0, 4) , COMPUTE_PGM_RSRC3_GFX12_PLUS =(RESERVED0, 0, 4) , COMPUTE_PGM_RSRC3_GFX10 =(RESERVED1, 4, 8) , COMPUTE_PGM_RSRC3_GFX11 =(INST_PREF_SIZE, 4, 6) ,   COMPUTE_PGM_RSRC3_GFX11 =(INST_PREF_SIZE, 4, 6) , COMPUTE_PGM_RSRC3_GFX11 =(INST_PREF_SIZE, 4, 6) , COMPUTE_PGM_RSRC3_GFX12_PLUS =(RESERVED0, 0, 4) , COMPUTE_PGM_RSRC3_GFX10_PLUS =(RESERVED2, 12, 1) ,   COMPUTE_PGM_RSRC3_GFX10_GFX11 =(SHARED_VGPR_COUNT, 0, 4) , COMPUTE_PGM_RSRC3_GFX12_PLUS =(RESERVED0, 0, 4) , COMPUTE_PGM_RSRC3_GFX10_PLUS =(RESERVED2, 12, 1) , COMPUTE_PGM_RSRC3_GFX10 =(RESERVED1, 4, 8) ,   COMPUTE_PGM_RSRC3_GFX11_PLUS =(IMAGE_OP, 31, 1) }
enum	: int32_t {   KERNEL_CODE_PROPERTY =(ENABLE_SGPR_PRIVATE_SEGMENT_BUFFER, 0, 1) , KERNEL_CODE_PROPERTY =(ENABLE_SGPR_PRIVATE_SEGMENT_BUFFER, 0, 1) , KERNEL_CODE_PROPERTY =(ENABLE_SGPR_PRIVATE_SEGMENT_BUFFER, 0, 1) , KERNEL_CODE_PROPERTY =(ENABLE_SGPR_PRIVATE_SEGMENT_BUFFER, 0, 1) ,   KERNEL_CODE_PROPERTY =(ENABLE_SGPR_PRIVATE_SEGMENT_BUFFER, 0, 1) , KERNEL_CODE_PROPERTY =(ENABLE_SGPR_PRIVATE_SEGMENT_BUFFER, 0, 1) , KERNEL_CODE_PROPERTY =(ENABLE_SGPR_PRIVATE_SEGMENT_BUFFER, 0, 1) , KERNEL_CODE_PROPERTY =(ENABLE_SGPR_PRIVATE_SEGMENT_BUFFER, 0, 1) ,   KERNEL_CODE_PROPERTY =(ENABLE_SGPR_PRIVATE_SEGMENT_BUFFER, 0, 1) , KERNEL_CODE_PROPERTY =(ENABLE_SGPR_PRIVATE_SEGMENT_BUFFER, 0, 1) , KERNEL_CODE_PROPERTY =(ENABLE_SGPR_PRIVATE_SEGMENT_BUFFER, 0, 1) }
enum	: int32_t { KERNARG_PRELOAD_SPEC =(LENGTH, 0, 7) , KERNARG_PRELOAD_SPEC =(LENGTH, 0, 7) }
enum	: uint32_t {   GROUP_SEGMENT_FIXED_SIZE_OFFSET = 0 , PRIVATE_SEGMENT_FIXED_SIZE_OFFSET = 4 , KERNARG_SIZE_OFFSET = 8 , RESERVED0_OFFSET = 12 ,   KERNEL_CODE_ENTRY_BYTE_OFFSET_OFFSET = 16 , RESERVED1_OFFSET = 24 , COMPUTE_PGM_RSRC3_OFFSET = 44 , COMPUTE_PGM_RSRC1_OFFSET = 48 ,   COMPUTE_PGM_RSRC2_OFFSET = 52 , KERNEL_CODE_PROPERTIES_OFFSET = 56 , KERNARG_PRELOAD_OFFSET = 58 , RESERVED3_OFFSET = 60 }

Enumeration Type Documentation

anonymous enum

anonymous enum : uint8_t

Enumerator
FLOAT_ROUND_MODE_NEAR_EVEN
FLOAT_ROUND_MODE_PLUS_INFINITY
FLOAT_ROUND_MODE_MINUS_INFINITY
FLOAT_ROUND_MODE_ZERO

Definition at line 61 of file AMDHSAKernelDescriptor.h.

anonymous enum

anonymous enum : uint8_t

Enumerator
FLOAT_DENORM_MODE_FLUSH_SRC_DST
FLOAT_DENORM_MODE_FLUSH_DST
FLOAT_DENORM_MODE_FLUSH_SRC
FLOAT_DENORM_MODE_FLUSH_NONE

Definition at line 69 of file AMDHSAKernelDescriptor.h.

anonymous enum

anonymous enum : uint8_t

Enumerator
SYSTEM_VGPR_WORKITEM_ID_X
SYSTEM_VGPR_WORKITEM_ID_X_Y
SYSTEM_VGPR_WORKITEM_ID_X_Y_Z
SYSTEM_VGPR_WORKITEM_ID_UNDEFINED

Definition at line 77 of file AMDHSAKernelDescriptor.h.

anonymous enum

anonymous enum : int32_t

Enumerator
COMPUTE_PGM_RSRC1
COMPUTE_PGM_RSRC1
COMPUTE_PGM_RSRC1
COMPUTE_PGM_RSRC1
COMPUTE_PGM_RSRC1
COMPUTE_PGM_RSRC1
COMPUTE_PGM_RSRC1
COMPUTE_PGM_RSRC1
COMPUTE_PGM_RSRC1_GFX6_GFX11
COMPUTE_PGM_RSRC1_GFX12_PLUS
COMPUTE_PGM_RSRC1
COMPUTE_PGM_RSRC1_GFX6_GFX11
COMPUTE_PGM_RSRC1_GFX12_PLUS
COMPUTE_PGM_RSRC1
COMPUTE_PGM_RSRC1
COMPUTE_PGM_RSRC1_GFX6_GFX8
COMPUTE_PGM_RSRC1_GFX9_PLUS
COMPUTE_PGM_RSRC1
COMPUTE_PGM_RSRC1_GFX6_GFX9
COMPUTE_PGM_RSRC1_GFX10_PLUS
COMPUTE_PGM_RSRC1_GFX10_PLUS
COMPUTE_PGM_RSRC1_GFX10_PLUS

Definition at line 106 of file AMDHSAKernelDescriptor.h.

anonymous enum

anonymous enum : int32_t

Enumerator
COMPUTE_PGM_RSRC2
COMPUTE_PGM_RSRC2
COMPUTE_PGM_RSRC2_GFX6_GFX11
COMPUTE_PGM_RSRC2_GFX12_PLUS
COMPUTE_PGM_RSRC2
COMPUTE_PGM_RSRC2
COMPUTE_PGM_RSRC2
COMPUTE_PGM_RSRC2
COMPUTE_PGM_RSRC2
COMPUTE_PGM_RSRC2
COMPUTE_PGM_RSRC2
COMPUTE_PGM_RSRC2
COMPUTE_PGM_RSRC2
COMPUTE_PGM_RSRC2
COMPUTE_PGM_RSRC2
COMPUTE_PGM_RSRC2
COMPUTE_PGM_RSRC2
COMPUTE_PGM_RSRC2
COMPUTE_PGM_RSRC2
COMPUTE_PGM_RSRC2

Definition at line 142 of file AMDHSAKernelDescriptor.h.

anonymous enum

anonymous enum : int32_t

Enumerator
COMPUTE_PGM_RSRC3_GFX90A
COMPUTE_PGM_RSRC3_GFX90A
COMPUTE_PGM_RSRC3_GFX90A
COMPUTE_PGM_RSRC3_GFX90A

Definition at line 170 of file AMDHSAKernelDescriptor.h.

anonymous enum

anonymous enum : int32_t

Enumerator
COMPUTE_PGM_RSRC3_GFX10_GFX11
COMPUTE_PGM_RSRC3_GFX12_PLUS
COMPUTE_PGM_RSRC3_GFX10
COMPUTE_PGM_RSRC3_GFX11
COMPUTE_PGM_RSRC3_GFX11
COMPUTE_PGM_RSRC3_GFX11
COMPUTE_PGM_RSRC3_GFX12_PLUS
COMPUTE_PGM_RSRC3_GFX10_PLUS
COMPUTE_PGM_RSRC3_GFX10_GFX11
COMPUTE_PGM_RSRC3_GFX12_PLUS
COMPUTE_PGM_RSRC3_GFX10_PLUS
COMPUTE_PGM_RSRC3_GFX10
COMPUTE_PGM_RSRC3_GFX11_PLUS

Definition at line 198 of file AMDHSAKernelDescriptor.h.

anonymous enum

anonymous enum : int32_t

Enumerator
KERNEL_CODE_PROPERTY
KERNEL_CODE_PROPERTY
KERNEL_CODE_PROPERTY
KERNEL_CODE_PROPERTY
KERNEL_CODE_PROPERTY
KERNEL_CODE_PROPERTY
KERNEL_CODE_PROPERTY
KERNEL_CODE_PROPERTY
KERNEL_CODE_PROPERTY
KERNEL_CODE_PROPERTY
KERNEL_CODE_PROPERTY

Definition at line 218 of file AMDHSAKernelDescriptor.h.

anonymous enum

anonymous enum : int32_t

Enumerator
KERNARG_PRELOAD_SPEC
KERNARG_PRELOAD_SPEC

Definition at line 236 of file AMDHSAKernelDescriptor.h.

anonymous enum

anonymous enum : uint32_t

Enumerator
GROUP_SEGMENT_FIXED_SIZE_OFFSET
PRIVATE_SEGMENT_FIXED_SIZE_OFFSET
KERNARG_SIZE_OFFSET
RESERVED0_OFFSET
KERNEL_CODE_ENTRY_BYTE_OFFSET_OFFSET
RESERVED1_OFFSET
COMPUTE_PGM_RSRC3_OFFSET
COMPUTE_PGM_RSRC1_OFFSET
COMPUTE_PGM_RSRC2_OFFSET
KERNEL_CODE_PROPERTIES_OFFSET
KERNARG_PRELOAD_OFFSET
RESERVED3_OFFSET

Definition at line 258 of file AMDHSAKernelDescriptor.h.