Go to the documentation of this file.
16 #define DEBUG_TYPE "orc"
22 namespace rt_bootstrap {
24 template <
typename WriteT,
typename SPSWriteT>
29 [](std::vector<WriteT> Ws) {
31 *
W.Addr.template toPtr<decltype(
W.Value) *>() =
W.Value;
40 [](std::vector<tpctypes::BufferWrite> Ws) {
42 memcpy(
W.Addr.template toPtr<char *>(),
W.Buffer.data(),
53 std::vector<std::string>
Args) -> int64_t {
Represents an address in the executor process.
void addTo(StringMap< ExecutorAddr > &M)
static ExecutorAddr fromPtr(T *Ptr, UnwrapFn &&Unwrap=UnwrapFn())
Create an ExecutorAddr from the given pointer.
This is an optimization pass for GlobalISel generic memory operations.
We currently emits eax Perhaps this is what we really should generate is Is imull three or four cycles eax eax The current instruction priority is based on pattern complexity The former is more complex because it folds a load so the latter will not be emitted Perhaps we should use AddedComplexity to give LEA32r a higher priority We should always try to match LEA first since the LEA matching code does some estimate to determine whether the match is profitable if we care more about code then imull is better It s two bytes shorter than movl leal On a Pentium M
SPS tag type for sequences.
llvm::orc::shared::CWrapperFunctionResult llvm_orc_registerEHFrameSectionWrapper(const char *Data, uint64_t Size)
static llvm::orc::shared::CWrapperFunctionResult runAsIntFunctionWrapper(const char *ArgData, size_t ArgSize)
then ret i32 result Tail recursion elimination should handle
const char * RegisterEHFrameSectionWrapperName
const char * MemoryWriteUInt64sWrapperName
amdgpu Simplify well known AMD library false FunctionCallee Value * Arg
const char * MemoryWriteUInt32sWrapperName
std::enable_if_t< std::is_pointer< T >::value, T > toPtr(WrapFn &&Wrap=WrapFn()) const
Cast this ExecutorAddr to a pointer of the given type.
Clang compiles this i1 i64 store i64 i64 store i64 i64 store i64 i64 store i64 align Which gets codegen d xmm0 movaps rbp movaps rbp movaps rbp movaps rbp rbp rbp rbp rbp It would be better to have movq s of instead of the movaps s LLVM produces ret int
const char * MemoryWriteBuffersWrapperName
StringMap - This is an unconventional map that is specialized for handling keys that are "strings",...
const char * MemoryWriteUInt16sWrapperName
const char * RunAsIntFunctionWrapperName
const char * DeregisterEHFrameSectionWrapperName
int runAsMain(int(*Main)(int, char *[]), ArrayRef< std::string > Args, std::optional< StringRef > ProgramName=std::nullopt)
Run a main function, returning the result.
static llvm::orc::shared::CWrapperFunctionResult writeUIntsWrapper(const char *ArgData, size_t ArgSize)
<%struct.s * > cast struct s *S to sbyte *< sbyte * > sbyte uint cast struct s *agg result to sbyte *< sbyte * > sbyte uint cast struct s *memtmp to sbyte *< sbyte * > sbyte uint ret void llc ends up issuing two memcpy or custom lower memcpy(of small size) to be ldmia/stmia. I think option 2 is better but the current register allocator cannot allocate a chunk of registers at a time. A feasible temporary solution is to use specific physical registers at the lowering time for small(<
const char * MemoryWriteUInt8sWrapperName
int runAsIntFunction(int(*Func)(int), int Arg)
static llvm::orc::shared::CWrapperFunctionResult writeBuffersWrapper(const char *ArgData, size_t ArgSize)
llvm::orc::shared::CWrapperFunctionResult llvm_orc_deregisterEHFrameSectionWrapper(const char *Data, uint64_t Size)
const char * RunAsVoidFunctionWrapperName
int runAsVoidFunction(int(*Func)(void))
const char * RunAsMainWrapperName
constexpr char Args[]
Key for Kernel::Metadata::mArgs.
static llvm::orc::shared::CWrapperFunctionResult runAsMainWrapper(const char *ArgData, size_t ArgSize)
static llvm::orc::shared::CWrapperFunctionResult runAsVoidFunctionWrapper(const char *ArgData, size_t ArgSize)