enum | llvm::SPCC::CondCodes {
llvm::SPCC::ICC_A = 8,
llvm::SPCC::ICC_N = 0,
llvm::SPCC::ICC_NE = 9,
llvm::SPCC::ICC_E = 1,
llvm::SPCC::ICC_G = 10,
llvm::SPCC::ICC_LE = 2,
llvm::SPCC::ICC_GE = 11,
llvm::SPCC::ICC_L = 3,
llvm::SPCC::ICC_GU = 12,
llvm::SPCC::ICC_LEU = 4,
llvm::SPCC::ICC_CC = 13,
llvm::SPCC::ICC_CS = 5,
llvm::SPCC::ICC_POS = 14,
llvm::SPCC::ICC_NEG = 6,
llvm::SPCC::ICC_VC = 15,
llvm::SPCC::ICC_VS = 7,
llvm::SPCC::FCC_BEGIN = 16,
llvm::SPCC::FCC_A = 8 + FCC_BEGIN,
llvm::SPCC::FCC_N = 0 + FCC_BEGIN,
llvm::SPCC::FCC_U = 7 + FCC_BEGIN,
llvm::SPCC::FCC_G = 6 + FCC_BEGIN,
llvm::SPCC::FCC_UG = 5 + FCC_BEGIN,
llvm::SPCC::FCC_L = 4 + FCC_BEGIN,
llvm::SPCC::FCC_UL = 3 + FCC_BEGIN,
llvm::SPCC::FCC_LG = 2 + FCC_BEGIN,
llvm::SPCC::FCC_NE = 1 + FCC_BEGIN,
llvm::SPCC::FCC_E = 9 + FCC_BEGIN,
llvm::SPCC::FCC_UE = 10 + FCC_BEGIN,
llvm::SPCC::FCC_GE = 11 + FCC_BEGIN,
llvm::SPCC::FCC_UGE = 12 + FCC_BEGIN,
llvm::SPCC::FCC_LE = 13 + FCC_BEGIN,
llvm::SPCC::FCC_ULE = 14 + FCC_BEGIN,
llvm::SPCC::FCC_O = 15 + FCC_BEGIN,
llvm::SPCC::CPCC_BEGIN = 32,
llvm::SPCC::CPCC_A = 8 + CPCC_BEGIN,
llvm::SPCC::CPCC_N = 0 + CPCC_BEGIN,
llvm::SPCC::CPCC_3 = 7 + CPCC_BEGIN,
llvm::SPCC::CPCC_2 = 6 + CPCC_BEGIN,
llvm::SPCC::CPCC_23 = 5 + CPCC_BEGIN,
llvm::SPCC::CPCC_1 = 4 + CPCC_BEGIN,
llvm::SPCC::CPCC_13 = 3 + CPCC_BEGIN,
llvm::SPCC::CPCC_12 = 2 + CPCC_BEGIN,
llvm::SPCC::CPCC_123 = 1 + CPCC_BEGIN,
llvm::SPCC::CPCC_0 = 9 + CPCC_BEGIN,
llvm::SPCC::CPCC_03 = 10 + CPCC_BEGIN,
llvm::SPCC::CPCC_02 = 11 + CPCC_BEGIN,
llvm::SPCC::CPCC_023 = 12 + CPCC_BEGIN,
llvm::SPCC::CPCC_01 = 13 + CPCC_BEGIN,
llvm::SPCC::CPCC_013 = 14 + CPCC_BEGIN,
llvm::SPCC::CPCC_012 = 15 + CPCC_BEGIN,
llvm::SPCC::REG_BEGIN = 48,
llvm::SPCC::REG_Z = 1 + REG_BEGIN,
llvm::SPCC::REG_LEZ = 2 + REG_BEGIN,
llvm::SPCC::REG_LZ = 3 + REG_BEGIN,
llvm::SPCC::REG_NZ = 5 + REG_BEGIN,
llvm::SPCC::REG_GZ = 6 + REG_BEGIN,
llvm::SPCC::REG_GEZ = 7 + REG_BEGIN
} |