llvm::RISCVDAGToDAGISel Member List

This is the complete list of members for llvm::RISCVDAGToDAGISel, including all inherited members.

AC	llvm::SelectionDAGISel
addVectorLoadStoreOperands(SDNode *Node, unsigned SEWImm, const SDLoc &DL, unsigned CurOp, bool IsMasked, bool IsStridedOrIndexed, SmallVectorImpl< SDValue > &Operands, bool IsLoad=false, MVT *IndexVT=nullptr)	llvm::RISCVDAGToDAGISel
areOffsetsWithinAlignment(SDValue Addr, Align Alignment)	llvm::RISCVDAGToDAGISel
BatchAA	llvm::SelectionDAGISel	mutable
BuiltinOpcodes enum name	llvm::SelectionDAGISel
CheckAndMask(SDValue LHS, ConstantSDNode *RHS, int64_t DesiredMaskS) const	llvm::SelectionDAGISel
CheckComplexPattern(SDNode *Root, SDNode *Parent, SDValue N, unsigned PatternNo, SmallVectorImpl< std::pair< SDValue, SDNode * > > &Result)	llvm::SelectionDAGISel	inlinevirtual
CheckNodePredicate(SDValue Op, unsigned PredNo) const	llvm::SelectionDAGISel	inlinevirtual
CheckNodePredicateWithOperands(SDValue Op, unsigned PredNo, ArrayRef< SDValue > Operands) const	llvm::SelectionDAGISel	inlinevirtual
CheckOrMask(SDValue LHS, ConstantSDNode *RHS, int64_t DesiredMaskS) const	llvm::SelectionDAGISel
CheckPatternPredicate(unsigned PredNo) const	llvm::SelectionDAGISel	inlinevirtual
ComplexPatternFuncMutatesDAG() const	llvm::SelectionDAGISel	inlinevirtual
CurDAG	llvm::SelectionDAGISel
DAGSize	llvm::SelectionDAGISel	protected
ElidedArgCopyInstrs	llvm::SelectionDAGISel
emitFunctionEntryCode()	llvm::SelectionDAGISel	inlinevirtual
EnforceNodeIdInvariant(SDNode *N)	llvm::SelectionDAGISel	static
FastISelFailed	llvm::SelectionDAGISel
FuncInfo	llvm::SelectionDAGISel
FuncName	llvm::SelectionDAGISel
getBatchAA() const	llvm::SelectionDAGISel	inline
getIncludePathForIndex(unsigned index)	llvm::SelectionDAGISel	inlineprotectedvirtual
getNumFixedFromVariadicInfo(unsigned Flags)	llvm::SelectionDAGISel	inlinestatic
getPatternForIndex(unsigned index)	llvm::SelectionDAGISel	inlineprotectedvirtual
getRISCVCCForIntCC(ISD::CondCode CC)	llvm::RISCVDAGToDAGISel	inlinestatic
getTargetLowering() const	llvm::SelectionDAGISel	inline
getUninvalidatedNodeId(SDNode *N)	llvm::SelectionDAGISel	static
GFI	llvm::SelectionDAGISel
hasAllBUsers(SDNode *Node) const	llvm::RISCVDAGToDAGISel	inline
hasAllHUsers(SDNode *Node) const	llvm::RISCVDAGToDAGISel	inline
hasAllNBitUsers(SDNode *Node, unsigned Bits, const unsigned Depth=0) const	llvm::RISCVDAGToDAGISel
hasAllWUsers(SDNode *Node) const	llvm::RISCVDAGToDAGISel	inline
initializeAnalysisResults(MachineFunctionAnalysisManager &MFAM)	llvm::SelectionDAGISel
initializeAnalysisResults(MachineFunctionPass &MFP)	llvm::SelectionDAGISel
InvalidateNodeId(SDNode *N)	llvm::SelectionDAGISel	static
IsLegalToFold(SDValue N, SDNode *U, SDNode *Root, CodeGenOptLevel OptLevel, bool IgnoreChains=false)	llvm::SelectionDAGISel	static
isOrEquivalentToAdd(const SDNode *N) const	llvm::SelectionDAGISel
IsProfitableToFold(SDValue N, SDNode *U, SDNode *Root) const	llvm::SelectionDAGISel	virtual
LibInfo	llvm::SelectionDAGISel
MatchFilterFuncName	llvm::SelectionDAGISel
mayRaiseFPException(SDNode *Node) const	llvm::SelectionDAGISel
MF	llvm::SelectionDAGISel
MMI	llvm::SelectionDAGISel
OPC_CaptureGlueInput enum value	llvm::SelectionDAGISel
OPC_CheckAndImm enum value	llvm::SelectionDAGISel
OPC_CheckChild0Integer enum value	llvm::SelectionDAGISel
OPC_CheckChild0Same enum value	llvm::SelectionDAGISel
OPC_CheckChild0Type enum value	llvm::SelectionDAGISel
OPC_CheckChild0TypeI32 enum value	llvm::SelectionDAGISel
OPC_CheckChild0TypeI64 enum value	llvm::SelectionDAGISel
OPC_CheckChild1Integer enum value	llvm::SelectionDAGISel
OPC_CheckChild1Same enum value	llvm::SelectionDAGISel
OPC_CheckChild1Type enum value	llvm::SelectionDAGISel
OPC_CheckChild1TypeI32 enum value	llvm::SelectionDAGISel
OPC_CheckChild1TypeI64 enum value	llvm::SelectionDAGISel
OPC_CheckChild2CondCode enum value	llvm::SelectionDAGISel
OPC_CheckChild2Integer enum value	llvm::SelectionDAGISel
OPC_CheckChild2Same enum value	llvm::SelectionDAGISel
OPC_CheckChild2Type enum value	llvm::SelectionDAGISel
OPC_CheckChild2TypeI32 enum value	llvm::SelectionDAGISel
OPC_CheckChild2TypeI64 enum value	llvm::SelectionDAGISel
OPC_CheckChild3Integer enum value	llvm::SelectionDAGISel
OPC_CheckChild3Same enum value	llvm::SelectionDAGISel
OPC_CheckChild3Type enum value	llvm::SelectionDAGISel
OPC_CheckChild3TypeI32 enum value	llvm::SelectionDAGISel
OPC_CheckChild3TypeI64 enum value	llvm::SelectionDAGISel
OPC_CheckChild4Integer enum value	llvm::SelectionDAGISel
OPC_CheckChild4Type enum value	llvm::SelectionDAGISel
OPC_CheckChild4TypeI32 enum value	llvm::SelectionDAGISel
OPC_CheckChild4TypeI64 enum value	llvm::SelectionDAGISel
OPC_CheckChild5Type enum value	llvm::SelectionDAGISel
OPC_CheckChild5TypeI32 enum value	llvm::SelectionDAGISel
OPC_CheckChild5TypeI64 enum value	llvm::SelectionDAGISel
OPC_CheckChild6Type enum value	llvm::SelectionDAGISel
OPC_CheckChild6TypeI32 enum value	llvm::SelectionDAGISel
OPC_CheckChild6TypeI64 enum value	llvm::SelectionDAGISel
OPC_CheckChild7Type enum value	llvm::SelectionDAGISel
OPC_CheckChild7TypeI32 enum value	llvm::SelectionDAGISel
OPC_CheckChild7TypeI64 enum value	llvm::SelectionDAGISel
OPC_CheckComplexPat enum value	llvm::SelectionDAGISel
OPC_CheckComplexPat0 enum value	llvm::SelectionDAGISel
OPC_CheckComplexPat1 enum value	llvm::SelectionDAGISel
OPC_CheckComplexPat2 enum value	llvm::SelectionDAGISel
OPC_CheckComplexPat3 enum value	llvm::SelectionDAGISel
OPC_CheckComplexPat4 enum value	llvm::SelectionDAGISel
OPC_CheckComplexPat5 enum value	llvm::SelectionDAGISel
OPC_CheckComplexPat6 enum value	llvm::SelectionDAGISel
OPC_CheckComplexPat7 enum value	llvm::SelectionDAGISel
OPC_CheckCondCode enum value	llvm::SelectionDAGISel
OPC_CheckFoldableChainNode enum value	llvm::SelectionDAGISel
OPC_CheckImmAllOnesV enum value	llvm::SelectionDAGISel
OPC_CheckImmAllZerosV enum value	llvm::SelectionDAGISel
OPC_CheckInteger enum value	llvm::SelectionDAGISel
OPC_CheckOpcode enum value	llvm::SelectionDAGISel
OPC_CheckOrImm enum value	llvm::SelectionDAGISel
OPC_CheckPatternPredicate enum value	llvm::SelectionDAGISel
OPC_CheckPatternPredicate0 enum value	llvm::SelectionDAGISel
OPC_CheckPatternPredicate1 enum value	llvm::SelectionDAGISel
OPC_CheckPatternPredicate2 enum value	llvm::SelectionDAGISel
OPC_CheckPatternPredicate3 enum value	llvm::SelectionDAGISel
OPC_CheckPatternPredicate4 enum value	llvm::SelectionDAGISel
OPC_CheckPatternPredicate5 enum value	llvm::SelectionDAGISel
OPC_CheckPatternPredicate6 enum value	llvm::SelectionDAGISel
OPC_CheckPatternPredicate7 enum value	llvm::SelectionDAGISel
OPC_CheckPatternPredicateTwoByte enum value	llvm::SelectionDAGISel
OPC_CheckPredicate enum value	llvm::SelectionDAGISel
OPC_CheckPredicate0 enum value	llvm::SelectionDAGISel
OPC_CheckPredicate1 enum value	llvm::SelectionDAGISel
OPC_CheckPredicate2 enum value	llvm::SelectionDAGISel
OPC_CheckPredicate3 enum value	llvm::SelectionDAGISel
OPC_CheckPredicate4 enum value	llvm::SelectionDAGISel
OPC_CheckPredicate5 enum value	llvm::SelectionDAGISel
OPC_CheckPredicate6 enum value	llvm::SelectionDAGISel
OPC_CheckPredicate7 enum value	llvm::SelectionDAGISel
OPC_CheckPredicateWithOperands enum value	llvm::SelectionDAGISel
OPC_CheckSame enum value	llvm::SelectionDAGISel
OPC_CheckType enum value	llvm::SelectionDAGISel
OPC_CheckTypeI32 enum value	llvm::SelectionDAGISel
OPC_CheckTypeI64 enum value	llvm::SelectionDAGISel
OPC_CheckTypeRes enum value	llvm::SelectionDAGISel
OPC_CheckValueType enum value	llvm::SelectionDAGISel
OPC_CompleteMatch enum value	llvm::SelectionDAGISel
OPC_Coverage enum value	llvm::SelectionDAGISel
OPC_EmitConvertToTarget enum value	llvm::SelectionDAGISel
OPC_EmitConvertToTarget0 enum value	llvm::SelectionDAGISel
OPC_EmitConvertToTarget1 enum value	llvm::SelectionDAGISel
OPC_EmitConvertToTarget2 enum value	llvm::SelectionDAGISel
OPC_EmitConvertToTarget3 enum value	llvm::SelectionDAGISel
OPC_EmitConvertToTarget4 enum value	llvm::SelectionDAGISel
OPC_EmitConvertToTarget5 enum value	llvm::SelectionDAGISel
OPC_EmitConvertToTarget6 enum value	llvm::SelectionDAGISel
OPC_EmitConvertToTarget7 enum value	llvm::SelectionDAGISel
OPC_EmitCopyToReg enum value	llvm::SelectionDAGISel
OPC_EmitCopyToReg0 enum value	llvm::SelectionDAGISel
OPC_EmitCopyToReg1 enum value	llvm::SelectionDAGISel
OPC_EmitCopyToReg2 enum value	llvm::SelectionDAGISel
OPC_EmitCopyToReg3 enum value	llvm::SelectionDAGISel
OPC_EmitCopyToReg4 enum value	llvm::SelectionDAGISel
OPC_EmitCopyToReg5 enum value	llvm::SelectionDAGISel
OPC_EmitCopyToReg6 enum value	llvm::SelectionDAGISel
OPC_EmitCopyToReg7 enum value	llvm::SelectionDAGISel
OPC_EmitCopyToRegTwoByte enum value	llvm::SelectionDAGISel
OPC_EmitInteger enum value	llvm::SelectionDAGISel
OPC_EmitInteger16 enum value	llvm::SelectionDAGISel
OPC_EmitInteger32 enum value	llvm::SelectionDAGISel
OPC_EmitInteger64 enum value	llvm::SelectionDAGISel
OPC_EmitInteger8 enum value	llvm::SelectionDAGISel
OPC_EmitMergeInputChains enum value	llvm::SelectionDAGISel
OPC_EmitMergeInputChains1_0 enum value	llvm::SelectionDAGISel
OPC_EmitMergeInputChains1_1 enum value	llvm::SelectionDAGISel
OPC_EmitMergeInputChains1_2 enum value	llvm::SelectionDAGISel
OPC_EmitNode enum value	llvm::SelectionDAGISel
OPC_EmitNode0 enum value	llvm::SelectionDAGISel
OPC_EmitNode0Chain enum value	llvm::SelectionDAGISel
OPC_EmitNode0None enum value	llvm::SelectionDAGISel
OPC_EmitNode1 enum value	llvm::SelectionDAGISel
OPC_EmitNode1Chain enum value	llvm::SelectionDAGISel
OPC_EmitNode1None enum value	llvm::SelectionDAGISel
OPC_EmitNode2 enum value	llvm::SelectionDAGISel
OPC_EmitNode2Chain enum value	llvm::SelectionDAGISel
OPC_EmitNode2None enum value	llvm::SelectionDAGISel
OPC_EmitNodeXForm enum value	llvm::SelectionDAGISel
OPC_EmitRegister enum value	llvm::SelectionDAGISel
OPC_EmitRegister2 enum value	llvm::SelectionDAGISel
OPC_EmitRegisterI32 enum value	llvm::SelectionDAGISel
OPC_EmitRegisterI64 enum value	llvm::SelectionDAGISel
OPC_EmitStringInteger enum value	llvm::SelectionDAGISel
OPC_EmitStringInteger32 enum value	llvm::SelectionDAGISel
OPC_MorphNodeTo enum value	llvm::SelectionDAGISel
OPC_MorphNodeTo0 enum value	llvm::SelectionDAGISel
OPC_MorphNodeTo0Chain enum value	llvm::SelectionDAGISel
OPC_MorphNodeTo0GlueInput enum value	llvm::SelectionDAGISel
OPC_MorphNodeTo0GlueOutput enum value	llvm::SelectionDAGISel
OPC_MorphNodeTo0None enum value	llvm::SelectionDAGISel
OPC_MorphNodeTo1 enum value	llvm::SelectionDAGISel
OPC_MorphNodeTo1Chain enum value	llvm::SelectionDAGISel
OPC_MorphNodeTo1GlueInput enum value	llvm::SelectionDAGISel
OPC_MorphNodeTo1GlueOutput enum value	llvm::SelectionDAGISel
OPC_MorphNodeTo1None enum value	llvm::SelectionDAGISel
OPC_MorphNodeTo2 enum value	llvm::SelectionDAGISel
OPC_MorphNodeTo2Chain enum value	llvm::SelectionDAGISel
OPC_MorphNodeTo2GlueInput enum value	llvm::SelectionDAGISel
OPC_MorphNodeTo2GlueOutput enum value	llvm::SelectionDAGISel
OPC_MorphNodeTo2None enum value	llvm::SelectionDAGISel
OPC_MoveChild enum value	llvm::SelectionDAGISel
OPC_MoveChild0 enum value	llvm::SelectionDAGISel
OPC_MoveChild1 enum value	llvm::SelectionDAGISel
OPC_MoveChild2 enum value	llvm::SelectionDAGISel
OPC_MoveChild3 enum value	llvm::SelectionDAGISel
OPC_MoveChild4 enum value	llvm::SelectionDAGISel
OPC_MoveChild5 enum value	llvm::SelectionDAGISel
OPC_MoveChild6 enum value	llvm::SelectionDAGISel
OPC_MoveChild7 enum value	llvm::SelectionDAGISel
OPC_MoveParent enum value	llvm::SelectionDAGISel
OPC_MoveSibling enum value	llvm::SelectionDAGISel
OPC_MoveSibling0 enum value	llvm::SelectionDAGISel
OPC_MoveSibling1 enum value	llvm::SelectionDAGISel
OPC_MoveSibling2 enum value	llvm::SelectionDAGISel
OPC_MoveSibling3 enum value	llvm::SelectionDAGISel
OPC_MoveSibling4 enum value	llvm::SelectionDAGISel
OPC_MoveSibling5 enum value	llvm::SelectionDAGISel
OPC_MoveSibling6 enum value	llvm::SelectionDAGISel
OPC_MoveSibling7 enum value	llvm::SelectionDAGISel
OPC_RecordChild0 enum value	llvm::SelectionDAGISel
OPC_RecordChild1 enum value	llvm::SelectionDAGISel
OPC_RecordChild2 enum value	llvm::SelectionDAGISel
OPC_RecordChild3 enum value	llvm::SelectionDAGISel
OPC_RecordChild4 enum value	llvm::SelectionDAGISel
OPC_RecordChild5 enum value	llvm::SelectionDAGISel
OPC_RecordChild6 enum value	llvm::SelectionDAGISel
OPC_RecordChild7 enum value	llvm::SelectionDAGISel
OPC_RecordMemRef enum value	llvm::SelectionDAGISel
OPC_RecordNode enum value	llvm::SelectionDAGISel
OPC_Scope enum value	llvm::SelectionDAGISel
OPC_SwitchOpcode enum value	llvm::SelectionDAGISel
OPC_SwitchType enum value	llvm::SelectionDAGISel
OPFL_Chain enum value	llvm::SelectionDAGISel
OPFL_GlueInput enum value	llvm::SelectionDAGISel
OPFL_GlueOutput enum value	llvm::SelectionDAGISel
OPFL_MemRefs enum value	llvm::SelectionDAGISel
OPFL_None enum value	llvm::SelectionDAGISel
OPFL_Variadic0 enum value	llvm::SelectionDAGISel
OPFL_Variadic1 enum value	llvm::SelectionDAGISel
OPFL_Variadic2 enum value	llvm::SelectionDAGISel
OPFL_Variadic3 enum value	llvm::SelectionDAGISel
OPFL_Variadic4 enum value	llvm::SelectionDAGISel
OPFL_Variadic5 enum value	llvm::SelectionDAGISel
OPFL_Variadic6 enum value	llvm::SelectionDAGISel
OPFL_Variadic7 enum value	llvm::SelectionDAGISel
OPFL_VariadicInfo enum value	llvm::SelectionDAGISel
OptLevel	llvm::SelectionDAGISel
orDisjoint(const SDNode *Node) const	llvm::RISCVDAGToDAGISel
ORE	llvm::SelectionDAGISel
PostprocessISelDAG() override	llvm::RISCVDAGToDAGISel	virtual
PreprocessISelDAG() override	llvm::RISCVDAGToDAGISel	virtual
RegInfo	llvm::SelectionDAGISel
ReplaceNode(SDNode *F, SDNode *T)	llvm::SelectionDAGISel	inlineprotected
ReplaceUses(SDValue F, SDValue T)	llvm::SelectionDAGISel	inlineprotected
ReplaceUses(const SDValue *F, const SDValue *T, unsigned Num)	llvm::SelectionDAGISel	inlineprotected
ReplaceUses(SDNode *F, SDNode *T)	llvm::SelectionDAGISel	inlineprotected
RISCVDAGToDAGISel()=delete	llvm::RISCVDAGToDAGISel
RISCVDAGToDAGISel(RISCVTargetMachine &TargetMachine, CodeGenOptLevel OptLevel)	llvm::RISCVDAGToDAGISel	inlineexplicit
runOnMachineFunction(MachineFunction &MF) override	llvm::RISCVDAGToDAGISel	inlinevirtual
RunSDNodeXForm(SDValue V, unsigned XFormNo)	llvm::SelectionDAGISel	inlinevirtual
SDB	llvm::SelectionDAGISel
Select(SDNode *Node) override	llvm::RISCVDAGToDAGISel	virtual
SelectAddrFrameIndex(SDValue Addr, SDValue &Base, SDValue &Offset)	llvm::RISCVDAGToDAGISel
SelectAddrRegImm(SDValue Addr, SDValue &Base, SDValue &Offset)	llvm::RISCVDAGToDAGISel
SelectAddrRegImm9(SDValue Addr, SDValue &Base, SDValue &Offset)	llvm::RISCVDAGToDAGISel
SelectAddrRegImmLsb00000(SDValue Addr, SDValue &Base, SDValue &Offset)	llvm::RISCVDAGToDAGISel
SelectAddrRegReg(SDValue Addr, SDValue &Base, SDValue &Offset)	llvm::RISCVDAGToDAGISel
SelectAddrRegRegScale(SDValue Addr, unsigned MaxShiftAmount, SDValue &Base, SDValue &Index, SDValue &Scale)	llvm::RISCVDAGToDAGISel
SelectAddrRegRegScale(SDValue Addr, SDValue &Base, SDValue &Index, SDValue &Scale)	llvm::RISCVDAGToDAGISel	inline
SelectAddrRegZextRegScale(SDValue Addr, unsigned MaxShiftAmount, unsigned Bits, SDValue &Base, SDValue &Index, SDValue &Scale)	llvm::RISCVDAGToDAGISel
SelectAddrRegZextRegScale(SDValue Addr, SDValue &Base, SDValue &Index, SDValue &Scale)	llvm::RISCVDAGToDAGISel	inline
SelectCodeCommon(SDNode *NodeToMatch, const unsigned char *MatcherTable, unsigned TableSize)	llvm::SelectionDAGISel
SelectInlineAsmMemoryOperand(const SDValue &Op, InlineAsm::ConstraintCode ConstraintID, std::vector< SDValue > &OutOps) override	llvm::RISCVDAGToDAGISel	virtual
SelectInlineAsmMemoryOperands(std::vector< SDValue > &Ops, const SDLoc &DL)	llvm::SelectionDAGISel	protected
selectInvLogicImm(SDValue N, SDValue &Val)	llvm::RISCVDAGToDAGISel
SelectionDAGISel(TargetMachine &tm, CodeGenOptLevel OL=CodeGenOptLevel::Default)	llvm::SelectionDAGISel	explicit
selectLow8BitsVSplat(SDValue N, SDValue &SplatVal)	llvm::RISCVDAGToDAGISel
selectNegImm(SDValue N, SDValue &Val)	llvm::RISCVDAGToDAGISel
selectRVVSimm5(SDValue N, unsigned Width, SDValue &Imm)	llvm::RISCVDAGToDAGISel
selectRVVSimm5(SDValue N, SDValue &Imm)	llvm::RISCVDAGToDAGISel	inline
selectScalarFPAsInt(SDValue N, SDValue &Imm)	llvm::RISCVDAGToDAGISel
selectSETCC(SDValue N, ISD::CondCode ExpectedCCVal, SDValue &Val)	llvm::RISCVDAGToDAGISel
selectSETEQ(SDValue N, SDValue &Val)	llvm::RISCVDAGToDAGISel	inline
selectSETNE(SDValue N, SDValue &Val)	llvm::RISCVDAGToDAGISel	inline
selectSExtBits(SDValue N, unsigned Bits, SDValue &Val)	llvm::RISCVDAGToDAGISel
selectSExtBits(SDValue N, SDValue &Val)	llvm::RISCVDAGToDAGISel	inline
selectSF_VC_X_SE(SDNode *Node)	llvm::RISCVDAGToDAGISel
selectShiftMask(SDValue N, unsigned ShiftWidth, SDValue &ShAmt)	llvm::RISCVDAGToDAGISel
selectShiftMask32(SDValue N, SDValue &ShAmt)	llvm::RISCVDAGToDAGISel	inline
selectShiftMaskXLen(SDValue N, SDValue &ShAmt)	llvm::RISCVDAGToDAGISel	inline
selectSHXADD_UWOp(SDValue N, unsigned ShAmt, SDValue &Val)	llvm::RISCVDAGToDAGISel
selectSHXADD_UWOp(SDValue N, SDValue &Val)	llvm::RISCVDAGToDAGISel	inline
selectSHXADDOp(SDValue N, unsigned ShAmt, SDValue &Val)	llvm::RISCVDAGToDAGISel
selectSHXADDOp(SDValue N, SDValue &Val)	llvm::RISCVDAGToDAGISel	inline
selectSimm5Shl2(SDValue N, SDValue &Simm5, SDValue &Shl2)	llvm::RISCVDAGToDAGISel
selectVLOp(SDValue N, SDValue &VL)	llvm::RISCVDAGToDAGISel
selectVLSEG(SDNode *Node, unsigned NF, bool IsMasked, bool IsStrided)	llvm::RISCVDAGToDAGISel
selectVLSEGFF(SDNode *Node, unsigned NF, bool IsMasked)	llvm::RISCVDAGToDAGISel
selectVLXSEG(SDNode *Node, unsigned NF, bool IsMasked, bool IsOrdered)	llvm::RISCVDAGToDAGISel
selectVSETVLI(SDNode *Node)	llvm::RISCVDAGToDAGISel
selectVSplat(SDValue N, SDValue &SplatVal)	llvm::RISCVDAGToDAGISel
selectVSplatImm64Neg(SDValue N, SDValue &SplatVal)	llvm::RISCVDAGToDAGISel
selectVSplatSimm5(SDValue N, SDValue &SplatVal)	llvm::RISCVDAGToDAGISel
selectVSplatSimm5Plus1(SDValue N, SDValue &SplatVal)	llvm::RISCVDAGToDAGISel
selectVSplatSimm5Plus1NoDec(SDValue N, SDValue &SplatVal)	llvm::RISCVDAGToDAGISel
selectVSplatSimm5Plus1NonZero(SDValue N, SDValue &SplatVal)	llvm::RISCVDAGToDAGISel
selectVSplatUimm(SDValue N, unsigned Bits, SDValue &SplatVal)	llvm::RISCVDAGToDAGISel
selectVSplatUimmBits(SDValue N, SDValue &Val)	llvm::RISCVDAGToDAGISel	inline
selectVSSEG(SDNode *Node, unsigned NF, bool IsMasked, bool IsStrided)	llvm::RISCVDAGToDAGISel
selectVSXSEG(SDNode *Node, unsigned NF, bool IsMasked, bool IsOrdered)	llvm::RISCVDAGToDAGISel
selectXSfmmVSET(SDNode *Node)	llvm::RISCVDAGToDAGISel
selectZExtBits(SDValue N, unsigned Bits, SDValue &Val)	llvm::RISCVDAGToDAGISel
selectZExtBits(SDValue N, SDValue &Val)	llvm::RISCVDAGToDAGISel	inline
selectZExtImm32(SDValue N, SDValue &Val)	llvm::RISCVDAGToDAGISel
shouldOptForSize(const MachineFunction *MF) const	llvm::SelectionDAGISel	inlineprotected
SP	llvm::SelectionDAGISel
SwiftError	llvm::SelectionDAGISel
TII	llvm::SelectionDAGISel
TLI	llvm::SelectionDAGISel
TM	llvm::SelectionDAGISel
tryIndexedLoad(SDNode *Node)	llvm::RISCVDAGToDAGISel
tryShrinkShlLogicImm(SDNode *Node)	llvm::RISCVDAGToDAGISel
trySignedBitfieldExtract(SDNode *Node)	llvm::RISCVDAGToDAGISel
trySignedBitfieldInsertInSign(SDNode *Node)	llvm::RISCVDAGToDAGISel
tryUnsignedBitfieldExtract(SDNode *Node, const SDLoc &DL, MVT VT, SDValue X, unsigned Msb, unsigned Lsb)	llvm::RISCVDAGToDAGISel
tryUnsignedBitfieldInsertInZero(SDNode *Node, const SDLoc &DL, MVT VT, SDValue X, unsigned Msb, unsigned Lsb)	llvm::RISCVDAGToDAGISel
~SelectionDAGISel()	llvm::SelectionDAGISel	virtual