LLVM 19.0.0git
Public Types | Public Member Functions | Static Public Member Functions | Public Attributes | Protected Member Functions | Protected Attributes | List of all members
llvm::SelectionDAGISel Class Referenceabstract

SelectionDAGISel - This is the common base class used for SelectionDAG-based pattern-matching instruction selectors. More...

#include "llvm/CodeGen/SelectionDAGISel.h"

Inheritance diagram for llvm::SelectionDAGISel:
Inheritance graph
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Public Types

enum  BuiltinOpcodes {
  OPC_Scope , OPC_RecordNode , OPC_RecordChild0 , OPC_RecordChild1 ,
  OPC_RecordChild2 , OPC_RecordChild3 , OPC_RecordChild4 , OPC_RecordChild5 ,
  OPC_RecordChild6 , OPC_RecordChild7 , OPC_RecordMemRef , OPC_CaptureGlueInput ,
  OPC_MoveChild , OPC_MoveChild0 , OPC_MoveChild1 , OPC_MoveChild2 ,
  OPC_MoveChild3 , OPC_MoveChild4 , OPC_MoveChild5 , OPC_MoveChild6 ,
  OPC_MoveChild7 , OPC_MoveSibling , OPC_MoveSibling0 , OPC_MoveSibling1 ,
  OPC_MoveSibling2 , OPC_MoveSibling3 , OPC_MoveSibling4 , OPC_MoveSibling5 ,
  OPC_MoveSibling6 , OPC_MoveSibling7 , OPC_MoveParent , OPC_CheckSame ,
  OPC_CheckChild0Same , OPC_CheckChild1Same , OPC_CheckChild2Same , OPC_CheckChild3Same ,
  OPC_CheckPatternPredicate , OPC_CheckPatternPredicate0 , OPC_CheckPatternPredicate1 , OPC_CheckPatternPredicate2 ,
  OPC_CheckPatternPredicate3 , OPC_CheckPatternPredicate4 , OPC_CheckPatternPredicate5 , OPC_CheckPatternPredicate6 ,
  OPC_CheckPatternPredicate7 , OPC_CheckPatternPredicateTwoByte , OPC_CheckPredicate , OPC_CheckPredicate0 ,
  OPC_CheckPredicate1 , OPC_CheckPredicate2 , OPC_CheckPredicate3 , OPC_CheckPredicate4 ,
  OPC_CheckPredicate5 , OPC_CheckPredicate6 , OPC_CheckPredicate7 , OPC_CheckPredicateWithOperands ,
  OPC_CheckOpcode , OPC_SwitchOpcode , OPC_CheckType , OPC_CheckTypeI32 ,
  OPC_CheckTypeI64 , OPC_CheckTypeRes , OPC_SwitchType , OPC_CheckChild0Type ,
  OPC_CheckChild1Type , OPC_CheckChild2Type , OPC_CheckChild3Type , OPC_CheckChild4Type ,
  OPC_CheckChild5Type , OPC_CheckChild6Type , OPC_CheckChild7Type , OPC_CheckChild0TypeI32 ,
  OPC_CheckChild1TypeI32 , OPC_CheckChild2TypeI32 , OPC_CheckChild3TypeI32 , OPC_CheckChild4TypeI32 ,
  OPC_CheckChild5TypeI32 , OPC_CheckChild6TypeI32 , OPC_CheckChild7TypeI32 , OPC_CheckChild0TypeI64 ,
  OPC_CheckChild1TypeI64 , OPC_CheckChild2TypeI64 , OPC_CheckChild3TypeI64 , OPC_CheckChild4TypeI64 ,
  OPC_CheckChild5TypeI64 , OPC_CheckChild6TypeI64 , OPC_CheckChild7TypeI64 , OPC_CheckInteger ,
  OPC_CheckChild0Integer , OPC_CheckChild1Integer , OPC_CheckChild2Integer , OPC_CheckChild3Integer ,
  OPC_CheckChild4Integer , OPC_CheckCondCode , OPC_CheckChild2CondCode , OPC_CheckValueType ,
  OPC_CheckComplexPat , OPC_CheckComplexPat0 , OPC_CheckComplexPat1 , OPC_CheckComplexPat2 ,
  OPC_CheckComplexPat3 , OPC_CheckComplexPat4 , OPC_CheckComplexPat5 , OPC_CheckComplexPat6 ,
  OPC_CheckComplexPat7 , OPC_CheckAndImm , OPC_CheckOrImm , OPC_CheckImmAllOnesV ,
  OPC_CheckImmAllZerosV , OPC_CheckFoldableChainNode , OPC_EmitInteger , OPC_EmitInteger8 ,
  OPC_EmitInteger16 , OPC_EmitInteger32 , OPC_EmitInteger64 , OPC_EmitStringInteger ,
  OPC_EmitStringInteger32 , OPC_EmitRegister , OPC_EmitRegisterI32 , OPC_EmitRegisterI64 ,
  OPC_EmitRegister2 , OPC_EmitConvertToTarget , OPC_EmitConvertToTarget0 , OPC_EmitConvertToTarget1 ,
  OPC_EmitConvertToTarget2 , OPC_EmitConvertToTarget3 , OPC_EmitConvertToTarget4 , OPC_EmitConvertToTarget5 ,
  OPC_EmitConvertToTarget6 , OPC_EmitConvertToTarget7 , OPC_EmitMergeInputChains , OPC_EmitMergeInputChains1_0 ,
  OPC_EmitMergeInputChains1_1 , OPC_EmitMergeInputChains1_2 , OPC_EmitCopyToReg , OPC_EmitCopyToReg0 ,
  OPC_EmitCopyToReg1 , OPC_EmitCopyToReg2 , OPC_EmitCopyToReg3 , OPC_EmitCopyToReg4 ,
  OPC_EmitCopyToReg5 , OPC_EmitCopyToReg6 , OPC_EmitCopyToReg7 , OPC_EmitCopyToRegTwoByte ,
  OPC_EmitNodeXForm , OPC_EmitNode , OPC_EmitNode0 , OPC_EmitNode1 ,
  OPC_EmitNode2 , OPC_EmitNode0None , OPC_EmitNode1None , OPC_EmitNode2None ,
  OPC_EmitNode0Chain , OPC_EmitNode1Chain , OPC_EmitNode2Chain , OPC_MorphNodeTo ,
  OPC_MorphNodeTo0 , OPC_MorphNodeTo1 , OPC_MorphNodeTo2 , OPC_MorphNodeTo0None ,
  OPC_MorphNodeTo1None , OPC_MorphNodeTo2None , OPC_MorphNodeTo0Chain , OPC_MorphNodeTo1Chain ,
  OPC_MorphNodeTo2Chain , OPC_MorphNodeTo0GlueInput , OPC_MorphNodeTo1GlueInput , OPC_MorphNodeTo2GlueInput ,
  OPC_MorphNodeTo0GlueOutput , OPC_MorphNodeTo1GlueOutput , OPC_MorphNodeTo2GlueOutput , OPC_CompleteMatch ,
  OPC_Coverage
}
 
enum  {
  OPFL_None = 0 , OPFL_Chain = 1 , OPFL_GlueInput = 2 , OPFL_GlueOutput = 4 ,
  OPFL_MemRefs = 8 , OPFL_Variadic0 = 1<<4 , OPFL_Variadic1 = 2<<4 , OPFL_Variadic2 = 3<<4 ,
  OPFL_Variadic3 = 4<<4 , OPFL_Variadic4 = 5<<4 , OPFL_Variadic5 = 6<<4 , OPFL_Variadic6 = 7<<4 ,
  OPFL_VariadicInfo = OPFL_Variadic6
}
 

Public Member Functions

 SelectionDAGISel (char &ID, TargetMachine &tm, CodeGenOptLevel OL=CodeGenOptLevel::Default)
 
 ~SelectionDAGISel () override
 
const TargetLoweringgetTargetLowering () const
 
void getAnalysisUsage (AnalysisUsage &AU) const override
 getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
 
bool runOnMachineFunction (MachineFunction &MF) override
 runOnMachineFunction - This method must be overloaded to perform the desired machine code transformation or analysis.
 
virtual void emitFunctionEntryCode ()
 
virtual void PreprocessISelDAG ()
 PreprocessISelDAG - This hook allows targets to hack on the graph before instruction selection starts.
 
virtual void PostprocessISelDAG ()
 PostprocessISelDAG() - This hook allows the target to hack on the graph right after selection.
 
virtual void Select (SDNode *N)=0
 Main hook for targets to transform nodes into machine nodes.
 
virtual bool SelectInlineAsmMemoryOperand (const SDValue &Op, InlineAsm::ConstraintCode ConstraintID, std::vector< SDValue > &OutOps)
 SelectInlineAsmMemoryOperand - Select the specified address as a target addressing mode, according to the specified constraint.
 
virtual bool IsProfitableToFold (SDValue N, SDNode *U, SDNode *Root) const
 IsProfitableToFold - Returns true if it's profitable to fold the specific operand node N of U during instruction selection that starts at Root.
 
bool CheckAndMask (SDValue LHS, ConstantSDNode *RHS, int64_t DesiredMaskS) const
 CheckAndMask - The isel is trying to match something like (and X, 255).
 
bool CheckOrMask (SDValue LHS, ConstantSDNode *RHS, int64_t DesiredMaskS) const
 CheckOrMask - The isel is trying to match something like (or X, 255).
 
virtual bool CheckPatternPredicate (unsigned PredNo) const
 CheckPatternPredicate - This function is generated by tblgen in the target.
 
virtual bool CheckNodePredicate (SDNode *N, unsigned PredNo) const
 CheckNodePredicate - This function is generated by tblgen in the target.
 
virtual bool CheckNodePredicateWithOperands (SDNode *N, unsigned PredNo, const SmallVectorImpl< SDValue > &Operands) const
 CheckNodePredicateWithOperands - This function is generated by tblgen in the target.
 
virtual bool CheckComplexPattern (SDNode *Root, SDNode *Parent, SDValue N, unsigned PatternNo, SmallVectorImpl< std::pair< SDValue, SDNode * > > &Result)
 
virtual SDValue RunSDNodeXForm (SDValue V, unsigned XFormNo)
 
void SelectCodeCommon (SDNode *NodeToMatch, const unsigned char *MatcherTable, unsigned TableSize)
 
virtual bool ComplexPatternFuncMutatesDAG () const
 Return true if complex patterns for this target can mutate the DAG.
 
bool mayRaiseFPException (SDNode *Node) const
 Return whether the node may raise an FP exception.
 
bool isOrEquivalentToAdd (const SDNode *N) const
 
- Public Member Functions inherited from llvm::MachineFunctionPass
bool doInitialization (Module &) override
 doInitialization - Virtual method overridden by subclasses to do any necessary initialization before any pass is run.
 
- Public Member Functions inherited from llvm::FunctionPass
 FunctionPass (char &pid)
 
PasscreatePrinterPass (raw_ostream &OS, const std::string &Banner) const override
 createPrinterPass - Get a function printer pass.
 
virtual bool runOnFunction (Function &F)=0
 runOnFunction - Virtual method overriden by subclasses to do the per-function processing of the pass.
 
void assignPassManager (PMStack &PMS, PassManagerType T) override
 Find appropriate Function Pass Manager or Call Graph Pass Manager in the PM Stack and add self into that manager.
 
PassManagerType getPotentialPassManagerType () const override
 Return what kind of Pass Manager can manage this pass.
 
- Public Member Functions inherited from llvm::Pass
 Pass (PassKind K, char &pid)
 
 Pass (const Pass &)=delete
 
Passoperator= (const Pass &)=delete
 
virtual ~Pass ()
 
PassKind getPassKind () const
 
virtual StringRef getPassName () const
 getPassName - Return a nice clean name for a pass.
 
AnalysisID getPassID () const
 getPassID - Return the PassID number that corresponds to this pass.
 
virtual bool doInitialization (Module &)
 doInitialization - Virtual method overridden by subclasses to do any necessary initialization before any pass is run.
 
virtual bool doFinalization (Module &)
 doFinalization - Virtual method overriden by subclasses to do any necessary clean up after all passes have run.
 
virtual void print (raw_ostream &OS, const Module *M) const
 print - Print out the internal state of the pass.
 
void dump () const
 
virtual PasscreatePrinterPass (raw_ostream &OS, const std::string &Banner) const =0
 createPrinterPass - Get a Pass appropriate to print the IR this pass operates on (Module, Function or MachineFunction).
 
virtual void assignPassManager (PMStack &, PassManagerType)
 Each pass is responsible for assigning a pass manager to itself.
 
virtual void preparePassManager (PMStack &)
 Check if available pass managers are suitable for this pass or not.
 
virtual PassManagerType getPotentialPassManagerType () const
 Return what kind of Pass Manager can manage this pass.
 
void setResolver (AnalysisResolver *AR)
 
AnalysisResolvergetResolver () const
 
virtual void getAnalysisUsage (AnalysisUsage &) const
 getAnalysisUsage - This function should be overriden by passes that need analysis information to do their job.
 
virtual void releaseMemory ()
 releaseMemory() - This member can be implemented by a pass if it wants to be able to release its memory when it is no longer needed.
 
virtual void * getAdjustedAnalysisPointer (AnalysisID ID)
 getAdjustedAnalysisPointer - This method is used when a pass implements an analysis interface through multiple inheritance.
 
virtual ImmutablePassgetAsImmutablePass ()
 
virtual PMDataManagergetAsPMDataManager ()
 
virtual void verifyAnalysis () const
 verifyAnalysis() - This member can be implemented by a analysis pass to check state of analysis information.
 
virtual void dumpPassStructure (unsigned Offset=0)
 
template<typename AnalysisType >
AnalysisType * getAnalysisIfAvailable () const
 getAnalysisIfAvailable<AnalysisType>() - Subclasses use this function to get analysis information that might be around, for example to update it.
 
bool mustPreserveAnalysisID (char &AID) const
 mustPreserveAnalysisID - This method serves the same function as getAnalysisIfAvailable, but works if you just have an AnalysisID.
 
template<typename AnalysisType >
AnalysisType & getAnalysis () const
 getAnalysis<AnalysisType>() - This function is used by subclasses to get to the analysis information that they claim to use by overriding the getAnalysisUsage function.
 
template<typename AnalysisType >
AnalysisType & getAnalysis (Function &F, bool *Changed=nullptr)
 getAnalysis<AnalysisType>() - This function is used by subclasses to get to the analysis information that they claim to use by overriding the getAnalysisUsage function.
 
template<typename AnalysisType >
AnalysisType & getAnalysisID (AnalysisID PI) const
 
template<typename AnalysisType >
AnalysisType & getAnalysisID (AnalysisID PI, Function &F, bool *Changed=nullptr)
 

Static Public Member Functions

static bool IsLegalToFold (SDValue N, SDNode *U, SDNode *Root, CodeGenOptLevel OptLevel, bool IgnoreChains=false)
 IsLegalToFold - Returns true if the specific operand node N of U can be folded during instruction selection that starts at Root.
 
static void InvalidateNodeId (SDNode *N)
 
static int getUninvalidatedNodeId (SDNode *N)
 
static void EnforceNodeIdInvariant (SDNode *N)
 
static int getNumFixedFromVariadicInfo (unsigned Flags)
 getNumFixedFromVariadicInfo - Transform an EmitNode flags word into the number of fixed arity values that should be skipped when copying from the root.
 
- Static Public Member Functions inherited from llvm::Pass
static const PassInfolookupPassInfo (const void *TI)
 
static const PassInfolookupPassInfo (StringRef Arg)
 
static PasscreatePass (AnalysisID ID)
 

Public Attributes

TargetMachineTM
 
const TargetLibraryInfoLibInfo
 
std::unique_ptr< FunctionLoweringInfoFuncInfo
 
SwiftErrorValueTrackingSwiftError
 
MachineFunctionMF
 
MachineRegisterInfoRegInfo
 
SelectionDAGCurDAG
 
std::unique_ptr< SelectionDAGBuilderSDB
 
AAResultsAA = nullptr
 
AssumptionCacheAC = nullptr
 
GCFunctionInfoGFI = nullptr
 
CodeGenOptLevel OptLevel
 
const TargetInstrInfoTII
 
const TargetLoweringTLI
 
bool FastISelFailed
 
SmallPtrSet< const Instruction *, 4 > ElidedArgCopyInstrs
 
std::unique_ptr< OptimizationRemarkEmitterORE
 Current optimization remark emitter.
 
bool MatchFilterFuncName = false
 True if the function currently processing is in the function printing list (i.e.
 

Protected Member Functions

void ReplaceUses (SDValue F, SDValue T)
 ReplaceUses - replace all uses of the old node F with the use of the new node T.
 
void ReplaceUses (const SDValue *F, const SDValue *T, unsigned Num)
 ReplaceUses - replace all uses of the old nodes F with the use of the new nodes T.
 
void ReplaceUses (SDNode *F, SDNode *T)
 ReplaceUses - replace all uses of the old node F with the use of the new node T.
 
void ReplaceNode (SDNode *F, SDNode *T)
 Replace all uses of F with T, then remove F from the DAG.
 
void SelectInlineAsmMemoryOperands (std::vector< SDValue > &Ops, const SDLoc &DL)
 SelectInlineAsmMemoryOperands - Calls to this are automatically generated by tblgen.
 
virtual StringRef getPatternForIndex (unsigned index)
 getPatternForIndex - Patterns selected by tablegen during ISEL
 
virtual StringRef getIncludePathForIndex (unsigned index)
 getIncludePathForIndex - get the td source location of pattern instantiation
 
bool shouldOptForSize (const MachineFunction *MF) const
 
- Protected Member Functions inherited from llvm::MachineFunctionPass
 MachineFunctionPass (char &ID)
 
virtual bool runOnMachineFunction (MachineFunction &MF)=0
 runOnMachineFunction - This method must be overloaded to perform the desired machine code transformation or analysis.
 
void getAnalysisUsage (AnalysisUsage &AU) const override
 getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
 
virtual MachineFunctionProperties getRequiredProperties () const
 
virtual MachineFunctionProperties getSetProperties () const
 
virtual MachineFunctionProperties getClearedProperties () const
 
- Protected Member Functions inherited from llvm::FunctionPass
bool skipFunction (const Function &F) const
 Optional passes call this function to check whether the pass should be skipped.
 

Protected Attributes

unsigned DAGSize = 0
 DAGSize - Size of DAG being instruction selected.
 

Detailed Description

SelectionDAGISel - This is the common base class used for SelectionDAG-based pattern-matching instruction selectors.

Definition at line 41 of file SelectionDAGISel.h.

Member Enumeration Documentation

◆ anonymous enum

anonymous enum
Enumerator
OPFL_None 
OPFL_Chain 
OPFL_GlueInput 
OPFL_GlueOutput 
OPFL_MemRefs 
OPFL_Variadic0 
OPFL_Variadic1 
OPFL_Variadic2 
OPFL_Variadic3 
OPFL_Variadic4 
OPFL_Variadic5 
OPFL_Variadic6 
OPFL_VariadicInfo 

Definition at line 312 of file SelectionDAGISel.h.

◆ BuiltinOpcodes

Enumerator
OPC_Scope 
OPC_RecordNode 
OPC_RecordChild0 
OPC_RecordChild1 
OPC_RecordChild2 
OPC_RecordChild3 
OPC_RecordChild4 
OPC_RecordChild5 
OPC_RecordChild6 
OPC_RecordChild7 
OPC_RecordMemRef 
OPC_CaptureGlueInput 
OPC_MoveChild 
OPC_MoveChild0 
OPC_MoveChild1 
OPC_MoveChild2 
OPC_MoveChild3 
OPC_MoveChild4 
OPC_MoveChild5 
OPC_MoveChild6 
OPC_MoveChild7 
OPC_MoveSibling 
OPC_MoveSibling0 
OPC_MoveSibling1 
OPC_MoveSibling2 
OPC_MoveSibling3 
OPC_MoveSibling4 
OPC_MoveSibling5 
OPC_MoveSibling6 
OPC_MoveSibling7 
OPC_MoveParent 
OPC_CheckSame 
OPC_CheckChild0Same 
OPC_CheckChild1Same 
OPC_CheckChild2Same 
OPC_CheckChild3Same 
OPC_CheckPatternPredicate 
OPC_CheckPatternPredicate0 
OPC_CheckPatternPredicate1 
OPC_CheckPatternPredicate2 
OPC_CheckPatternPredicate3 
OPC_CheckPatternPredicate4 
OPC_CheckPatternPredicate5 
OPC_CheckPatternPredicate6 
OPC_CheckPatternPredicate7 
OPC_CheckPatternPredicateTwoByte 
OPC_CheckPredicate 
OPC_CheckPredicate0 
OPC_CheckPredicate1 
OPC_CheckPredicate2 
OPC_CheckPredicate3 
OPC_CheckPredicate4 
OPC_CheckPredicate5 
OPC_CheckPredicate6 
OPC_CheckPredicate7 
OPC_CheckPredicateWithOperands 
OPC_CheckOpcode 
OPC_SwitchOpcode 
OPC_CheckType 
OPC_CheckTypeI32 
OPC_CheckTypeI64 
OPC_CheckTypeRes 
OPC_SwitchType 
OPC_CheckChild0Type 
OPC_CheckChild1Type 
OPC_CheckChild2Type 
OPC_CheckChild3Type 
OPC_CheckChild4Type 
OPC_CheckChild5Type 
OPC_CheckChild6Type 
OPC_CheckChild7Type 
OPC_CheckChild0TypeI32 
OPC_CheckChild1TypeI32 
OPC_CheckChild2TypeI32 
OPC_CheckChild3TypeI32 
OPC_CheckChild4TypeI32 
OPC_CheckChild5TypeI32 
OPC_CheckChild6TypeI32 
OPC_CheckChild7TypeI32 
OPC_CheckChild0TypeI64 
OPC_CheckChild1TypeI64 
OPC_CheckChild2TypeI64 
OPC_CheckChild3TypeI64 
OPC_CheckChild4TypeI64 
OPC_CheckChild5TypeI64 
OPC_CheckChild6TypeI64 
OPC_CheckChild7TypeI64 
OPC_CheckInteger 
OPC_CheckChild0Integer 
OPC_CheckChild1Integer 
OPC_CheckChild2Integer 
OPC_CheckChild3Integer 
OPC_CheckChild4Integer 
OPC_CheckCondCode 
OPC_CheckChild2CondCode 
OPC_CheckValueType 
OPC_CheckComplexPat 
OPC_CheckComplexPat0 
OPC_CheckComplexPat1 
OPC_CheckComplexPat2 
OPC_CheckComplexPat3 
OPC_CheckComplexPat4 
OPC_CheckComplexPat5 
OPC_CheckComplexPat6 
OPC_CheckComplexPat7 
OPC_CheckAndImm 
OPC_CheckOrImm 
OPC_CheckImmAllOnesV 
OPC_CheckImmAllZerosV 
OPC_CheckFoldableChainNode 
OPC_EmitInteger 
OPC_EmitInteger8 
OPC_EmitInteger16 
OPC_EmitInteger32 
OPC_EmitInteger64 
OPC_EmitStringInteger 
OPC_EmitStringInteger32 
OPC_EmitRegister 
OPC_EmitRegisterI32 
OPC_EmitRegisterI64 
OPC_EmitRegister2 
OPC_EmitConvertToTarget 
OPC_EmitConvertToTarget0 
OPC_EmitConvertToTarget1 
OPC_EmitConvertToTarget2 
OPC_EmitConvertToTarget3 
OPC_EmitConvertToTarget4 
OPC_EmitConvertToTarget5 
OPC_EmitConvertToTarget6 
OPC_EmitConvertToTarget7 
OPC_EmitMergeInputChains 
OPC_EmitMergeInputChains1_0 
OPC_EmitMergeInputChains1_1 
OPC_EmitMergeInputChains1_2 
OPC_EmitCopyToReg 
OPC_EmitCopyToReg0 
OPC_EmitCopyToReg1 
OPC_EmitCopyToReg2 
OPC_EmitCopyToReg3 
OPC_EmitCopyToReg4 
OPC_EmitCopyToReg5 
OPC_EmitCopyToReg6 
OPC_EmitCopyToReg7 
OPC_EmitCopyToRegTwoByte 
OPC_EmitNodeXForm 
OPC_EmitNode 
OPC_EmitNode0 
OPC_EmitNode1 
OPC_EmitNode2 
OPC_EmitNode0None 
OPC_EmitNode1None 
OPC_EmitNode2None 
OPC_EmitNode0Chain 
OPC_EmitNode1Chain 
OPC_EmitNode2Chain 
OPC_MorphNodeTo 
OPC_MorphNodeTo0 
OPC_MorphNodeTo1 
OPC_MorphNodeTo2 
OPC_MorphNodeTo0None 
OPC_MorphNodeTo1None 
OPC_MorphNodeTo2None 
OPC_MorphNodeTo0Chain 
OPC_MorphNodeTo1Chain 
OPC_MorphNodeTo2Chain 
OPC_MorphNodeTo0GlueInput 
OPC_MorphNodeTo1GlueInput 
OPC_MorphNodeTo2GlueInput 
OPC_MorphNodeTo0GlueOutput 
OPC_MorphNodeTo1GlueOutput 
OPC_MorphNodeTo2GlueOutput 
OPC_CompleteMatch 
OPC_Coverage 

Definition at line 124 of file SelectionDAGISel.h.

Constructor & Destructor Documentation

◆ SelectionDAGISel()

SelectionDAGISel::SelectionDAGISel ( char ID,
TargetMachine tm,
CodeGenOptLevel  OL = CodeGenOptLevel::Default 
)
explicit

◆ ~SelectionDAGISel()

SelectionDAGISel::~SelectionDAGISel ( )
override

Definition at line 359 of file SelectionDAGISel.cpp.

References CurDAG, and SwiftError.

Member Function Documentation

◆ CheckAndMask()

bool SelectionDAGISel::CheckAndMask ( SDValue  LHS,
ConstantSDNode RHS,
int64_t  DesiredMaskS 
) const

CheckAndMask - The isel is trying to match something like (and X, 255).

If the dag combiner simplified the 255, we still want to match. RHS is the actual value in the DAG on the RHS of an AND, and DesiredMaskS is the value specified in the .td file (e.g. 255).

Definition at line 2053 of file SelectionDAGISel.cpp.

References CurDAG, llvm::APInt::isSubsetOf(), LHS, llvm::SelectionDAG::MaskedValueIsZero(), and RHS.

Referenced by CheckAndImm().

◆ CheckComplexPattern()

virtual bool llvm::SelectionDAGISel::CheckComplexPattern ( SDNode Root,
SDNode Parent,
SDValue  N,
unsigned  PatternNo,
SmallVectorImpl< std::pair< SDValue, SDNode * > > &  Result 
)
inlinevirtual

Definition at line 425 of file SelectionDAGISel.h.

References llvm_unreachable.

Referenced by SelectCodeCommon().

◆ CheckNodePredicate()

virtual bool llvm::SelectionDAGISel::CheckNodePredicate ( SDNode N,
unsigned  PredNo 
) const
inlinevirtual

CheckNodePredicate - This function is generated by tblgen in the target.

It runs node predicate number PredNo and returns true if it succeeds or false if it fails. The number is a private implementation detail to the code tblgen produces.

Definition at line 410 of file SelectionDAGISel.h.

References llvm_unreachable.

Referenced by CheckNodePredicate(), and SelectCodeCommon().

◆ CheckNodePredicateWithOperands()

virtual bool llvm::SelectionDAGISel::CheckNodePredicateWithOperands ( SDNode N,
unsigned  PredNo,
const SmallVectorImpl< SDValue > &  Operands 
) const
inlinevirtual

CheckNodePredicateWithOperands - This function is generated by tblgen in the target.

It runs node predicate number PredNo and returns true if it succeeds or false if it fails. The number is a private implementation detail to the code tblgen produces.

Definition at line 419 of file SelectionDAGISel.h.

References llvm_unreachable.

Referenced by SelectCodeCommon().

◆ CheckOrMask()

bool SelectionDAGISel::CheckOrMask ( SDValue  LHS,
ConstantSDNode RHS,
int64_t  DesiredMaskS 
) const

CheckOrMask - The isel is trying to match something like (or X, 255).

If the dag combiner simplified the 255, we still want to match. RHS is the actual value in the DAG on the RHS of an OR, and DesiredMaskS is the value specified in the .td file (e.g. 255).

Definition at line 2082 of file SelectionDAGISel.cpp.

References llvm::SelectionDAG::computeKnownBits(), CurDAG, llvm::APInt::isSubsetOf(), LHS, llvm::KnownBits::One, and RHS.

Referenced by CheckOrImm().

◆ CheckPatternPredicate()

virtual bool llvm::SelectionDAGISel::CheckPatternPredicate ( unsigned  PredNo) const
inlinevirtual

CheckPatternPredicate - This function is generated by tblgen in the target.

It runs the specified pattern predicate and returns true if it succeeds or false if it fails. The number is a private implementation detail to the code tblgen produces.

Definition at line 402 of file SelectionDAGISel.h.

References llvm_unreachable.

Referenced by CheckPatternPredicate(), and SelectCodeCommon().

◆ ComplexPatternFuncMutatesDAG()

virtual bool llvm::SelectionDAGISel::ComplexPatternFuncMutatesDAG ( ) const
inlinevirtual

Return true if complex patterns for this target can mutate the DAG.

Reimplemented in llvm::HexagonDAGToDAGISel.

Definition at line 440 of file SelectionDAGISel.h.

Referenced by SelectCodeCommon().

◆ emitFunctionEntryCode()

virtual void llvm::SelectionDAGISel::emitFunctionEntryCode ( )
inlinevirtual

Reimplemented in llvm::HexagonDAGToDAGISel.

Definition at line 81 of file SelectionDAGISel.h.

◆ EnforceNodeIdInvariant()

void SelectionDAGISel::EnforceNodeIdInvariant ( SDNode N)
static

◆ getAnalysisUsage()

void SelectionDAGISel::getAnalysisUsage ( AnalysisUsage AU) const
overridevirtual

getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.

For MachineFunctionPasses, calling AU.preservesCFG() indicates that the pass does not modify the MachineBasicBlock CFG.

Reimplemented from llvm::MachineFunctionPass.

Reimplemented in AMDGPUDAGToDAGISel, and llvm::MipsDAGToDAGISel.

Definition at line 364 of file SelectionDAGISel.cpp.

References llvm::AnalysisUsage::addPreserved(), llvm::AnalysisUsage::addRequired(), llvm::MachineFunctionPass::getAnalysisUsage(), llvm::LazyBlockFrequencyInfoPass::getLazyBFIAnalysisUsage(), llvm::None, OptLevel, and UseMBPI.

Referenced by AMDGPUDAGToDAGISel::getAnalysisUsage(), and llvm::MipsDAGToDAGISel::getAnalysisUsage().

◆ getIncludePathForIndex()

virtual StringRef llvm::SelectionDAGISel::getIncludePathForIndex ( unsigned  index)
inlineprotectedvirtual

getIncludePathForIndex - get the td source location of pattern instantiation

Definition at line 382 of file SelectionDAGISel.h.

References llvm_unreachable.

Referenced by SelectCodeCommon().

◆ getNumFixedFromVariadicInfo()

static int llvm::SelectionDAGISel::getNumFixedFromVariadicInfo ( unsigned  Flags)
inlinestatic

getNumFixedFromVariadicInfo - Transform an EmitNode flags word into the number of fixed arity values that should be skipped when copying from the root.

Definition at line 332 of file SelectionDAGISel.h.

References OPFL_VariadicInfo.

Referenced by SelectCodeCommon().

◆ getPatternForIndex()

virtual StringRef llvm::SelectionDAGISel::getPatternForIndex ( unsigned  index)
inlineprotectedvirtual

getPatternForIndex - Patterns selected by tablegen during ISEL

Definition at line 377 of file SelectionDAGISel.h.

References llvm_unreachable.

Referenced by SelectCodeCommon().

◆ getTargetLowering()

const TargetLowering * llvm::SelectionDAGISel::getTargetLowering ( ) const
inline

◆ getUninvalidatedNodeId()

int SelectionDAGISel::getUninvalidatedNodeId ( SDNode N)
static

Definition at line 1112 of file SelectionDAGISel.cpp.

References N.

Referenced by insertDAGNode().

◆ InvalidateNodeId()

void SelectionDAGISel::InvalidateNodeId ( SDNode N)
static

Definition at line 1106 of file SelectionDAGISel.cpp.

References N.

Referenced by EnforceNodeIdInvariant(), and insertDAGNode().

◆ IsLegalToFold()

bool SelectionDAGISel::IsLegalToFold ( SDValue  N,
SDNode U,
SDNode Root,
CodeGenOptLevel  OptLevel,
bool  IgnoreChains = false 
)
static

IsLegalToFold - Returns true if the specific operand node N of U can be folded during instruction selection that starts at Root.

FIXME: This is a static member function because the MSP430/X86 targets, which uses it during isel. This could become a proper member.

Definition at line 2236 of file SelectionDAGISel.cpp.

References findGlueUse(), findNonImmUse(), llvm::SDNode::getNumValues(), llvm::SDNode::getValueType(), N, llvm::None, and OptLevel.

Referenced by llvm::RISCVDAGToDAGISel::Select(), and SelectCodeCommon().

◆ isOrEquivalentToAdd()

bool SelectionDAGISel::isOrEquivalentToAdd ( const SDNode N) const

◆ IsProfitableToFold()

bool SelectionDAGISel::IsProfitableToFold ( SDValue  N,
SDNode U,
SDNode Root 
) const
virtual

IsProfitableToFold - Returns true if it's profitable to fold the specific operand node N of U during instruction selection that starts at Root.

Definition at line 2227 of file SelectionDAGISel.cpp.

References N, llvm::None, and OptLevel.

Referenced by llvm::RISCVDAGToDAGISel::Select(), and SelectCodeCommon().

◆ mayRaiseFPException()

bool SelectionDAGISel::mayRaiseFPException ( SDNode Node) const

Return whether the node may raise an FP exception.

Definition at line 4212 of file SelectionDAGISel.cpp.

References llvm::MCInstrInfo::get(), llvm::MCInstrDesc::mayRaiseFPException(), N, and TII.

Referenced by SelectCodeCommon().

◆ PostprocessISelDAG()

virtual void llvm::SelectionDAGISel::PostprocessISelDAG ( )
inlinevirtual

PostprocessISelDAG() - This hook allows the target to hack on the graph right after selection.

Reimplemented in AMDGPUDAGToDAGISel, and llvm::RISCVDAGToDAGISel.

Definition at line 89 of file SelectionDAGISel.h.

◆ PreprocessISelDAG()

virtual void llvm::SelectionDAGISel::PreprocessISelDAG ( )
inlinevirtual

PreprocessISelDAG - This hook allows targets to hack on the graph before instruction selection starts.

Reimplemented in AMDGPUDAGToDAGISel, llvm::HexagonDAGToDAGISel, and llvm::RISCVDAGToDAGISel.

Definition at line 85 of file SelectionDAGISel.h.

◆ ReplaceNode()

void llvm::SelectionDAGISel::ReplaceNode ( SDNode F,
SDNode T 
)
inlineprotected

Replace all uses of F with T, then remove F from the DAG.

Definition at line 365 of file SelectionDAGISel.h.

References CurDAG, EnforceNodeIdInvariant(), F, llvm::SelectionDAG::RemoveDeadNode(), and llvm::SelectionDAG::ReplaceAllUsesWith().

Referenced by llvm::HexagonDAGToDAGISel::FastFDiv(), llvm::HexagonDAGToDAGISel::FDiv(), AMDGPUDAGToDAGISel::Select(), llvm::RISCVDAGToDAGISel::Select(), llvm::HexagonDAGToDAGISel::SelectAddSubCarry(), llvm::HexagonDAGToDAGISel::SelectConstant(), llvm::HexagonDAGToDAGISel::SelectConstantFP(), llvm::HexagonDAGToDAGISel::SelectD2P(), llvm::HexagonDAGToDAGISel::SelectExtractSubvector(), llvm::HvxSelector::selectExtractSubvector(), llvm::HexagonDAGToDAGISel::SelectFrameIndex(), llvm::HexagonDAGToDAGISel::SelectIntrinsicWOChain(), llvm::HexagonDAGToDAGISel::SelectP2D(), llvm::HexagonDAGToDAGISel::SelectQ2V(), llvm::HvxSelector::selectRor(), llvm::RISCVDAGToDAGISel::selectSF_VC_X_SE(), llvm::HexagonDAGToDAGISel::SelectSHL(), llvm::HvxSelector::selectShuffle(), llvm::HexagonDAGToDAGISel::SelectTypecast(), llvm::HexagonDAGToDAGISel::SelectV2Q(), llvm::HexagonDAGToDAGISel::SelectV65Gather(), llvm::HexagonDAGToDAGISel::SelectV65GatherPred(), llvm::HexagonDAGToDAGISel::SelectVAlign(), llvm::HvxSelector::selectVAlign(), llvm::HexagonDAGToDAGISel::SelectVAlignAddr(), llvm::RISCVDAGToDAGISel::selectVSETVLI(), llvm::RISCVDAGToDAGISel::selectVSSEG(), llvm::RISCVDAGToDAGISel::selectVSXSEG(), llvm::RISCVDAGToDAGISel::tryIndexedLoad(), llvm::RISCVDAGToDAGISel::tryShrinkShlLogicImm(), and llvm::RISCVDAGToDAGISel::trySignedBitfieldExtract().

◆ ReplaceUses() [1/3]

void llvm::SelectionDAGISel::ReplaceUses ( const SDValue F,
const SDValue T,
unsigned  Num 
)
inlineprotected

ReplaceUses - replace all uses of the old nodes F with the use of the new nodes T.

Definition at line 351 of file SelectionDAGISel.h.

References CurDAG, EnforceNodeIdInvariant(), F, and llvm::SelectionDAG::ReplaceAllUsesOfValuesWith().

◆ ReplaceUses() [2/3]

void llvm::SelectionDAGISel::ReplaceUses ( SDNode F,
SDNode T 
)
inlineprotected

ReplaceUses - replace all uses of the old node F with the use of the new node T.

Definition at line 359 of file SelectionDAGISel.h.

References CurDAG, EnforceNodeIdInvariant(), F, and llvm::SelectionDAG::ReplaceAllUsesWith().

◆ ReplaceUses() [3/3]

void llvm::SelectionDAGISel::ReplaceUses ( SDValue  F,
SDValue  T 
)
inlineprotected

◆ runOnMachineFunction()

bool SelectionDAGISel::runOnMachineFunction ( MachineFunction MF)
overridevirtual

runOnMachineFunction - This method must be overloaded to perform the desired machine code transformation or analysis.

Implements llvm::MachineFunctionPass.

Reimplemented in AMDGPUDAGToDAGISel, llvm::HexagonDAGToDAGISel, llvm::LoongArchDAGToDAGISel, llvm::MipsDAGToDAGISel, llvm::NVPTXDAGToDAGISel, and llvm::RISCVDAGToDAGISel.

Definition at line 409 of file SelectionDAGISel.cpp.

References AA, AC, assert(), llvm::MachineBasicBlock::begin(), llvm::BuildMI(), llvm::Function::callsFunctionThatReturnsTwice(), computeUsesMSVCFloatingPoint(), CurDAG, llvm::dbgs(), llvm::LLVMContext::diagnose(), DL, E, llvm::MachineRegisterInfo::EmitLiveInCopies(), llvm::TargetOptions::EnableFastISel, EnableFastISelAbort, EnableFastISelFallbackReport, llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT, BucketT >::end(), llvm::MachineBasicBlock::end(), FastISelFailed, llvm::MachineFunction::finalizeDebugInstrRefs(), llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT, BucketT >::find(), From, llvm::MachineFunction::front(), FuncInfo, llvm::MCInstrInfo::get(), llvm::Function::getContext(), llvm::MachineBasicBlock::getFirstTerminator(), llvm::MachineFunction::getFrameInfo(), llvm::MachineFunction::getFunction(), llvm::TargetSubtargetInfo::getInstrInfo(), llvm::MachineFunction::getMMI(), llvm::Value::getName(), llvm::MachineInstr::getOperand(), llvm::GlobalValue::getParent(), llvm::MachineInstr::getParent(), llvm::MachineFunction::getProperties(), llvm::MachineOperand::getReg(), llvm::MachineFunction::getRegInfo(), llvm::TargetSubtargetInfo::getRegisterInfo(), llvm::MachineFunction::getSubtarget(), llvm::TargetSubtargetInfo::getTargetLowering(), llvm::TargetMachine::getTargetTriple(), llvm::MachineRegisterInfo::getVRegDef(), GFI, llvm::MachineFrameInfo::hasCalls(), llvm::Function::hasGC(), llvm::MachineFunction::hasInlineAsm(), llvm::MachineFunctionProperties::hasProperty(), I, llvm::SelectionDAG::init(), llvm::TargetLowering::initializeSplitCSR(), llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT, BucketT >::insert(), llvm::MachineBasicBlock::insert(), llvm::MachineBasicBlock::insertAfter(), llvm::TargetLowering::insertCopiesSplitCSR(), llvm::isAssignmentTrackingEnabled(), llvm::MCInstrDesc::isCall(), llvm::MachineInstr::isCopy(), llvm::MachineInstr::isDebugValue(), ISEL_DUMP, llvm::isFunctionInPrintList(), llvm::MCInstrDesc::isReturn(), llvm::Register::isVirtual(), LibInfo, llvm::MachineRegisterInfo::liveins(), LLVM_DEBUG, MatchFilterFuncName, MBB, MF, MI, MRI, llvm::None, llvm::TargetMachine::Options, OptLevel, ORE, llvm::MachineFunction::print(), llvm::SmallVectorTemplateBase< T, bool >::push_back(), RegInfo, llvm::TargetMachine::resetTargetOptions(), SDB, llvm::MachineFunctionProperties::Selected, llvm::MachineFunction::setExposesReturnsTwice(), llvm::SwiftErrorValueTracking::setFunction(), llvm::MachineFrameInfo::setHasCalls(), llvm::MachineFunction::setHasInlineAsm(), llvm::MachineFunction::setUseDebugInstrRef(), llvm::MachineFunction::shouldUseDebugInstrRef(), llvm::FunctionPass::skipFunction(), llvm::MachineBasicBlock::succ_empty(), llvm::succ_empty(), llvm::TargetLowering::supportSplitCSR(), SwiftError, TII, TLI, TM, TRI, llvm::MachineRegisterInfo::use_instr_begin(), llvm::MachineRegisterInfo::use_instr_end(), llvm::MachineFunction::useDebugInstrRef(), UseMBPI, UseMI, and llvm::Register::virtReg2Index().

Referenced by AMDGPUDAGToDAGISel::runOnMachineFunction(), llvm::HexagonDAGToDAGISel::runOnMachineFunction(), llvm::LoongArchDAGToDAGISel::runOnMachineFunction(), llvm::MipsDAGToDAGISel::runOnMachineFunction(), llvm::NVPTXDAGToDAGISel::runOnMachineFunction(), and llvm::RISCVDAGToDAGISel::runOnMachineFunction().

◆ RunSDNodeXForm()

virtual SDValue llvm::SelectionDAGISel::RunSDNodeXForm ( SDValue  V,
unsigned  XFormNo 
)
inlinevirtual

Definition at line 431 of file SelectionDAGISel.h.

References llvm_unreachable.

Referenced by SelectCodeCommon().

◆ Select()

virtual void llvm::SelectionDAGISel::Select ( SDNode N)
pure virtual

Main hook for targets to transform nodes into machine nodes.

Implemented in AMDGPUDAGToDAGISel, llvm::HexagonDAGToDAGISel, llvm::LoongArchDAGToDAGISel, and llvm::RISCVDAGToDAGISel.

◆ SelectCodeCommon()

void SelectionDAGISel::SelectCodeCommon ( SDNode NodeToMatch,
const unsigned char MatcherTable,
unsigned  TableSize 
)

Definition at line 3065 of file SelectionDAGISel.cpp.

References llvm::ISD::ANNOTATION_LABEL, llvm::any_of(), llvm::SmallVectorImpl< T >::append(), llvm::ISD::ARITH_FENCE, assert(), llvm::ISD::AssertAlign, llvm::ISD::AssertSext, llvm::ISD::AssertZext, llvm::SmallVectorTemplateCommon< T, typename >::back(), llvm::ISD::BasicBlock, llvm::SmallVectorTemplateCommon< T, typename >::begin(), CheckAndImm(), CheckChild2CondCode(), CheckChildInteger(), CheckChildSame(), CheckChildType(), CheckComplexPattern(), CheckCondCode(), CheckInteger(), CheckNodePredicate(), CheckNodePredicateWithOperands(), CheckOpcode(), CheckOrImm(), CheckPatternPredicate(), CheckSame(), CheckType(), CheckValueType(), llvm::SmallVectorImpl< T >::clear(), ComplexPatternFuncMutatesDAG(), llvm::ISD::Constant, llvm::ISD::ConstantFP, llvm::ISD::CONVERGENCECTRL_ANCHOR, llvm::ISD::CONVERGENCECTRL_ENTRY, llvm::ISD::CONVERGENCECTRL_LOOP, llvm::ISD::CopyFromReg, llvm::ISD::CopyToReg, CurDAG, llvm::dbgs(), decodeSignRotatedValue(), llvm::ISD::DELETED_NODE, E, llvm::ISD::EH_LABEL, llvm::SmallVectorBase< Size_T >::empty(), llvm::SmallVectorTemplateCommon< T, typename >::end(), llvm::ISD::EntryToken, llvm::erase(), llvm::ISD::FREEZE, llvm::MCInstrInfo::get(), llvm::SelectionDAG::getCopyToReg(), llvm::SelectionDAG::getDataLayout(), llvm::SelectionDAG::getEntryNode(), getIncludePathForIndex(), llvm::SelectionDAG::getMachineNode(), llvm::SDValue::getNode(), getNumFixedFromVariadicInfo(), llvm::SDNode::getNumOperands(), llvm::SDNode::getNumValues(), llvm::SDNode::getOpcode(), llvm::SDNode::getOperand(), getPatternForIndex(), llvm::TargetLoweringBase::getPointerTy(), llvm::SelectionDAG::getRegister(), llvm::EVT::getSizeInBits(), llvm::SelectionDAG::getTargetConstant(), llvm::SelectionDAG::getTargetConstantFP(), llvm::SDValue::getValue(), llvm::SDValue::getValueSizeInBits(), llvm::SDValue::getValueType(), llvm::SDNode::getValueType(), GetVBR(), llvm::SelectionDAG::getVTList(), HandleMergeInputChains(), llvm::ISD::HANDLENODE, Idx, llvm::ISD::INLINEASM, llvm::ISD::INLINEASM_BR, llvm::is_contained(), llvm::ISD::isConstantSplatVectorAllOnes(), llvm::ISD::isConstantSplatVectorAllZeros(), IsLegalToFold(), llvm::SDNode::isMachineOpcode(), IsPredicateKnownToFail(), IsProfitableToFold(), llvm::ISD::JUMP_TABLE_DEBUG_INFO, llvm::ISD::LIFETIME_END, llvm::ISD::LIFETIME_START, LLVM_DEBUG, llvm::MCInstrDesc::mayLoad(), mayRaiseFPException(), llvm::MCInstrDesc::mayStore(), llvm::ISD::MCSymbol, llvm::ISD::MDNODE_SDNODE, llvm::ISD::MEMBARRIER, N, OPC_CaptureGlueInput, OPC_CheckAndImm, OPC_CheckChild0Integer, OPC_CheckChild0Same, OPC_CheckChild0Type, OPC_CheckChild0TypeI32, OPC_CheckChild0TypeI64, OPC_CheckChild1Integer, OPC_CheckChild1Same, OPC_CheckChild1Type, OPC_CheckChild1TypeI32, OPC_CheckChild1TypeI64, OPC_CheckChild2CondCode, OPC_CheckChild2Integer, OPC_CheckChild2Same, OPC_CheckChild2Type, OPC_CheckChild2TypeI32, OPC_CheckChild2TypeI64, OPC_CheckChild3Integer, OPC_CheckChild3Same, OPC_CheckChild3Type, OPC_CheckChild3TypeI32, OPC_CheckChild3TypeI64, OPC_CheckChild4Integer, OPC_CheckChild4Type, OPC_CheckChild4TypeI32, OPC_CheckChild4TypeI64, OPC_CheckChild5Type, OPC_CheckChild5TypeI32, OPC_CheckChild5TypeI64, OPC_CheckChild6Type, OPC_CheckChild6TypeI32, OPC_CheckChild6TypeI64, OPC_CheckChild7Type, OPC_CheckChild7TypeI32, OPC_CheckChild7TypeI64, OPC_CheckComplexPat, OPC_CheckComplexPat0, OPC_CheckComplexPat1, OPC_CheckComplexPat2, OPC_CheckComplexPat3, OPC_CheckComplexPat4, OPC_CheckComplexPat5, OPC_CheckComplexPat6, OPC_CheckComplexPat7, OPC_CheckCondCode, OPC_CheckFoldableChainNode, OPC_CheckImmAllOnesV, OPC_CheckImmAllZerosV, OPC_CheckInteger, OPC_CheckOpcode, OPC_CheckOrImm, OPC_CheckPatternPredicate, OPC_CheckPatternPredicate0, OPC_CheckPatternPredicate1, OPC_CheckPatternPredicate2, OPC_CheckPatternPredicate3, OPC_CheckPatternPredicate4, OPC_CheckPatternPredicate5, OPC_CheckPatternPredicate6, OPC_CheckPatternPredicate7, OPC_CheckPatternPredicateTwoByte, OPC_CheckPredicate, OPC_CheckPredicate0, OPC_CheckPredicate1, OPC_CheckPredicate2, OPC_CheckPredicate3, OPC_CheckPredicate4, OPC_CheckPredicate5, OPC_CheckPredicate6, OPC_CheckPredicate7, OPC_CheckPredicateWithOperands, OPC_CheckSame, OPC_CheckType, OPC_CheckTypeI32, OPC_CheckTypeI64, OPC_CheckTypeRes, OPC_CheckValueType, OPC_CompleteMatch, OPC_Coverage, OPC_EmitConvertToTarget, OPC_EmitConvertToTarget0, OPC_EmitConvertToTarget1, OPC_EmitConvertToTarget2, OPC_EmitConvertToTarget3, OPC_EmitConvertToTarget4, OPC_EmitConvertToTarget5, OPC_EmitConvertToTarget6, OPC_EmitConvertToTarget7, OPC_EmitCopyToReg, OPC_EmitCopyToReg0, OPC_EmitCopyToReg1, OPC_EmitCopyToReg2, OPC_EmitCopyToReg3, OPC_EmitCopyToReg4, OPC_EmitCopyToReg5, OPC_EmitCopyToReg6, OPC_EmitCopyToReg7, OPC_EmitCopyToRegTwoByte, OPC_EmitInteger, OPC_EmitInteger16, OPC_EmitInteger32, OPC_EmitInteger64, OPC_EmitInteger8, OPC_EmitMergeInputChains, OPC_EmitMergeInputChains1_0, OPC_EmitMergeInputChains1_1, OPC_EmitMergeInputChains1_2, OPC_EmitNode, OPC_EmitNode0, OPC_EmitNode0Chain, OPC_EmitNode0None, OPC_EmitNode1, OPC_EmitNode1Chain, OPC_EmitNode1None, OPC_EmitNode2, OPC_EmitNode2Chain, OPC_EmitNode2None, OPC_EmitNodeXForm, OPC_EmitRegister, OPC_EmitRegister2, OPC_EmitRegisterI32, OPC_EmitRegisterI64, OPC_EmitStringInteger, OPC_EmitStringInteger32, OPC_MorphNodeTo, OPC_MorphNodeTo0, OPC_MorphNodeTo0Chain, OPC_MorphNodeTo0GlueInput, OPC_MorphNodeTo0GlueOutput, OPC_MorphNodeTo0None, OPC_MorphNodeTo1, OPC_MorphNodeTo1Chain, OPC_MorphNodeTo1GlueInput, OPC_MorphNodeTo1GlueOutput, OPC_MorphNodeTo1None, OPC_MorphNodeTo2, OPC_MorphNodeTo2Chain, OPC_MorphNodeTo2GlueInput, OPC_MorphNodeTo2GlueOutput, OPC_MorphNodeTo2None, OPC_MoveChild, OPC_MoveChild0, OPC_MoveChild1, OPC_MoveChild2, OPC_MoveChild3, OPC_MoveChild4, OPC_MoveChild5, OPC_MoveChild6, OPC_MoveChild7, OPC_MoveParent, OPC_MoveSibling, OPC_MoveSibling0, OPC_MoveSibling1, OPC_MoveSibling2, OPC_MoveSibling3, OPC_MoveSibling4, OPC_MoveSibling5, OPC_MoveSibling6, OPC_MoveSibling7, OPC_RecordChild0, OPC_RecordChild1, OPC_RecordChild2, OPC_RecordChild3, OPC_RecordChild4, OPC_RecordChild5, OPC_RecordChild6, OPC_RecordChild7, OPC_RecordMemRef, OPC_RecordNode, OPC_Scope, OPC_SwitchOpcode, OPC_SwitchType, Operands, OPFL_Chain, OPFL_GlueInput, OPFL_GlueOutput, OPFL_MemRefs, OPFL_None, OPFL_VariadicInfo, OptLevel, llvm::ISD::PATCHPOINT, llvm::SmallVectorTemplateBase< T, bool >::pop_back(), llvm::ISD::PSEUDO_PROBE, llvm::SmallVectorTemplateBase< T, bool >::push_back(), llvm::ISD::READ_REGISTER, llvm::ISD::Register, llvm::ISD::RegisterMask, llvm::SelectionDAG::RemoveDeadNode(), ReplaceUses(), llvm::SmallVectorImpl< T >::resize(), RunSDNodeXForm(), llvm::SelectionDAG::salvageDebugInfo(), llvm::SDNode::setNodeId(), llvm::SelectionDAG::setNodeMemRefs(), llvm::SmallVectorBase< Size_T >::size(), llvm::ISD::STACKMAP, llvm::ISD::TargetBlockAddress, llvm::ISD::TargetConstant, llvm::ISD::TargetConstantFP, llvm::ISD::TargetConstantPool, llvm::ISD::TargetExternalSymbol, llvm::ISD::TargetFrameIndex, llvm::ISD::TargetGlobalAddress, llvm::ISD::TargetGlobalTLSAddress, llvm::ISD::TargetJumpTable, TII, TLI, llvm::ISD::TokenFactor, llvm::ISD::UNDEF, llvm::SDNode::use_begin(), llvm::SDNode::use_empty(), llvm::SDNode::use_end(), and llvm::ISD::WRITE_REGISTER.

◆ SelectInlineAsmMemoryOperand()

virtual bool llvm::SelectionDAGISel::SelectInlineAsmMemoryOperand ( const SDValue Op,
InlineAsm::ConstraintCode  ConstraintID,
std::vector< SDValue > &  OutOps 
)
inlinevirtual

SelectInlineAsmMemoryOperand - Select the specified address as a target addressing mode, according to the specified constraint.

If this does not match or is not implemented, return true. The resultant operands (which will appear in the machine instruction) should be added to the OutOps vector.

Reimplemented in llvm::HexagonDAGToDAGISel, llvm::LoongArchDAGToDAGISel, llvm::NVPTXDAGToDAGISel, and llvm::RISCVDAGToDAGISel.

Definition at line 100 of file SelectionDAGISel.h.

Referenced by SelectInlineAsmMemoryOperands().

◆ SelectInlineAsmMemoryOperands()

void SelectionDAGISel::SelectInlineAsmMemoryOperands ( std::vector< SDValue > &  Ops,
const SDLoc DL 
)
protected

◆ shouldOptForSize()

bool llvm::SelectionDAGISel::shouldOptForSize ( const MachineFunction MF) const
inlineprotected

Definition at line 386 of file SelectionDAGISel.h.

References CurDAG, and llvm::SelectionDAG::shouldOptForSize().

Member Data Documentation

◆ AA

AAResults* llvm::SelectionDAGISel::AA = nullptr

◆ AC

AssumptionCache* llvm::SelectionDAGISel::AC = nullptr

Definition at line 52 of file SelectionDAGISel.h.

Referenced by runOnMachineFunction().

◆ CurDAG

SelectionDAG* llvm::SelectionDAGISel::CurDAG

Definition at line 49 of file SelectionDAGISel.h.

Referenced by llvm::RISCVDAGToDAGISel::addVectorLoadStoreOperands(), CheckAndMask(), CheckOrMask(), llvm::HexagonDAGToDAGISel::DetectUseSxtw(), llvm::HexagonDAGToDAGISel::FastFDiv(), llvm::HexagonDAGToDAGISel::FDiv(), llvm::MipsDAGToDAGISel::getGlobalBaseReg(), IsPredicateKnownToFail(), llvm::HexagonDAGToDAGISel::LoadInstrForLoadIntrinsic(), AMDGPUDAGToDAGISel::matchLoadD16FromBuildVector(), AMDGPUDAGToDAGISel::PostprocessISelDAG(), llvm::RISCVDAGToDAGISel::PostprocessISelDAG(), AMDGPUDAGToDAGISel::PreprocessISelDAG(), llvm::HexagonDAGToDAGISel::PreprocessISelDAG(), llvm::RISCVDAGToDAGISel::PreprocessISelDAG(), ReplaceNode(), ReplaceUses(), runOnMachineFunction(), AMDGPUDAGToDAGISel::Select(), llvm::RISCVDAGToDAGISel::Select(), llvm::LoongArchDAGToDAGISel::SelectAddrConstant(), llvm::HexagonDAGToDAGISel::SelectAddrFI(), llvm::RISCVDAGToDAGISel::SelectAddrFrameIndex(), llvm::RISCVDAGToDAGISel::SelectAddrRegImm(), llvm::RISCVDAGToDAGISel::SelectAddrRegImmLsb00000(), llvm::RISCVDAGToDAGISel::SelectAddrRegRegScale(), llvm::HexagonDAGToDAGISel::SelectAddSubCarry(), llvm::HexagonDAGToDAGISel::SelectAnyImmediate(), llvm::HexagonDAGToDAGISel::SelectAnyInt(), llvm::LoongArchDAGToDAGISel::SelectBaseAddr(), llvm::HexagonDAGToDAGISel::SelectBrevLdIntrinsic(), AMDGPUDAGToDAGISel::SelectBuildVector(), SelectCodeCommon(), llvm::HexagonDAGToDAGISel::SelectConstant(), llvm::HexagonDAGToDAGISel::SelectConstantFP(), llvm::HexagonDAGToDAGISel::SelectD2P(), llvm::HexagonDAGToDAGISel::SelectExtractSubvector(), llvm::RISCVDAGToDAGISel::selectFPImm(), llvm::RISCVDAGToDAGISel::SelectFrameAddrRegImm(), llvm::HexagonDAGToDAGISel::SelectFrameIndex(), llvm::HexagonDAGToDAGISel::SelectGlobalAddress(), llvm::HexagonDAGToDAGISel::SelectHVXDualOutput(), llvm::HexagonDAGToDAGISel::SelectIndexedStore(), llvm::HexagonDAGToDAGISel::SelectInlineAsmMemoryOperand(), llvm::LoongArchDAGToDAGISel::SelectInlineAsmMemoryOperand(), llvm::NVPTXDAGToDAGISel::SelectInlineAsmMemoryOperand(), llvm::RISCVDAGToDAGISel::SelectInlineAsmMemoryOperand(), SelectInlineAsmMemoryOperands(), llvm::HexagonDAGToDAGISel::SelectIntrinsicWChain(), llvm::HexagonDAGToDAGISel::SelectIntrinsicWOChain(), llvm::HexagonDAGToDAGISel::SelectNewCircIntrinsic(), llvm::HexagonDAGToDAGISel::SelectP2D(), llvm::HexagonDAGToDAGISel::SelectQ2V(), llvm::RISCVDAGToDAGISel::selectRVVSimm5(), llvm::RISCVDAGToDAGISel::selectSETCC(), llvm::RISCVDAGToDAGISel::selectSExtBits(), llvm::LoongArchDAGToDAGISel::selectSExti32(), llvm::RISCVDAGToDAGISel::selectSF_VC_X_SE(), llvm::LoongArchDAGToDAGISel::selectShiftMask(), llvm::RISCVDAGToDAGISel::selectShiftMask(), llvm::HexagonDAGToDAGISel::SelectSHL(), llvm::RISCVDAGToDAGISel::selectSHXADD_UWOp(), llvm::RISCVDAGToDAGISel::selectSHXADDOp(), llvm::RISCVDAGToDAGISel::selectSimm5Shl2(), llvm::HexagonDAGToDAGISel::SelectTypecast(), llvm::HexagonDAGToDAGISel::SelectV2Q(), llvm::HexagonDAGToDAGISel::SelectV65Gather(), llvm::HexagonDAGToDAGISel::SelectV65GatherPred(), llvm::HexagonDAGToDAGISel::SelectVAlign(), llvm::HexagonDAGToDAGISel::SelectVAlignAddr(), llvm::RISCVDAGToDAGISel::selectVLOp(), llvm::RISCVDAGToDAGISel::selectVLSEG(), llvm::RISCVDAGToDAGISel::selectVLSEGFF(), llvm::RISCVDAGToDAGISel::selectVLXSEG(), llvm::RISCVDAGToDAGISel::selectVSETVLI(), llvm::LoongArchDAGToDAGISel::selectVSplatImm(), llvm::RISCVDAGToDAGISel::selectVSplatSimm5(), llvm::RISCVDAGToDAGISel::selectVSplatSimm5Plus1(), llvm::RISCVDAGToDAGISel::selectVSplatSimm5Plus1NonZero(), llvm::RISCVDAGToDAGISel::selectVSplatUimm(), llvm::LoongArchDAGToDAGISel::selectVSplatUimmInvPow2(), llvm::LoongArchDAGToDAGISel::selectVSplatUimmPow2(), llvm::RISCVDAGToDAGISel::selectVSSEG(), llvm::RISCVDAGToDAGISel::selectVSXSEG(), llvm::RISCVDAGToDAGISel::selectZExtBits(), llvm::LoongArchDAGToDAGISel::selectZExti32(), shouldOptForSize(), llvm::HexagonDAGToDAGISel::StoreInstrForLoadIntrinsic(), llvm::RISCVDAGToDAGISel::tryIndexedLoad(), llvm::HexagonDAGToDAGISel::tryLoadOfLoadIntrinsic(), llvm::RISCVDAGToDAGISel::tryShrinkShlLogicImm(), llvm::RISCVDAGToDAGISel::trySignedBitfieldExtract(), and ~SelectionDAGISel().

◆ DAGSize

unsigned llvm::SelectionDAGISel::DAGSize = 0
protected

DAGSize - Size of DAG being instruction selected.

Definition at line 340 of file SelectionDAGISel.h.

◆ ElidedArgCopyInstrs

SmallPtrSet<const Instruction *, 4> llvm::SelectionDAGISel::ElidedArgCopyInstrs

Definition at line 58 of file SelectionDAGISel.h.

◆ FastISelFailed

bool llvm::SelectionDAGISel::FastISelFailed

Definition at line 57 of file SelectionDAGISel.h.

Referenced by runOnMachineFunction().

◆ FuncInfo

std::unique_ptr<FunctionLoweringInfo> llvm::SelectionDAGISel::FuncInfo

Definition at line 45 of file SelectionDAGISel.h.

Referenced by runOnMachineFunction().

◆ GFI

GCFunctionInfo* llvm::SelectionDAGISel::GFI = nullptr

Definition at line 53 of file SelectionDAGISel.h.

Referenced by runOnMachineFunction().

◆ LibInfo

const TargetLibraryInfo* llvm::SelectionDAGISel::LibInfo

Definition at line 44 of file SelectionDAGISel.h.

Referenced by runOnMachineFunction().

◆ MatchFilterFuncName

bool llvm::SelectionDAGISel::MatchFilterFuncName = false

True if the function currently processing is in the function printing list (i.e.

-filter-print-funcs). This is primarily used by ISEL_DUMP, which spans in multiple member functions. Storing the filter result here so that we only need to do the filtering once.

Definition at line 69 of file SelectionDAGISel.h.

Referenced by runOnMachineFunction().

◆ MF

MachineFunction* llvm::SelectionDAGISel::MF

◆ OptLevel

CodeGenOptLevel llvm::SelectionDAGISel::OptLevel

◆ ORE

std::unique_ptr<OptimizationRemarkEmitter> llvm::SelectionDAGISel::ORE

Current optimization remark emitter.

Used to report things like combines and FastISel failures.

Definition at line 62 of file SelectionDAGISel.h.

Referenced by runOnMachineFunction().

◆ RegInfo

MachineRegisterInfo* llvm::SelectionDAGISel::RegInfo

Definition at line 48 of file SelectionDAGISel.h.

Referenced by runOnMachineFunction().

◆ SDB

std::unique_ptr<SelectionDAGBuilder> llvm::SelectionDAGISel::SDB

Definition at line 50 of file SelectionDAGISel.h.

Referenced by runOnMachineFunction().

◆ SwiftError

SwiftErrorValueTracking* llvm::SelectionDAGISel::SwiftError

Definition at line 46 of file SelectionDAGISel.h.

Referenced by runOnMachineFunction(), and ~SelectionDAGISel().

◆ TII

const TargetInstrInfo* llvm::SelectionDAGISel::TII

◆ TLI

const TargetLowering* llvm::SelectionDAGISel::TLI

◆ TM

TargetMachine& llvm::SelectionDAGISel::TM

The documentation for this class was generated from the following files: