SelectionDAGISel - This is the common base class used for SelectionDAG-based pattern-matching instruction selectors. More...
#include "llvm/CodeGen/SelectionDAGISel.h"
Public Member Functions | |
| SelectionDAGISel (TargetMachine &tm, CodeGenOptLevel OL=CodeGenOptLevel::Default) | |
| virtual | ~SelectionDAGISel () |
| BatchAAResults * | getBatchAA () const |
| Returns a (possibly null) pointer to the current BatchAAResults. | |
| const TargetLowering * | getTargetLowering () const |
| void | initializeAnalysisResults (MachineFunctionAnalysisManager &MFAM) |
| void | initializeAnalysisResults (MachineFunctionPass &MFP) |
| virtual bool | runOnMachineFunction (MachineFunction &mf) |
| virtual void | emitFunctionEntryCode () |
| virtual void | PreprocessISelDAG () |
| PreprocessISelDAG - This hook allows targets to hack on the graph before instruction selection starts. | |
| virtual void | PostprocessISelDAG () |
| PostprocessISelDAG() - This hook allows the target to hack on the graph right after selection. | |
| virtual void | Select (SDNode *N)=0 |
| Main hook for targets to transform nodes into machine nodes. | |
| virtual bool | SelectInlineAsmMemoryOperand (const SDValue &Op, InlineAsm::ConstraintCode ConstraintID, std::vector< SDValue > &OutOps) |
| SelectInlineAsmMemoryOperand - Select the specified address as a target addressing mode, according to the specified constraint. | |
| virtual bool | IsProfitableToFold (SDValue N, SDNode *U, SDNode *Root) const |
| IsProfitableToFold - Returns true if it's profitable to fold the specific operand node N of U during instruction selection that starts at Root. | |
| bool | CheckAndMask (SDValue LHS, ConstantSDNode *RHS, int64_t DesiredMaskS) const |
| CheckAndMask - The isel is trying to match something like (and X, 255). | |
| bool | CheckOrMask (SDValue LHS, ConstantSDNode *RHS, int64_t DesiredMaskS) const |
| CheckOrMask - The isel is trying to match something like (or X, 255). | |
| virtual bool | CheckPatternPredicate (unsigned PredNo) const |
| CheckPatternPredicate - This function is generated by tblgen in the target. | |
| virtual bool | CheckNodePredicate (SDNode *N, unsigned PredNo) const |
| CheckNodePredicate - This function is generated by tblgen in the target. | |
| virtual bool | CheckNodePredicateWithOperands (SDNode *N, unsigned PredNo, const SmallVectorImpl< SDValue > &Operands) const |
| CheckNodePredicateWithOperands - This function is generated by tblgen in the target. | |
| virtual bool | CheckComplexPattern (SDNode *Root, SDNode *Parent, SDValue N, unsigned PatternNo, SmallVectorImpl< std::pair< SDValue, SDNode * > > &Result) |
| virtual SDValue | RunSDNodeXForm (SDValue V, unsigned XFormNo) |
| void | SelectCodeCommon (SDNode *NodeToMatch, const unsigned char *MatcherTable, unsigned TableSize) |
| virtual bool | ComplexPatternFuncMutatesDAG () const |
| Return true if complex patterns for this target can mutate the DAG. | |
| bool | mayRaiseFPException (SDNode *Node) const |
| Return whether the node may raise an FP exception. | |
| bool | isOrEquivalentToAdd (const SDNode *N) const |
Static Public Member Functions | |
| static bool | IsLegalToFold (SDValue N, SDNode *U, SDNode *Root, CodeGenOptLevel OptLevel, bool IgnoreChains=false) |
| IsLegalToFold - Returns true if the specific operand node N of U can be folded during instruction selection that starts at Root. | |
| static void | InvalidateNodeId (SDNode *N) |
| static int | getUninvalidatedNodeId (SDNode *N) |
| static void | EnforceNodeIdInvariant (SDNode *N) |
| static int | getNumFixedFromVariadicInfo (unsigned Flags) |
| getNumFixedFromVariadicInfo - Transform an EmitNode flags word into the number of fixed arity values that should be skipped when copying from the root. | |
Public Attributes | |
| TargetMachine & | TM |
| const TargetLibraryInfo * | LibInfo |
| std::unique_ptr< FunctionLoweringInfo > | FuncInfo |
| SwiftErrorValueTracking * | SwiftError |
| MachineFunction * | MF |
| MachineModuleInfo * | MMI |
| MachineRegisterInfo * | RegInfo |
| SelectionDAG * | CurDAG |
| std::unique_ptr< SelectionDAGBuilder > | SDB |
| std::optional< BatchAAResults > | BatchAA |
| AssumptionCache * | AC = nullptr |
| GCFunctionInfo * | GFI = nullptr |
| SSPLayoutInfo * | SP = nullptr |
| CodeGenOptLevel | OptLevel |
| const TargetInstrInfo * | TII |
| const TargetLowering * | TLI |
| bool | FastISelFailed |
| SmallPtrSet< const Instruction *, 4 > | ElidedArgCopyInstrs |
| std::unique_ptr< OptimizationRemarkEmitter > | ORE |
| Current optimization remark emitter. | |
| bool | MatchFilterFuncName = false |
| True if the function currently processing is in the function printing list (i.e. | |
| StringRef | FuncName |
Protected Member Functions | |
| void | ReplaceUses (SDValue F, SDValue T) |
| ReplaceUses - replace all uses of the old node F with the use of the new node T. | |
| void | ReplaceUses (const SDValue *F, const SDValue *T, unsigned Num) |
| ReplaceUses - replace all uses of the old nodes F with the use of the new nodes T. | |
| void | ReplaceUses (SDNode *F, SDNode *T) |
| ReplaceUses - replace all uses of the old node F with the use of the new node T. | |
| void | ReplaceNode (SDNode *F, SDNode *T) |
Replace all uses of F with T, then remove F from the DAG. | |
| void | SelectInlineAsmMemoryOperands (std::vector< SDValue > &Ops, const SDLoc &DL) |
| SelectInlineAsmMemoryOperands - Calls to this are automatically generated by tblgen. | |
| virtual StringRef | getPatternForIndex (unsigned index) |
| getPatternForIndex - Patterns selected by tablegen during ISEL | |
| virtual StringRef | getIncludePathForIndex (unsigned index) |
| getIncludePathForIndex - get the td source location of pattern instantiation | |
| bool | shouldOptForSize (const MachineFunction *MF) const |
Protected Attributes | |
| unsigned | DAGSize = 0 |
| DAGSize - Size of DAG being instruction selected. | |
Detailed Description
SelectionDAGISel - This is the common base class used for SelectionDAG-based pattern-matching instruction selectors.
Definition at line 45 of file SelectionDAGISel.h.
Member Enumeration Documentation
◆ anonymous enum
| anonymous enum |
| Enumerator | |
|---|---|
| OPFL_None | |
| OPFL_Chain | |
| OPFL_GlueInput | |
| OPFL_GlueOutput | |
| OPFL_MemRefs | |
| OPFL_Variadic0 | |
| OPFL_Variadic1 | |
| OPFL_Variadic2 | |
| OPFL_Variadic3 | |
| OPFL_Variadic4 | |
| OPFL_Variadic5 | |
| OPFL_Variadic6 | |
| OPFL_VariadicInfo | |
Definition at line 330 of file SelectionDAGISel.h.
◆ BuiltinOpcodes
Definition at line 142 of file SelectionDAGISel.h.
Constructor & Destructor Documentation
◆ SelectionDAGISel()
|
explicit |
◆ ~SelectionDAGISel()
|
virtual |
Definition at line 392 of file SelectionDAGISel.cpp.
References CurDAG, and SwiftError.
Member Function Documentation
◆ CheckAndMask()
| bool SelectionDAGISel::CheckAndMask | ( | SDValue | LHS, |
| ConstantSDNode * | RHS, | ||
| int64_t | DesiredMaskS | ||
| ) | const |
CheckAndMask - The isel is trying to match something like (and X, 255).
If the dag combiner simplified the 255, we still want to match. RHS is the actual value in the DAG on the RHS of an AND, and DesiredMaskS is the value specified in the .td file (e.g. 255).
Definition at line 2203 of file SelectionDAGISel.cpp.
References CurDAG, llvm::APInt::isSubsetOf(), LHS, llvm::SelectionDAG::MaskedValueIsZero(), and RHS.
Referenced by CheckAndImm().
◆ CheckComplexPattern()
|
inlinevirtual |
Definition at line 443 of file SelectionDAGISel.h.
References llvm_unreachable.
Referenced by SelectCodeCommon().
◆ CheckNodePredicate()
|
inlinevirtual |
CheckNodePredicate - This function is generated by tblgen in the target.
It runs node predicate number PredNo and returns true if it succeeds or false if it fails. The number is a private implementation detail to the code tblgen produces.
Definition at line 428 of file SelectionDAGISel.h.
References llvm_unreachable.
Referenced by CheckNodePredicate(), and SelectCodeCommon().
◆ CheckNodePredicateWithOperands()
|
inlinevirtual |
CheckNodePredicateWithOperands - This function is generated by tblgen in the target.
It runs node predicate number PredNo and returns true if it succeeds or false if it fails. The number is a private implementation detail to the code tblgen produces.
Definition at line 437 of file SelectionDAGISel.h.
References llvm_unreachable.
Referenced by SelectCodeCommon().
◆ CheckOrMask()
| bool SelectionDAGISel::CheckOrMask | ( | SDValue | LHS, |
| ConstantSDNode * | RHS, | ||
| int64_t | DesiredMaskS | ||
| ) | const |
CheckOrMask - The isel is trying to match something like (or X, 255).
If the dag combiner simplified the 255, we still want to match. RHS is the actual value in the DAG on the RHS of an OR, and DesiredMaskS is the value specified in the .td file (e.g. 255).
Definition at line 2235 of file SelectionDAGISel.cpp.
References llvm::SelectionDAG::computeKnownBits(), CurDAG, llvm::APInt::isSubsetOf(), LHS, llvm::KnownBits::One, and RHS.
Referenced by CheckOrImm().
◆ CheckPatternPredicate()
CheckPatternPredicate - This function is generated by tblgen in the target.
It runs the specified pattern predicate and returns true if it succeeds or false if it fails. The number is a private implementation detail to the code tblgen produces.
Definition at line 420 of file SelectionDAGISel.h.
References llvm_unreachable.
Referenced by CheckPatternPredicate(), and SelectCodeCommon().
◆ ComplexPatternFuncMutatesDAG()
|
inlinevirtual |
Return true if complex patterns for this target can mutate the DAG.
Reimplemented in llvm::HexagonDAGToDAGISel.
Definition at line 458 of file SelectionDAGISel.h.
Referenced by SelectCodeCommon().
◆ emitFunctionEntryCode()
|
inlinevirtual |
Reimplemented in llvm::HexagonDAGToDAGISel.
Definition at line 99 of file SelectionDAGISel.h.
◆ EnforceNodeIdInvariant()
|
static |
Definition at line 1225 of file SelectionDAGISel.cpp.
References llvm::SmallVectorBase< Size_T >::empty(), InvalidateNodeId(), N, llvm::SmallVectorImpl< T >::pop_back_val(), and llvm::SmallVectorTemplateBase< T, bool >::push_back().
Referenced by ReplaceNode(), and ReplaceUses().
◆ getBatchAA()
|
inline |
Returns a (possibly null) pointer to the current BatchAAResults.
Definition at line 86 of file SelectionDAGISel.h.
References BatchAA.
Referenced by runOnMachineFunction().
◆ getIncludePathForIndex()
|
inlineprotectedvirtual |
getIncludePathForIndex - get the td source location of pattern instantiation
Definition at line 400 of file SelectionDAGISel.h.
References llvm_unreachable.
Referenced by SelectCodeCommon().
◆ getNumFixedFromVariadicInfo()
|
inlinestatic |
getNumFixedFromVariadicInfo - Transform an EmitNode flags word into the number of fixed arity values that should be skipped when copying from the root.
Definition at line 350 of file SelectionDAGISel.h.
References OPFL_VariadicInfo.
Referenced by SelectCodeCommon().
◆ getPatternForIndex()
|
inlineprotectedvirtual |
getPatternForIndex - Patterns selected by tablegen during ISEL
Definition at line 395 of file SelectionDAGISel.h.
References llvm_unreachable.
Referenced by SelectCodeCommon().
◆ getTargetLowering()
|
inline |
Definition at line 92 of file SelectionDAGISel.h.
References TLI.
Referenced by llvm::MipsDAGToDAGISel::getGlobalBaseReg(), llvm::AMDGPUDAGToDAGISel::PostprocessISelDAG(), and llvm::AMDGPUDAGToDAGISel::Select().
◆ getUninvalidatedNodeId()
|
static |
◆ initializeAnalysisResults() [1/2]
| void SelectionDAGISel::initializeAnalysisResults | ( | MachineFunctionAnalysisManager & | MFAM | ) |
Definition at line 458 of file SelectionDAGISel.cpp.
References AC, BatchAA, CurDAG, FAM, FuncInfo, FuncName, llvm::AnalysisManager< IRUnitT, ExtraArgTs >::getCachedResult(), llvm::MachineFunction::getFunction(), llvm::TargetSubtargetInfo::getInstrInfo(), llvm::Value::getName(), llvm::GlobalValue::getParent(), llvm::MachineFunction::getRegInfo(), llvm::AnalysisManager< IRUnitT, ExtraArgTs >::getResult(), llvm::MachineFunction::getSubtarget(), llvm::TargetSubtargetInfo::getTargetLowering(), GFI, llvm::Function::hasGC(), llvm::SelectionDAG::init(), llvm::isAssignmentTrackingEnabled(), llvm::isFunctionInPrintList(), LibInfo, MatchFilterFuncName, MF, MMI, llvm::None, OptLevel, ORE, RegInfo, SP, TII, TLI, and UseMBPI.
◆ initializeAnalysisResults() [2/2]
| void SelectionDAGISel::initializeAnalysisResults | ( | MachineFunctionPass & | MFP | ) |
Definition at line 516 of file SelectionDAGISel.cpp.
References AC, BatchAA, CurDAG, FuncInfo, FuncName, llvm::AAResultsWrapperPass::getAAResults(), llvm::Pass::getAnalysis(), llvm::Pass::getAnalysisIfAvailable(), llvm::MachineFunction::getFunction(), llvm::TargetSubtargetInfo::getInstrInfo(), llvm::Value::getName(), llvm::GlobalValue::getParent(), llvm::MachineFunction::getRegInfo(), llvm::MachineFunction::getSubtarget(), llvm::TargetSubtargetInfo::getTargetLowering(), GFI, llvm::Function::hasGC(), llvm::SelectionDAG::init(), llvm::isAssignmentTrackingEnabled(), llvm::isFunctionInPrintList(), LibInfo, MatchFilterFuncName, MF, MMI, llvm::None, OptLevel, ORE, RegInfo, SP, TII, TLI, and UseMBPI.
◆ InvalidateNodeId()
|
static |
Definition at line 1244 of file SelectionDAGISel.cpp.
References N.
Referenced by EnforceNodeIdInvariant(), and insertDAGNode().
◆ IsLegalToFold()
|
static |
IsLegalToFold - Returns true if the specific operand node N of U can be folded during instruction selection that starts at Root.
FIXME: This is a static member function because the MSP430/X86 targets, which uses it during isel. This could become a proper member.
Definition at line 2386 of file SelectionDAGISel.cpp.
References findNonImmUse(), llvm::SDNode::getGluedUser(), llvm::SDNode::getNumValues(), llvm::SDNode::getValueType(), N, llvm::None, and OptLevel.
Referenced by llvm::RISCVDAGToDAGISel::Select(), and SelectCodeCommon().
◆ isOrEquivalentToAdd()
Definition at line 4395 of file SelectionDAGISel.cpp.
References A, assert(), llvm::CallingConv::C, llvm::MachineFunction::getFrameInfo(), llvm::MachineFrameInfo::getObjectAlign(), MF, N, and llvm::ISD::OR.
◆ IsProfitableToFold()
IsProfitableToFold - Returns true if it's profitable to fold the specific operand node N of U during instruction selection that starts at Root.
Definition at line 2377 of file SelectionDAGISel.cpp.
References N, llvm::None, and OptLevel.
Referenced by llvm::RISCVDAGToDAGISel::Select(), and SelectCodeCommon().
◆ mayRaiseFPException()
Return whether the node may raise an FP exception.
Definition at line 4379 of file SelectionDAGISel.cpp.
References CurDAG, llvm::MCInstrInfo::get(), llvm::SelectionDAG::getSelectionDAGInfo(), llvm::MCInstrDesc::mayRaiseFPException(), llvm::SelectionDAGTargetInfo::mayRaiseFPException(), N, and TII.
Referenced by SelectCodeCommon().
◆ PostprocessISelDAG()
|
inlinevirtual |
PostprocessISelDAG() - This hook allows the target to hack on the graph right after selection.
Reimplemented in llvm::AMDGPUDAGToDAGISel, and llvm::RISCVDAGToDAGISel.
Definition at line 107 of file SelectionDAGISel.h.
◆ PreprocessISelDAG()
|
inlinevirtual |
PreprocessISelDAG - This hook allows targets to hack on the graph before instruction selection starts.
Reimplemented in llvm::AMDGPUDAGToDAGISel, llvm::HexagonDAGToDAGISel, and llvm::RISCVDAGToDAGISel.
Definition at line 103 of file SelectionDAGISel.h.
Referenced by INITIALIZE_PASS().
◆ ReplaceNode()
Replace all uses of F with T, then remove F from the DAG.
Definition at line 383 of file SelectionDAGISel.h.
References CurDAG, EnforceNodeIdInvariant(), F, llvm::SelectionDAG::RemoveDeadNode(), and llvm::SelectionDAG::ReplaceAllUsesWith().
Referenced by llvm::HexagonDAGToDAGISel::FastFDiv(), llvm::HexagonDAGToDAGISel::FDiv(), llvm::AMDGPUDAGToDAGISel::Select(), llvm::RISCVDAGToDAGISel::Select(), llvm::HexagonDAGToDAGISel::SelectAddSubCarry(), llvm::HexagonDAGToDAGISel::SelectConstant(), llvm::HexagonDAGToDAGISel::SelectConstantFP(), llvm::HexagonDAGToDAGISel::SelectD2P(), llvm::HexagonDAGToDAGISel::SelectExtractSubvector(), llvm::HvxSelector::selectExtractSubvector(), llvm::HexagonDAGToDAGISel::SelectFrameIndex(), llvm::HexagonDAGToDAGISel::SelectIntrinsicWOChain(), llvm::HexagonDAGToDAGISel::SelectP2D(), llvm::HexagonDAGToDAGISel::SelectQ2V(), llvm::HvxSelector::selectRor(), llvm::RISCVDAGToDAGISel::selectSF_VC_X_SE(), llvm::HexagonDAGToDAGISel::SelectSHL(), llvm::HvxSelector::selectShuffle(), llvm::HexagonDAGToDAGISel::SelectTypecast(), llvm::HexagonDAGToDAGISel::SelectV2Q(), llvm::HexagonDAGToDAGISel::SelectV65Gather(), llvm::HexagonDAGToDAGISel::SelectV65GatherPred(), llvm::HexagonDAGToDAGISel::SelectVAlign(), llvm::HvxSelector::selectVAlign(), llvm::HexagonDAGToDAGISel::SelectVAlignAddr(), llvm::RISCVDAGToDAGISel::selectVSETVLI(), llvm::RISCVDAGToDAGISel::selectVSSEG(), llvm::RISCVDAGToDAGISel::selectVSXSEG(), llvm::RISCVDAGToDAGISel::tryIndexedLoad(), llvm::RISCVDAGToDAGISel::tryShrinkShlLogicImm(), and llvm::RISCVDAGToDAGISel::trySignedBitfieldExtract().
◆ ReplaceUses() [1/3]
|
inlineprotected |
ReplaceUses - replace all uses of the old nodes F with the use of the new nodes T.
Definition at line 369 of file SelectionDAGISel.h.
References CurDAG, EnforceNodeIdInvariant(), F, getNode(), and llvm::SelectionDAG::ReplaceAllUsesOfValuesWith().
◆ ReplaceUses() [2/3]
ReplaceUses - replace all uses of the old node F with the use of the new node T.
Definition at line 377 of file SelectionDAGISel.h.
References CurDAG, EnforceNodeIdInvariant(), F, and llvm::SelectionDAG::ReplaceAllUsesWith().
◆ ReplaceUses() [3/3]
ReplaceUses - replace all uses of the old node F with the use of the new node T.
Definition at line 362 of file SelectionDAGISel.h.
References CurDAG, EnforceNodeIdInvariant(), F, and llvm::SelectionDAG::ReplaceAllUsesOfValueWith().
Referenced by llvm::AMDGPUDAGToDAGISel::PostprocessISelDAG(), llvm::RISCVDAGToDAGISel::Select(), llvm::HexagonDAGToDAGISel::SelectBrevLdIntrinsic(), SelectCodeCommon(), llvm::HexagonDAGToDAGISel::SelectHVXDualOutput(), llvm::HexagonDAGToDAGISel::SelectIndexedStore(), llvm::HexagonDAGToDAGISel::SelectNewCircIntrinsic(), llvm::RISCVDAGToDAGISel::selectVLSEG(), llvm::RISCVDAGToDAGISel::selectVLSEGFF(), llvm::RISCVDAGToDAGISel::selectVLXSEG(), llvm::HexagonDAGToDAGISel::StoreInstrForLoadIntrinsic(), and llvm::HexagonDAGToDAGISel::tryLoadOfLoadIntrinsic().
◆ runOnMachineFunction()
|
virtual |
Reimplemented in llvm::AMDGPUDAGToDAGISel, llvm::HexagonDAGToDAGISel, llvm::LoongArchDAGToDAGISel, llvm::MipsDAGToDAGISel, llvm::NVPTXDAGToDAGISel, and llvm::RISCVDAGToDAGISel.
Definition at line 574 of file SelectionDAGISel.cpp.
References AC, assert(), llvm::MachineBasicBlock::begin(), llvm::BuildMI(), CurDAG, llvm::dbgs(), llvm::LLVMContext::diagnose(), DL, llvm::MachineRegisterInfo::EmitLiveInCopies(), EnableFastISelFallbackReport, llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT, BucketT >::end(), llvm::MachineBasicBlock::end(), FastISelFailed, llvm::MachineFunction::finalizeDebugInstrRefs(), llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT, BucketT >::find(), From, llvm::MachineFunction::front(), FuncInfo, FuncName, llvm::MCInstrInfo::get(), getBatchAA(), llvm::Function::getContext(), llvm::MachineBasicBlock::getFirstTerminator(), llvm::MachineFunction::getFrameInfo(), llvm::MachineFunction::getFunction(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::getReg(), llvm::MachineFunction::getRegInfo(), llvm::TargetSubtargetInfo::getRegisterInfo(), llvm::MachineFunction::getSubtarget(), llvm::MachineRegisterInfo::getVRegDef(), GFI, llvm::MachineFrameInfo::hasCalls(), llvm::MachineFunction::hasInlineAsm(), I, llvm::TargetLowering::initializeSplitCSR(), llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT, BucketT >::insert(), llvm::MachineBasicBlock::insert(), llvm::MachineBasicBlock::insertAfter(), llvm::TargetLowering::insertCopiesSplitCSR(), llvm::MCInstrDesc::isCall(), ISEL_DUMP, llvm::MCInstrDesc::isReturn(), llvm::Register::isVirtual(), LibInfo, llvm::MachineRegisterInfo::liveins(), LLVM_DEBUG, MBB, MF, MI, MRI, llvm::None, OptLevel, llvm::MachineFunction::print(), llvm::SmallVectorTemplateBase< T, bool >::push_back(), RegInfo, SDB, llvm::SwiftErrorValueTracking::setFunction(), llvm::MachineFrameInfo::setHasCalls(), llvm::MachineFunction::setHasInlineAsm(), llvm::MachineFunction::shouldUseDebugInstrRef(), llvm::MachineBasicBlock::succ_empty(), llvm::succ_empty(), llvm::TargetLowering::supportSplitCSR(), SwiftError, TII, TLI, TRI, llvm::MachineRegisterInfo::use_instructions(), llvm::MachineFunction::useDebugInstrRef(), UseMI, and llvm::Register::virtReg2Index().
Referenced by llvm::AMDGPUDAGToDAGISel::runOnMachineFunction(), llvm::HexagonDAGToDAGISel::runOnMachineFunction(), llvm::LoongArchDAGToDAGISel::runOnMachineFunction(), llvm::MipsDAGToDAGISel::runOnMachineFunction(), llvm::NVPTXDAGToDAGISel::runOnMachineFunction(), and llvm::RISCVDAGToDAGISel::runOnMachineFunction().
◆ RunSDNodeXForm()
|
inlinevirtual |
Definition at line 449 of file SelectionDAGISel.h.
References llvm_unreachable.
Referenced by SelectCodeCommon().
◆ Select()
|
pure virtual |
Main hook for targets to transform nodes into machine nodes.
Implemented in llvm::AMDGPUDAGToDAGISel, llvm::HexagonDAGToDAGISel, llvm::LoongArchDAGToDAGISel, and llvm::RISCVDAGToDAGISel.
◆ SelectCodeCommon()
| void SelectionDAGISel::SelectCodeCommon | ( | SDNode * | NodeToMatch, |
| const unsigned char * | MatcherTable, | ||
| unsigned | TableSize | ||
| ) |
Definition at line 3231 of file SelectionDAGISel.cpp.
References llvm::ISD::ANNOTATION_LABEL, llvm::any_of(), llvm::SmallVectorImpl< T >::append(), llvm::ISD::ARITH_FENCE, assert(), llvm::ISD::AssertAlign, llvm::ISD::AssertSext, llvm::ISD::AssertZext, llvm::SmallVectorTemplateCommon< T, typename >::back(), llvm::ISD::BasicBlock, llvm::SmallVectorTemplateCommon< T, typename >::begin(), CheckAndImm(), CheckChild2CondCode(), CheckChildInteger(), CheckChildSame(), CheckChildType(), CheckComplexPattern(), CheckCondCode(), CheckInteger(), CheckNodePredicate(), CheckNodePredicateWithOperands(), CheckOpcode(), CheckOrImm(), CheckPatternPredicate(), CheckSame(), CheckType(), CheckValueType(), llvm::SmallVectorImpl< T >::clear(), ComplexPatternFuncMutatesDAG(), llvm::ISD::Constant, llvm::ISD::ConstantFP, llvm::ISD::CONVERGENCECTRL_ANCHOR, llvm::ISD::CONVERGENCECTRL_ENTRY, llvm::ISD::CONVERGENCECTRL_LOOP, llvm::ISD::CopyFromReg, llvm::ISD::CopyToReg, CurDAG, llvm::dbgs(), decodeSignRotatedValue(), llvm::ISD::DELETED_NODE, llvm::ISD::EH_LABEL, llvm::SmallVectorBase< Size_T >::empty(), llvm::SmallVectorTemplateCommon< T, typename >::end(), llvm::ISD::EntryToken, llvm::erase(), llvm::ISD::FAKE_USE, llvm::ISD::FREEZE, llvm::MCInstrInfo::get(), llvm::SelectionDAG::getCopyToReg(), llvm::SelectionDAG::getDataLayout(), llvm::SelectionDAG::getEntryNode(), getIncludePathForIndex(), llvm::SelectionDAG::getMachineNode(), llvm::SDValue::getNode(), getNumFixedFromVariadicInfo(), llvm::SDNode::getNumOperands(), llvm::SDNode::getNumValues(), llvm::SDNode::getOpcode(), llvm::SDNode::getOperand(), getPatternForIndex(), llvm::TargetLoweringBase::getPointerTy(), llvm::SelectionDAG::getRegister(), llvm::SelectionDAG::getSignedConstant(), getSimpleVT(), llvm::EVT::getSizeInBits(), llvm::SelectionDAG::getTargetConstant(), llvm::SelectionDAG::getTargetConstantFP(), llvm::SDValue::getValue(), llvm::SDValue::getValueSizeInBits(), llvm::SDValue::getValueType(), llvm::SDNode::getValueType(), GetVBR(), llvm::SelectionDAG::getVTList(), HandleMergeInputChains(), llvm::ISD::HANDLENODE, Idx, llvm::ISD::INLINEASM, llvm::ISD::INLINEASM_BR, llvm::is_contained(), llvm::ISD::isConstantSplatVectorAllOnes(), llvm::ISD::isConstantSplatVectorAllZeros(), IsLegalToFold(), llvm::SDNode::isMachineOpcode(), IsPredicateKnownToFail(), IsProfitableToFold(), llvm::ISD::JUMP_TABLE_DEBUG_INFO, llvm::ISD::LIFETIME_END, llvm::ISD::LIFETIME_START, LLVM_DEBUG, llvm::MCInstrDesc::mayLoad(), mayRaiseFPException(), llvm::MCInstrDesc::mayStore(), llvm::ISD::MCSymbol, llvm::ISD::MDNODE_SDNODE, llvm::ISD::MEMBARRIER, N, llvm::SDNodeFlags::NoFPExcept, OPC_CaptureGlueInput, OPC_CheckAndImm, OPC_CheckChild0Integer, OPC_CheckChild0Same, OPC_CheckChild0Type, OPC_CheckChild0TypeI32, OPC_CheckChild0TypeI64, OPC_CheckChild1Integer, OPC_CheckChild1Same, OPC_CheckChild1Type, OPC_CheckChild1TypeI32, OPC_CheckChild1TypeI64, OPC_CheckChild2CondCode, OPC_CheckChild2Integer, OPC_CheckChild2Same, OPC_CheckChild2Type, OPC_CheckChild2TypeI32, OPC_CheckChild2TypeI64, OPC_CheckChild3Integer, OPC_CheckChild3Same, OPC_CheckChild3Type, OPC_CheckChild3TypeI32, OPC_CheckChild3TypeI64, OPC_CheckChild4Integer, OPC_CheckChild4Type, OPC_CheckChild4TypeI32, OPC_CheckChild4TypeI64, OPC_CheckChild5Type, OPC_CheckChild5TypeI32, OPC_CheckChild5TypeI64, OPC_CheckChild6Type, OPC_CheckChild6TypeI32, OPC_CheckChild6TypeI64, OPC_CheckChild7Type, OPC_CheckChild7TypeI32, OPC_CheckChild7TypeI64, OPC_CheckComplexPat, OPC_CheckComplexPat0, OPC_CheckComplexPat1, OPC_CheckComplexPat2, OPC_CheckComplexPat3, OPC_CheckComplexPat4, OPC_CheckComplexPat5, OPC_CheckComplexPat6, OPC_CheckComplexPat7, OPC_CheckCondCode, OPC_CheckFoldableChainNode, OPC_CheckImmAllOnesV, OPC_CheckImmAllZerosV, OPC_CheckInteger, OPC_CheckOpcode, OPC_CheckOrImm, OPC_CheckPatternPredicate, OPC_CheckPatternPredicate0, OPC_CheckPatternPredicate1, OPC_CheckPatternPredicate2, OPC_CheckPatternPredicate3, OPC_CheckPatternPredicate4, OPC_CheckPatternPredicate5, OPC_CheckPatternPredicate6, OPC_CheckPatternPredicate7, OPC_CheckPatternPredicateTwoByte, OPC_CheckPredicate, OPC_CheckPredicate0, OPC_CheckPredicate1, OPC_CheckPredicate2, OPC_CheckPredicate3, OPC_CheckPredicate4, OPC_CheckPredicate5, OPC_CheckPredicate6, OPC_CheckPredicate7, OPC_CheckPredicateWithOperands, OPC_CheckSame, OPC_CheckType, OPC_CheckTypeI32, OPC_CheckTypeI64, OPC_CheckTypeRes, OPC_CheckValueType, OPC_CompleteMatch, OPC_Coverage, OPC_EmitConvertToTarget, OPC_EmitConvertToTarget0, OPC_EmitConvertToTarget1, OPC_EmitConvertToTarget2, OPC_EmitConvertToTarget3, OPC_EmitConvertToTarget4, OPC_EmitConvertToTarget5, OPC_EmitConvertToTarget6, OPC_EmitConvertToTarget7, OPC_EmitCopyToReg, OPC_EmitCopyToReg0, OPC_EmitCopyToReg1, OPC_EmitCopyToReg2, OPC_EmitCopyToReg3, OPC_EmitCopyToReg4, OPC_EmitCopyToReg5, OPC_EmitCopyToReg6, OPC_EmitCopyToReg7, OPC_EmitCopyToRegTwoByte, OPC_EmitInteger, OPC_EmitInteger16, OPC_EmitInteger32, OPC_EmitInteger64, OPC_EmitInteger8, OPC_EmitMergeInputChains, OPC_EmitMergeInputChains1_0, OPC_EmitMergeInputChains1_1, OPC_EmitMergeInputChains1_2, OPC_EmitNode, OPC_EmitNode0, OPC_EmitNode0Chain, OPC_EmitNode0None, OPC_EmitNode1, OPC_EmitNode1Chain, OPC_EmitNode1None, OPC_EmitNode2, OPC_EmitNode2Chain, OPC_EmitNode2None, OPC_EmitNodeXForm, OPC_EmitRegister, OPC_EmitRegister2, OPC_EmitRegisterI32, OPC_EmitRegisterI64, OPC_EmitStringInteger, OPC_EmitStringInteger32, OPC_MorphNodeTo, OPC_MorphNodeTo0, OPC_MorphNodeTo0Chain, OPC_MorphNodeTo0GlueInput, OPC_MorphNodeTo0GlueOutput, OPC_MorphNodeTo0None, OPC_MorphNodeTo1, OPC_MorphNodeTo1Chain, OPC_MorphNodeTo1GlueInput, OPC_MorphNodeTo1GlueOutput, OPC_MorphNodeTo1None, OPC_MorphNodeTo2, OPC_MorphNodeTo2Chain, OPC_MorphNodeTo2GlueInput, OPC_MorphNodeTo2GlueOutput, OPC_MorphNodeTo2None, OPC_MoveChild, OPC_MoveChild0, OPC_MoveChild1, OPC_MoveChild2, OPC_MoveChild3, OPC_MoveChild4, OPC_MoveChild5, OPC_MoveChild6, OPC_MoveChild7, OPC_MoveParent, OPC_MoveSibling, OPC_MoveSibling0, OPC_MoveSibling1, OPC_MoveSibling2, OPC_MoveSibling3, OPC_MoveSibling4, OPC_MoveSibling5, OPC_MoveSibling6, OPC_MoveSibling7, OPC_RecordChild0, OPC_RecordChild1, OPC_RecordChild2, OPC_RecordChild3, OPC_RecordChild4, OPC_RecordChild5, OPC_RecordChild6, OPC_RecordChild7, OPC_RecordMemRef, OPC_RecordNode, OPC_Scope, OPC_SwitchOpcode, OPC_SwitchType, Operands, OPFL_Chain, OPFL_GlueInput, OPFL_GlueOutput, OPFL_MemRefs, OPFL_None, OPFL_VariadicInfo, OptLevel, llvm::ISD::PATCHPOINT, llvm::SmallVectorTemplateBase< T, bool >::pop_back(), llvm::ISD::PSEUDO_PROBE, llvm::SmallVectorTemplateBase< T, bool >::push_back(), llvm::ISD::READ_REGISTER, llvm::ISD::Register, llvm::ISD::RegisterMask, llvm::SelectionDAG::RemoveDeadNode(), ReplaceUses(), llvm::SmallVectorImpl< T >::resize(), RunSDNodeXForm(), llvm::SelectionDAG::salvageDebugInfo(), llvm::SDNode::setNodeId(), llvm::SelectionDAG::setNodeMemRefs(), llvm::MVT::SimpleTy, llvm::SmallVectorBase< Size_T >::size(), llvm::ISD::STACKMAP, llvm::ISD::TargetBlockAddress, llvm::ISD::TargetConstant, llvm::ISD::TargetConstantFP, llvm::ISD::TargetConstantPool, llvm::ISD::TargetExternalSymbol, llvm::ISD::TargetFrameIndex, llvm::ISD::TargetGlobalAddress, llvm::ISD::TargetGlobalTLSAddress, llvm::ISD::TargetJumpTable, TII, TLI, llvm::ISD::TokenFactor, llvm::ISD::UNDEF, llvm::SDNode::use_empty(), llvm::SDNode::uses(), and llvm::ISD::WRITE_REGISTER.
◆ SelectInlineAsmMemoryOperand()
|
inlinevirtual |
SelectInlineAsmMemoryOperand - Select the specified address as a target addressing mode, according to the specified constraint.
If this does not match or is not implemented, return true. The resultant operands (which will appear in the machine instruction) should be added to the OutOps vector.
Reimplemented in llvm::HexagonDAGToDAGISel, llvm::LoongArchDAGToDAGISel, llvm::NVPTXDAGToDAGISel, and llvm::RISCVDAGToDAGISel.
Definition at line 118 of file SelectionDAGISel.h.
Referenced by SelectInlineAsmMemoryOperands().
◆ SelectInlineAsmMemoryOperands()
|
protected |
SelectInlineAsmMemoryOperands - Calls to this are automatically generated by tblgen.
Others should not call it.
Definition at line 2268 of file SelectionDAGISel.cpp.
References assert(), CurDAG, DL, llvm::InlineAsm::Func, llvm::SelectionDAG::getTargetConstant(), getValueType(), llvm::InlineAsm::Mem, llvm::InlineAsm::Op_AsmString, llvm::InlineAsm::Op_ExtraInfo, llvm::InlineAsm::Op_FirstOperand, llvm::InlineAsm::Op_InputChain, llvm::InlineAsm::Op_MDNode, llvm::report_fatal_error(), and SelectInlineAsmMemoryOperand().
◆ shouldOptForSize()
|
inlineprotected |
Definition at line 404 of file SelectionDAGISel.h.
References CurDAG, and llvm::SelectionDAG::shouldOptForSize().
Member Data Documentation
◆ AC
| AssumptionCache* llvm::SelectionDAGISel::AC = nullptr |
Definition at line 57 of file SelectionDAGISel.h.
Referenced by initializeAnalysisResults(), and runOnMachineFunction().
◆ BatchAA
|
mutable |
Definition at line 56 of file SelectionDAGISel.h.
Referenced by getBatchAA(), and initializeAnalysisResults().
◆ CurDAG
| SelectionDAG* llvm::SelectionDAGISel::CurDAG |
Definition at line 54 of file SelectionDAGISel.h.
Referenced by llvm::RISCVDAGToDAGISel::addVectorLoadStoreOperands(), CheckAndMask(), CheckOrMask(), llvm::HexagonDAGToDAGISel::DetectUseSxtw(), llvm::HexagonDAGToDAGISel::FastFDiv(), llvm::HexagonDAGToDAGISel::FDiv(), llvm::MipsDAGToDAGISel::getGlobalBaseReg(), initializeAnalysisResults(), IsPredicateKnownToFail(), llvm::HexagonDAGToDAGISel::LoadInstrForLoadIntrinsic(), llvm::AMDGPUDAGToDAGISel::matchLoadD16FromBuildVector(), mayRaiseFPException(), llvm::AMDGPUDAGToDAGISel::PostprocessISelDAG(), llvm::RISCVDAGToDAGISel::PostprocessISelDAG(), llvm::AMDGPUDAGToDAGISel::PreprocessISelDAG(), llvm::HexagonDAGToDAGISel::PreprocessISelDAG(), llvm::RISCVDAGToDAGISel::PreprocessISelDAG(), ReplaceNode(), ReplaceUses(), runOnMachineFunction(), llvm::AMDGPUDAGToDAGISel::Select(), llvm::RISCVDAGToDAGISel::Select(), llvm::LoongArchDAGToDAGISel::SelectAddrConstant(), llvm::HexagonDAGToDAGISel::SelectAddrFI(), llvm::RISCVDAGToDAGISel::SelectAddrFrameIndex(), llvm::RISCVDAGToDAGISel::SelectAddrRegImm(), llvm::LoongArchDAGToDAGISel::SelectAddrRegImm12(), llvm::RISCVDAGToDAGISel::SelectAddrRegImmLsb00000(), llvm::RISCVDAGToDAGISel::SelectAddrRegRegScale(), llvm::HexagonDAGToDAGISel::SelectAddSubCarry(), llvm::HexagonDAGToDAGISel::SelectAnyImmediate(), llvm::HexagonDAGToDAGISel::SelectAnyInt(), llvm::LoongArchDAGToDAGISel::SelectBaseAddr(), llvm::HexagonDAGToDAGISel::SelectBrevLdIntrinsic(), llvm::AMDGPUDAGToDAGISel::SelectBuildVector(), SelectCodeCommon(), llvm::HexagonDAGToDAGISel::SelectConstant(), llvm::HexagonDAGToDAGISel::SelectConstantFP(), llvm::HexagonDAGToDAGISel::SelectD2P(), llvm::HexagonDAGToDAGISel::SelectExtractSubvector(), llvm::HexagonDAGToDAGISel::SelectFrameIndex(), llvm::HexagonDAGToDAGISel::SelectGlobalAddress(), llvm::HexagonDAGToDAGISel::SelectHVXDualOutput(), llvm::HexagonDAGToDAGISel::SelectIndexedStore(), llvm::HexagonDAGToDAGISel::SelectInlineAsmMemoryOperand(), llvm::LoongArchDAGToDAGISel::SelectInlineAsmMemoryOperand(), llvm::NVPTXDAGToDAGISel::SelectInlineAsmMemoryOperand(), llvm::RISCVDAGToDAGISel::SelectInlineAsmMemoryOperand(), SelectInlineAsmMemoryOperands(), llvm::HexagonDAGToDAGISel::SelectIntrinsicWChain(), llvm::HexagonDAGToDAGISel::SelectIntrinsicWOChain(), llvm::RISCVDAGToDAGISel::selectInvLogicImm(), llvm::HexagonDAGToDAGISel::SelectNewCircIntrinsic(), llvm::HexagonDAGToDAGISel::SelectP2D(), llvm::HexagonDAGToDAGISel::SelectQ2V(), llvm::RISCVDAGToDAGISel::selectRVVSimm5(), llvm::RISCVDAGToDAGISel::selectScalarFPAsInt(), llvm::RISCVDAGToDAGISel::selectSETCC(), llvm::RISCVDAGToDAGISel::selectSExtBits(), llvm::LoongArchDAGToDAGISel::selectSExti32(), llvm::RISCVDAGToDAGISel::selectSF_VC_X_SE(), llvm::LoongArchDAGToDAGISel::selectShiftMask(), llvm::RISCVDAGToDAGISel::selectShiftMask(), llvm::HexagonDAGToDAGISel::SelectSHL(), llvm::RISCVDAGToDAGISel::selectSHXADD_UWOp(), llvm::RISCVDAGToDAGISel::selectSHXADDOp(), llvm::RISCVDAGToDAGISel::selectSimm5Shl2(), llvm::HexagonDAGToDAGISel::SelectTypecast(), llvm::HexagonDAGToDAGISel::SelectV2Q(), llvm::HexagonDAGToDAGISel::SelectV65Gather(), llvm::HexagonDAGToDAGISel::SelectV65GatherPred(), llvm::HexagonDAGToDAGISel::SelectVAlign(), llvm::HexagonDAGToDAGISel::SelectVAlignAddr(), llvm::AMDGPUDAGToDAGISel::SelectVectorShuffle(), llvm::RISCVDAGToDAGISel::selectVLOp(), llvm::RISCVDAGToDAGISel::selectVLSEG(), llvm::RISCVDAGToDAGISel::selectVLSEGFF(), llvm::RISCVDAGToDAGISel::selectVLXSEG(), llvm::RISCVDAGToDAGISel::selectVSETVLI(), llvm::LoongArchDAGToDAGISel::selectVSplatImm(), llvm::RISCVDAGToDAGISel::selectVSplatSimm5(), llvm::RISCVDAGToDAGISel::selectVSplatSimm5Plus1(), llvm::RISCVDAGToDAGISel::selectVSplatSimm5Plus1NonZero(), llvm::RISCVDAGToDAGISel::selectVSplatUimm(), llvm::LoongArchDAGToDAGISel::selectVSplatUimmInvPow2(), llvm::LoongArchDAGToDAGISel::selectVSplatUimmPow2(), llvm::RISCVDAGToDAGISel::selectVSSEG(), llvm::RISCVDAGToDAGISel::selectVSXSEG(), llvm::RISCVDAGToDAGISel::selectZExtBits(), llvm::LoongArchDAGToDAGISel::selectZExti32(), shouldOptForSize(), llvm::HexagonDAGToDAGISel::StoreInstrForLoadIntrinsic(), llvm::RISCVDAGToDAGISel::tryIndexedLoad(), llvm::HexagonDAGToDAGISel::tryLoadOfLoadIntrinsic(), llvm::RISCVDAGToDAGISel::tryShrinkShlLogicImm(), llvm::RISCVDAGToDAGISel::trySignedBitfieldExtract(), and ~SelectionDAGISel().
◆ DAGSize
|
protected |
DAGSize - Size of DAG being instruction selected.
Definition at line 358 of file SelectionDAGISel.h.
◆ ElidedArgCopyInstrs
| SmallPtrSet<const Instruction *, 4> llvm::SelectionDAGISel::ElidedArgCopyInstrs |
Definition at line 67 of file SelectionDAGISel.h.
◆ FastISelFailed
| bool llvm::SelectionDAGISel::FastISelFailed |
Definition at line 66 of file SelectionDAGISel.h.
Referenced by runOnMachineFunction().
◆ FuncInfo
| std::unique_ptr<FunctionLoweringInfo> llvm::SelectionDAGISel::FuncInfo |
Definition at line 49 of file SelectionDAGISel.h.
Referenced by initializeAnalysisResults(), and runOnMachineFunction().
◆ FuncName
| StringRef llvm::SelectionDAGISel::FuncName |
Definition at line 79 of file SelectionDAGISel.h.
Referenced by initializeAnalysisResults(), and runOnMachineFunction().
◆ GFI
| GCFunctionInfo* llvm::SelectionDAGISel::GFI = nullptr |
Definition at line 58 of file SelectionDAGISel.h.
Referenced by initializeAnalysisResults(), and runOnMachineFunction().
◆ LibInfo
| const TargetLibraryInfo* llvm::SelectionDAGISel::LibInfo |
Definition at line 48 of file SelectionDAGISel.h.
Referenced by initializeAnalysisResults(), and runOnMachineFunction().
◆ MatchFilterFuncName
| bool llvm::SelectionDAGISel::MatchFilterFuncName = false |
True if the function currently processing is in the function printing list (i.e.
-filter-print-funcs). This is primarily used by ISEL_DUMP, which spans in multiple member functions. Storing the filter result here so that we only need to do the filtering once.
Definition at line 78 of file SelectionDAGISel.h.
Referenced by initializeAnalysisResults().
◆ MF
| MachineFunction* llvm::SelectionDAGISel::MF |
Definition at line 51 of file SelectionDAGISel.h.
Referenced by llvm::createBURRListDAGScheduler(), llvm::createDAGLinearizer(), llvm::createDefaultScheduler(), llvm::createFastDAGScheduler(), llvm::createHybridListDAGScheduler(), llvm::createILPListDAGScheduler(), llvm::createSourceListDAGScheduler(), llvm::createVLIWDAGScheduler(), llvm::HexagonDAGToDAGISel::emitFunctionEntryCode(), llvm::MipsDAGToDAGISel::getGlobalBaseReg(), initializeAnalysisResults(), isOrEquivalentToAdd(), llvm::OptLevelChanger::OptLevelChanger(), llvm::RISCVDAGToDAGISel::PreprocessISelDAG(), llvm::ResourcePriorityQueue::ResourcePriorityQueue(), runOnMachineFunction(), llvm::AMDGPUDAGToDAGISel::runOnMachineFunction(), llvm::HexagonDAGToDAGISel::runOnMachineFunction(), llvm::LoongArchDAGToDAGISel::runOnMachineFunction(), llvm::MipsDAGToDAGISel::runOnMachineFunction(), llvm::NVPTXDAGToDAGISel::runOnMachineFunction(), llvm::RISCVDAGToDAGISel::runOnMachineFunction(), llvm::HexagonDAGToDAGISel::SelectAddrFI(), llvm::HexagonDAGToDAGISel::SelectFrameIndex(), and llvm::OptLevelChanger::~OptLevelChanger().
◆ MMI
| MachineModuleInfo* llvm::SelectionDAGISel::MMI |
Definition at line 52 of file SelectionDAGISel.h.
Referenced by initializeAnalysisResults().
◆ OptLevel
| CodeGenOptLevel llvm::SelectionDAGISel::OptLevel |
Definition at line 63 of file SelectionDAGISel.h.
Referenced by initializeAnalysisResults(), IsLegalToFold(), IsProfitableToFold(), llvm::OptLevelChanger::OptLevelChanger(), runOnMachineFunction(), SelectCodeCommon(), and llvm::OptLevelChanger::~OptLevelChanger().
◆ ORE
| std::unique_ptr<OptimizationRemarkEmitter> llvm::SelectionDAGISel::ORE |
Current optimization remark emitter.
Used to report things like combines and FastISel failures.
Definition at line 71 of file SelectionDAGISel.h.
Referenced by initializeAnalysisResults().
◆ RegInfo
| MachineRegisterInfo* llvm::SelectionDAGISel::RegInfo |
Definition at line 53 of file SelectionDAGISel.h.
Referenced by initializeAnalysisResults(), and runOnMachineFunction().
◆ SDB
| std::unique_ptr<SelectionDAGBuilder> llvm::SelectionDAGISel::SDB |
Definition at line 55 of file SelectionDAGISel.h.
Referenced by runOnMachineFunction().
◆ SP
| SSPLayoutInfo* llvm::SelectionDAGISel::SP = nullptr |
Definition at line 59 of file SelectionDAGISel.h.
Referenced by initializeAnalysisResults().
◆ SwiftError
| SwiftErrorValueTracking* llvm::SelectionDAGISel::SwiftError |
Definition at line 50 of file SelectionDAGISel.h.
Referenced by runOnMachineFunction(), and ~SelectionDAGISel().
◆ TII
| const TargetInstrInfo* llvm::SelectionDAGISel::TII |
Definition at line 64 of file SelectionDAGISel.h.
Referenced by llvm::RISCVDAGToDAGISel::hasAllNBitUsers(), initializeAnalysisResults(), mayRaiseFPException(), runOnMachineFunction(), and SelectCodeCommon().
◆ TLI
| const TargetLowering* llvm::SelectionDAGISel::TLI |
Definition at line 65 of file SelectionDAGISel.h.
Referenced by llvm::createDefaultScheduler(), llvm::createHybridListDAGScheduler(), llvm::createILPListDAGScheduler(), getTargetLowering(), initializeAnalysisResults(), IsPredicateKnownToFail(), llvm::ResourcePriorityQueue::ResourcePriorityQueue(), runOnMachineFunction(), llvm::RISCVDAGToDAGISel::Select(), and SelectCodeCommon().
◆ TM
| TargetMachine& llvm::SelectionDAGISel::TM |
Definition at line 47 of file SelectionDAGISel.h.
Referenced by llvm::OptLevelChanger::OptLevelChanger(), llvm::RISCVDAGToDAGISel::Select(), and llvm::OptLevelChanger::~OptLevelChanger().
The documentation for this class was generated from the following files:
- include/llvm/CodeGen/SelectionDAGISel.h
- lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
- lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
