LLVM 19.0.0git
Public Member Functions | List of all members
llvm::LoongArchDAGToDAGISel Class Reference

#include "Target/LoongArch/LoongArchISelDAGToDAG.h"

Inheritance diagram for llvm::LoongArchDAGToDAGISel:
Inheritance graph
[legend]

Public Member Functions

 LoongArchDAGToDAGISel ()=delete
 
 LoongArchDAGToDAGISel (LoongArchTargetMachine &TM)
 
bool runOnMachineFunction (MachineFunction &MF) override
 
void Select (SDNode *Node) override
 Main hook for targets to transform nodes into machine nodes.
 
bool SelectInlineAsmMemoryOperand (const SDValue &Op, InlineAsm::ConstraintCode ConstraintID, std::vector< SDValue > &OutOps) override
 SelectInlineAsmMemoryOperand - Select the specified address as a target addressing mode, according to the specified constraint.
 
bool SelectBaseAddr (SDValue Addr, SDValue &Base)
 
bool SelectAddrConstant (SDValue Addr, SDValue &Base, SDValue &Offset)
 
bool selectNonFIBaseAddr (SDValue Addr, SDValue &Base)
 
bool selectShiftMask (SDValue N, unsigned ShiftWidth, SDValue &ShAmt)
 
bool selectShiftMaskGRLen (SDValue N, SDValue &ShAmt)
 
bool selectShiftMask32 (SDValue N, SDValue &ShAmt)
 
bool selectSExti32 (SDValue N, SDValue &Val)
 
bool selectZExti32 (SDValue N, SDValue &Val)
 
bool selectVSplat (SDNode *N, APInt &Imm, unsigned MinSizeInBits) const
 
template<unsigned ImmSize, bool IsSigned = false>
bool selectVSplatImm (SDValue N, SDValue &SplatVal)
 
bool selectVSplatUimmInvPow2 (SDValue N, SDValue &SplatImm) const
 
bool selectVSplatUimmPow2 (SDValue N, SDValue &SplatImm) const
 
- Public Member Functions inherited from llvm::SelectionDAGISel
 SelectionDAGISel (TargetMachine &tm, CodeGenOptLevel OL=CodeGenOptLevel::Default)
 
virtual ~SelectionDAGISel ()
 
const TargetLoweringgetTargetLowering () const
 
void initializeAnalysisResults (MachineFunctionAnalysisManager &MFAM)
 
void initializeAnalysisResults (MachineFunctionPass &MFP)
 
virtual bool runOnMachineFunction (MachineFunction &mf)
 
virtual void emitFunctionEntryCode ()
 
virtual void PreprocessISelDAG ()
 PreprocessISelDAG - This hook allows targets to hack on the graph before instruction selection starts.
 
virtual void PostprocessISelDAG ()
 PostprocessISelDAG() - This hook allows the target to hack on the graph right after selection.
 
virtual void Select (SDNode *N)=0
 Main hook for targets to transform nodes into machine nodes.
 
virtual bool SelectInlineAsmMemoryOperand (const SDValue &Op, InlineAsm::ConstraintCode ConstraintID, std::vector< SDValue > &OutOps)
 SelectInlineAsmMemoryOperand - Select the specified address as a target addressing mode, according to the specified constraint.
 
virtual bool IsProfitableToFold (SDValue N, SDNode *U, SDNode *Root) const
 IsProfitableToFold - Returns true if it's profitable to fold the specific operand node N of U during instruction selection that starts at Root.
 
bool CheckAndMask (SDValue LHS, ConstantSDNode *RHS, int64_t DesiredMaskS) const
 CheckAndMask - The isel is trying to match something like (and X, 255).
 
bool CheckOrMask (SDValue LHS, ConstantSDNode *RHS, int64_t DesiredMaskS) const
 CheckOrMask - The isel is trying to match something like (or X, 255).
 
virtual bool CheckPatternPredicate (unsigned PredNo) const
 CheckPatternPredicate - This function is generated by tblgen in the target.
 
virtual bool CheckNodePredicate (SDNode *N, unsigned PredNo) const
 CheckNodePredicate - This function is generated by tblgen in the target.
 
virtual bool CheckNodePredicateWithOperands (SDNode *N, unsigned PredNo, const SmallVectorImpl< SDValue > &Operands) const
 CheckNodePredicateWithOperands - This function is generated by tblgen in the target.
 
virtual bool CheckComplexPattern (SDNode *Root, SDNode *Parent, SDValue N, unsigned PatternNo, SmallVectorImpl< std::pair< SDValue, SDNode * > > &Result)
 
virtual SDValue RunSDNodeXForm (SDValue V, unsigned XFormNo)
 
void SelectCodeCommon (SDNode *NodeToMatch, const unsigned char *MatcherTable, unsigned TableSize)
 
virtual bool ComplexPatternFuncMutatesDAG () const
 Return true if complex patterns for this target can mutate the DAG.
 
bool mayRaiseFPException (SDNode *Node) const
 Return whether the node may raise an FP exception.
 
bool isOrEquivalentToAdd (const SDNode *N) const
 

Additional Inherited Members

- Public Types inherited from llvm::SelectionDAGISel
enum  BuiltinOpcodes {
  OPC_Scope , OPC_RecordNode , OPC_RecordChild0 , OPC_RecordChild1 ,
  OPC_RecordChild2 , OPC_RecordChild3 , OPC_RecordChild4 , OPC_RecordChild5 ,
  OPC_RecordChild6 , OPC_RecordChild7 , OPC_RecordMemRef , OPC_CaptureGlueInput ,
  OPC_MoveChild , OPC_MoveChild0 , OPC_MoveChild1 , OPC_MoveChild2 ,
  OPC_MoveChild3 , OPC_MoveChild4 , OPC_MoveChild5 , OPC_MoveChild6 ,
  OPC_MoveChild7 , OPC_MoveSibling , OPC_MoveSibling0 , OPC_MoveSibling1 ,
  OPC_MoveSibling2 , OPC_MoveSibling3 , OPC_MoveSibling4 , OPC_MoveSibling5 ,
  OPC_MoveSibling6 , OPC_MoveSibling7 , OPC_MoveParent , OPC_CheckSame ,
  OPC_CheckChild0Same , OPC_CheckChild1Same , OPC_CheckChild2Same , OPC_CheckChild3Same ,
  OPC_CheckPatternPredicate , OPC_CheckPatternPredicate0 , OPC_CheckPatternPredicate1 , OPC_CheckPatternPredicate2 ,
  OPC_CheckPatternPredicate3 , OPC_CheckPatternPredicate4 , OPC_CheckPatternPredicate5 , OPC_CheckPatternPredicate6 ,
  OPC_CheckPatternPredicate7 , OPC_CheckPatternPredicateTwoByte , OPC_CheckPredicate , OPC_CheckPredicate0 ,
  OPC_CheckPredicate1 , OPC_CheckPredicate2 , OPC_CheckPredicate3 , OPC_CheckPredicate4 ,
  OPC_CheckPredicate5 , OPC_CheckPredicate6 , OPC_CheckPredicate7 , OPC_CheckPredicateWithOperands ,
  OPC_CheckOpcode , OPC_SwitchOpcode , OPC_CheckType , OPC_CheckTypeI32 ,
  OPC_CheckTypeI64 , OPC_CheckTypeRes , OPC_SwitchType , OPC_CheckChild0Type ,
  OPC_CheckChild1Type , OPC_CheckChild2Type , OPC_CheckChild3Type , OPC_CheckChild4Type ,
  OPC_CheckChild5Type , OPC_CheckChild6Type , OPC_CheckChild7Type , OPC_CheckChild0TypeI32 ,
  OPC_CheckChild1TypeI32 , OPC_CheckChild2TypeI32 , OPC_CheckChild3TypeI32 , OPC_CheckChild4TypeI32 ,
  OPC_CheckChild5TypeI32 , OPC_CheckChild6TypeI32 , OPC_CheckChild7TypeI32 , OPC_CheckChild0TypeI64 ,
  OPC_CheckChild1TypeI64 , OPC_CheckChild2TypeI64 , OPC_CheckChild3TypeI64 , OPC_CheckChild4TypeI64 ,
  OPC_CheckChild5TypeI64 , OPC_CheckChild6TypeI64 , OPC_CheckChild7TypeI64 , OPC_CheckInteger ,
  OPC_CheckChild0Integer , OPC_CheckChild1Integer , OPC_CheckChild2Integer , OPC_CheckChild3Integer ,
  OPC_CheckChild4Integer , OPC_CheckCondCode , OPC_CheckChild2CondCode , OPC_CheckValueType ,
  OPC_CheckComplexPat , OPC_CheckComplexPat0 , OPC_CheckComplexPat1 , OPC_CheckComplexPat2 ,
  OPC_CheckComplexPat3 , OPC_CheckComplexPat4 , OPC_CheckComplexPat5 , OPC_CheckComplexPat6 ,
  OPC_CheckComplexPat7 , OPC_CheckAndImm , OPC_CheckOrImm , OPC_CheckImmAllOnesV ,
  OPC_CheckImmAllZerosV , OPC_CheckFoldableChainNode , OPC_EmitInteger , OPC_EmitInteger8 ,
  OPC_EmitInteger16 , OPC_EmitInteger32 , OPC_EmitInteger64 , OPC_EmitStringInteger ,
  OPC_EmitStringInteger32 , OPC_EmitRegister , OPC_EmitRegisterI32 , OPC_EmitRegisterI64 ,
  OPC_EmitRegister2 , OPC_EmitConvertToTarget , OPC_EmitConvertToTarget0 , OPC_EmitConvertToTarget1 ,
  OPC_EmitConvertToTarget2 , OPC_EmitConvertToTarget3 , OPC_EmitConvertToTarget4 , OPC_EmitConvertToTarget5 ,
  OPC_EmitConvertToTarget6 , OPC_EmitConvertToTarget7 , OPC_EmitMergeInputChains , OPC_EmitMergeInputChains1_0 ,
  OPC_EmitMergeInputChains1_1 , OPC_EmitMergeInputChains1_2 , OPC_EmitCopyToReg , OPC_EmitCopyToReg0 ,
  OPC_EmitCopyToReg1 , OPC_EmitCopyToReg2 , OPC_EmitCopyToReg3 , OPC_EmitCopyToReg4 ,
  OPC_EmitCopyToReg5 , OPC_EmitCopyToReg6 , OPC_EmitCopyToReg7 , OPC_EmitCopyToRegTwoByte ,
  OPC_EmitNodeXForm , OPC_EmitNode , OPC_EmitNode0 , OPC_EmitNode1 ,
  OPC_EmitNode2 , OPC_EmitNode0None , OPC_EmitNode1None , OPC_EmitNode2None ,
  OPC_EmitNode0Chain , OPC_EmitNode1Chain , OPC_EmitNode2Chain , OPC_MorphNodeTo ,
  OPC_MorphNodeTo0 , OPC_MorphNodeTo1 , OPC_MorphNodeTo2 , OPC_MorphNodeTo0None ,
  OPC_MorphNodeTo1None , OPC_MorphNodeTo2None , OPC_MorphNodeTo0Chain , OPC_MorphNodeTo1Chain ,
  OPC_MorphNodeTo2Chain , OPC_MorphNodeTo0GlueInput , OPC_MorphNodeTo1GlueInput , OPC_MorphNodeTo2GlueInput ,
  OPC_MorphNodeTo0GlueOutput , OPC_MorphNodeTo1GlueOutput , OPC_MorphNodeTo2GlueOutput , OPC_CompleteMatch ,
  OPC_Coverage
}
 
enum  {
  OPFL_None = 0 , OPFL_Chain = 1 , OPFL_GlueInput = 2 , OPFL_GlueOutput = 4 ,
  OPFL_MemRefs = 8 , OPFL_Variadic0 = 1<<4 , OPFL_Variadic1 = 2<<4 , OPFL_Variadic2 = 3<<4 ,
  OPFL_Variadic3 = 4<<4 , OPFL_Variadic4 = 5<<4 , OPFL_Variadic5 = 6<<4 , OPFL_Variadic6 = 7<<4 ,
  OPFL_VariadicInfo = OPFL_Variadic6
}
 
- Static Public Member Functions inherited from llvm::SelectionDAGISel
static bool IsLegalToFold (SDValue N, SDNode *U, SDNode *Root, CodeGenOptLevel OptLevel, bool IgnoreChains=false)
 IsLegalToFold - Returns true if the specific operand node N of U can be folded during instruction selection that starts at Root.
 
static void InvalidateNodeId (SDNode *N)
 
static int getUninvalidatedNodeId (SDNode *N)
 
static void EnforceNodeIdInvariant (SDNode *N)
 
static int getNumFixedFromVariadicInfo (unsigned Flags)
 getNumFixedFromVariadicInfo - Transform an EmitNode flags word into the number of fixed arity values that should be skipped when copying from the root.
 
- Public Attributes inherited from llvm::SelectionDAGISel
TargetMachineTM
 
const TargetLibraryInfoLibInfo
 
std::unique_ptr< FunctionLoweringInfoFuncInfo
 
SwiftErrorValueTrackingSwiftError
 
MachineFunctionMF
 
MachineRegisterInfoRegInfo
 
SelectionDAGCurDAG
 
std::unique_ptr< SelectionDAGBuilderSDB
 
AAResultsAA = nullptr
 
AssumptionCacheAC = nullptr
 
GCFunctionInfoGFI = nullptr
 
SSPLayoutInfoSP = nullptr
 
CodeGenOptLevel OptLevel
 
const TargetInstrInfoTII
 
const TargetLoweringTLI
 
bool FastISelFailed
 
SmallPtrSet< const Instruction *, 4 > ElidedArgCopyInstrs
 
std::unique_ptr< OptimizationRemarkEmitterORE
 Current optimization remark emitter.
 
bool MatchFilterFuncName = false
 True if the function currently processing is in the function printing list (i.e.
 
StringRef FuncName
 
- Protected Member Functions inherited from llvm::SelectionDAGISel
void ReplaceUses (SDValue F, SDValue T)
 ReplaceUses - replace all uses of the old node F with the use of the new node T.
 
void ReplaceUses (const SDValue *F, const SDValue *T, unsigned Num)
 ReplaceUses - replace all uses of the old nodes F with the use of the new nodes T.
 
void ReplaceUses (SDNode *F, SDNode *T)
 ReplaceUses - replace all uses of the old node F with the use of the new node T.
 
void ReplaceNode (SDNode *F, SDNode *T)
 Replace all uses of F with T, then remove F from the DAG.
 
void SelectInlineAsmMemoryOperands (std::vector< SDValue > &Ops, const SDLoc &DL)
 SelectInlineAsmMemoryOperands - Calls to this are automatically generated by tblgen.
 
virtual StringRef getPatternForIndex (unsigned index)
 getPatternForIndex - Patterns selected by tablegen during ISEL
 
virtual StringRef getIncludePathForIndex (unsigned index)
 getIncludePathForIndex - get the td source location of pattern instantiation
 
bool shouldOptForSize (const MachineFunction *MF) const
 
- Protected Attributes inherited from llvm::SelectionDAGISel
unsigned DAGSize = 0
 DAGSize - Size of DAG being instruction selected.
 

Detailed Description

Definition at line 23 of file LoongArchISelDAGToDAG.h.

Constructor & Destructor Documentation

◆ LoongArchDAGToDAGISel() [1/2]

llvm::LoongArchDAGToDAGISel::LoongArchDAGToDAGISel ( )
delete

◆ LoongArchDAGToDAGISel() [2/2]

llvm::LoongArchDAGToDAGISel::LoongArchDAGToDAGISel ( LoongArchTargetMachine TM)
inlineexplicit

Definition at line 29 of file LoongArchISelDAGToDAG.h.

Member Function Documentation

◆ runOnMachineFunction()

bool llvm::LoongArchDAGToDAGISel::runOnMachineFunction ( MachineFunction MF)
inlineoverridevirtual

◆ Select()

void llvm::LoongArchDAGToDAGISel::Select ( SDNode N)
overridevirtual

Main hook for targets to transform nodes into machine nodes.

Implements llvm::SelectionDAGISel.

◆ SelectAddrConstant()

bool LoongArchDAGToDAGISel::SelectAddrConstant ( SDValue  Addr,
SDValue Base,
SDValue Offset 
)

◆ SelectBaseAddr()

bool LoongArchDAGToDAGISel::SelectBaseAddr ( SDValue  Addr,
SDValue Base 
)

◆ SelectInlineAsmMemoryOperand()

bool LoongArchDAGToDAGISel::SelectInlineAsmMemoryOperand ( const SDValue Op,
InlineAsm::ConstraintCode  ConstraintID,
std::vector< SDValue > &  OutOps 
)
overridevirtual

SelectInlineAsmMemoryOperand - Select the specified address as a target addressing mode, according to the specified constraint.

If this does not match or is not implemented, return true. The resultant operands (which will appear in the machine instruction) should be added to the OutOps vector.

Reimplemented from llvm::SelectionDAGISel.

Definition at line 148 of file LoongArchISelDAGToDAG.cpp.

References llvm::sampleprof::Base, llvm::SelectionDAGISel::CurDAG, llvm::LoongArchSubtarget::getGRLenVT(), llvm::ConstantSDNode::getSExtValue(), llvm::SelectionDAG::getTargetConstant(), llvm::ConstantSDNode::getZExtValue(), llvm::isAligned(), llvm::SelectionDAG::isBaseWithConstantOffset(), llvm::isIntN(), llvm::InlineAsm::k, llvm_unreachable, llvm::InlineAsm::m, llvm::Offset, llvm::InlineAsm::ZB, and llvm::InlineAsm::ZC.

◆ selectNonFIBaseAddr()

bool LoongArchDAGToDAGISel::selectNonFIBaseAddr ( SDValue  Addr,
SDValue Base 
)

Definition at line 224 of file LoongArchISelDAGToDAG.cpp.

References Addr, and llvm::sampleprof::Base.

◆ selectSExti32()

bool LoongArchDAGToDAGISel::selectSExti32 ( SDValue  N,
SDValue Val 
)

◆ selectShiftMask()

bool LoongArchDAGToDAGISel::selectShiftMask ( SDValue  N,
unsigned  ShiftWidth,
SDValue ShAmt 
)

◆ selectShiftMask32()

bool llvm::LoongArchDAGToDAGISel::selectShiftMask32 ( SDValue  N,
SDValue ShAmt 
)
inline

Definition at line 51 of file LoongArchISelDAGToDAG.h.

References N, and selectShiftMask().

◆ selectShiftMaskGRLen()

bool llvm::LoongArchDAGToDAGISel::selectShiftMaskGRLen ( SDValue  N,
SDValue ShAmt 
)
inline

◆ selectVSplat()

bool LoongArchDAGToDAGISel::selectVSplat ( SDNode N,
APInt Imm,
unsigned  MinSizeInBits 
) const

Definition at line 329 of file LoongArchISelDAGToDAG.cpp.

References N.

Referenced by selectVSplatImm(), selectVSplatUimmInvPow2(), and selectVSplatUimmPow2().

◆ selectVSplatImm()

template<unsigned ImmBitSize, bool IsSigned>
bool LoongArchDAGToDAGISel::selectVSplatImm ( SDValue  N,
SDValue SplatVal 
)

◆ selectVSplatUimmInvPow2()

bool LoongArchDAGToDAGISel::selectVSplatUimmInvPow2 ( SDValue  N,
SDValue SplatImm 
) const

◆ selectVSplatUimmPow2()

bool LoongArchDAGToDAGISel::selectVSplatUimmPow2 ( SDValue  N,
SDValue SplatImm 
) const

◆ selectZExti32()

bool LoongArchDAGToDAGISel::selectZExti32 ( SDValue  N,
SDValue Val 
)

The documentation for this class was generated from the following files: