23 #define DEBUG_TYPE "systemz-isel"
27 struct SystemZAddressingMode {
62 bool IncludesDynAlloc;
64 SystemZAddressingMode(AddrForm form, DispRange dr)
65 :
Form(form), DR(dr), Disp(0), IncludesDynAlloc(
false) {}
68 bool hasIndexField() {
return Form != FormBD; }
71 bool isDynAlloc() {
return Form == FormBDXDynAlloc; }
74 errs() <<
"SystemZAddressingMode " <<
this <<
'\n';
78 Base.getNode()->dump(DAG);
82 if (hasIndexField()) {
85 Index.getNode()->dump(DAG);
90 errs() <<
" Disp " << Disp;
92 errs() <<
" + ADJDYNALLOC";
118 struct RxSBGOperands {
120 : Opcode(
Op), BitSize(
N.getValueSizeInBits()),
121 Mask(
allOnes(BitSize)), Input(
N), Start(64 - BitSize), End(63),
138 return CurDAG->getTargetConstant(
Imm,
SDLoc(Node), Node->getValueType(0));
151 bool expandAddress(SystemZAddressingMode &AM,
bool IsBase)
const;
154 bool selectAddress(
SDValue N, SystemZAddressingMode &AM)
const;
157 void getAddressOperands(
const SystemZAddressingMode &AM,
EVT VT,
159 void getAddressOperands(
const SystemZAddressingMode &AM,
EVT VT,
165 bool selectBDAddr(SystemZAddressingMode::DispRange DR,
SDValue Addr,
171 bool selectMVIAddr(SystemZAddressingMode::DispRange DR,
SDValue Addr,
177 bool selectBDXAddr(SystemZAddressingMode::AddrForm
Form,
192 return selectBDAddr(SystemZAddressingMode::Disp12Only,
Addr,
Base, Disp);
195 return selectBDAddr(SystemZAddressingMode::Disp12Pair,
Addr,
Base, Disp);
198 return selectBDAddr(SystemZAddressingMode::Disp20Only,
Addr,
Base, Disp);
201 return selectBDAddr(SystemZAddressingMode::Disp20Pair,
Addr,
Base, Disp);
206 return selectMVIAddr(SystemZAddressingMode::Disp12Pair,
Addr,
Base, Disp);
209 return selectMVIAddr(SystemZAddressingMode::Disp20Pair,
Addr,
Base, Disp);
215 return selectBDXAddr(SystemZAddressingMode::FormBDXNormal,
216 SystemZAddressingMode::Disp12Only,
221 return selectBDXAddr(SystemZAddressingMode::FormBDXNormal,
222 SystemZAddressingMode::Disp12Pair,
227 return selectBDXAddr(SystemZAddressingMode::FormBDXDynAlloc,
228 SystemZAddressingMode::Disp12Only,
233 return selectBDXAddr(SystemZAddressingMode::FormBDXNormal,
234 SystemZAddressingMode::Disp20Only,
239 return selectBDXAddr(SystemZAddressingMode::FormBDXNormal,
240 SystemZAddressingMode::Disp20Only128,
245 return selectBDXAddr(SystemZAddressingMode::FormBDXNormal,
246 SystemZAddressingMode::Disp20Pair,
251 return selectBDXAddr(SystemZAddressingMode::FormBDXLA,
252 SystemZAddressingMode::Disp12Pair,
257 return selectBDXAddr(SystemZAddressingMode::FormBDXLA,
258 SystemZAddressingMode::Disp20Pair,
276 bool refineRxSBGMask(RxSBGOperands &RxSBG,
uint64_t Mask)
const;
280 bool expandRxSBG(RxSBGOperands &RxSBG)
const;
294 bool tryRxSBG(
SDNode *
N,
unsigned Opcode);
303 void splitLargeImmediate(
unsigned Opcode,
SDNode *Node,
SDValue Op0,
310 bool tryGather(
SDNode *
N,
unsigned Opcode);
318 bool tryFoldLoadStoreIntoMemOperand(
SDNode *Node);
333 bool storeLoadCanUseMVC(
SDNode *
N)
const;
338 bool storeLoadCanUseBlockBinary(
SDNode *
N,
unsigned I)
const;
342 bool storeLoadIsAligned(
SDNode *
N)
const;
353 if (
F.getFnAttribute(
"fentry-call").getValueAsString() !=
"true") {
354 if (
F.hasFnAttribute(
"mnop-mcount"))
356 if (
F.hasFnAttribute(
"mrecord-mcount"))
366 return "SystemZ DAG->DAG Pattern Instruction Selection";
371 bool SelectInlineAsmMemoryOperand(
const SDValue &
Op,
unsigned ConstraintID,
372 std::vector<SDValue> &OutOps)
override;
374 void PreprocessISelDAG()
override;
377 #include "SystemZGenDAGISel.inc"
383 return new SystemZDAGToDAGISel(
TM, OptLevel);
389 static bool selectDisp(SystemZAddressingMode::DispRange DR, int64_t Val) {
391 case SystemZAddressingMode::Disp12Only:
392 return isUInt<12>(Val);
394 case SystemZAddressingMode::Disp12Pair:
395 case SystemZAddressingMode::Disp20Only:
396 case SystemZAddressingMode::Disp20Pair:
397 return isInt<20>(Val);
399 case SystemZAddressingMode::Disp20Only128:
400 return isInt<20>(Val) && isInt<20>(Val + 8);
420 if (AM.isDynAlloc() && !AM.IncludesDynAlloc) {
422 AM.IncludesDynAlloc =
true;
432 if (AM.hasIndexField() && !AM.Index.getNode()) {
442 static bool expandDisp(SystemZAddressingMode &AM,
bool IsBase,
445 int64_t TestDisp = AM.Disp + Op1;
457 bool SystemZDAGToDAGISel::expandAddress(SystemZAddressingMode &AM,
459 SDValue N = IsBase ? AM.Base : AM.Index;
460 unsigned Opcode =
N.getOpcode();
463 Opcode =
N.getOpcode();
465 if (Opcode ==
ISD::ADD || CurDAG->isBaseWithConstantOffset(
N)) {
479 cast<ConstantSDNode>(Op0)->getSExtValue());
482 cast<ConstantSDNode>(Op1)->getSExtValue());
492 cast<GlobalAddressSDNode>(Anchor)->getOffset());
500 static bool isValidDisp(SystemZAddressingMode::DispRange DR, int64_t Val) {
503 case SystemZAddressingMode::Disp12Only:
504 case SystemZAddressingMode::Disp20Only:
505 case SystemZAddressingMode::Disp20Only128:
508 case SystemZAddressingMode::Disp12Pair:
510 return isUInt<12>(Val);
512 case SystemZAddressingMode::Disp20Pair:
514 return !isUInt<12>(Val);
538 if (isUInt<12>(Disp))
552 if (
Index->hasOneUse())
557 unsigned IndexOpcode =
Index->getOpcode();
565 if (
Base->hasOneUse())
572 bool SystemZDAGToDAGISel::selectAddress(
SDValue Addr,
573 SystemZAddressingMode &AM)
const {
581 cast<ConstantSDNode>(
Addr)->getSExtValue()))
589 while (expandAddress(AM,
true) ||
590 (AM.Index.getNode() && expandAddress(AM,
false)))
594 if (AM.Form == SystemZAddressingMode::FormBDXLA &&
595 !
shouldUseLA(AM.Base.getNode(), AM.Disp, AM.Index.getNode()))
603 if (AM.isDynAlloc() && !AM.IncludesDynAlloc)
616 if (
N->getNodeId() == -1 ||
629 void SystemZDAGToDAGISel::getAddressOperands(
const SystemZAddressingMode &AM,
635 Base = CurDAG->getRegister(0, VT);
640 }
else if (
Base.getValueType() != VT) {
643 "Unexpected truncation");
651 Disp = CurDAG->getTargetConstant(AM.Disp,
SDLoc(
Base), VT);
654 void SystemZDAGToDAGISel::getAddressOperands(
const SystemZAddressingMode &AM,
658 getAddressOperands(AM, VT,
Base, Disp);
661 if (!
Index.getNode())
663 Index = CurDAG->getRegister(0, VT);
666 bool SystemZDAGToDAGISel::selectBDAddr(SystemZAddressingMode::DispRange DR,
669 SystemZAddressingMode AM(SystemZAddressingMode::FormBD, DR);
670 if (!selectAddress(
Addr, AM))
673 getAddressOperands(AM,
Addr.getValueType(),
Base, Disp);
677 bool SystemZDAGToDAGISel::selectMVIAddr(SystemZAddressingMode::DispRange DR,
680 SystemZAddressingMode AM(SystemZAddressingMode::FormBDXNormal, DR);
681 if (!selectAddress(
Addr, AM) || AM.Index.getNode())
684 getAddressOperands(AM,
Addr.getValueType(),
Base, Disp);
688 bool SystemZDAGToDAGISel::selectBDXAddr(SystemZAddressingMode::AddrForm
Form,
689 SystemZAddressingMode::DispRange DR,
692 SystemZAddressingMode AM(
Form, DR);
693 if (!selectAddress(
Addr, AM))
696 getAddressOperands(AM,
Addr.getValueType(),
Base, Disp,
Index);
705 if (selectBDXAddr12Only(
Addr, Regs[0], Disp, Regs[1]) &&
706 Regs[0].getNode() && Regs[1].getNode()) {
707 for (
unsigned int I = 0;
I < 2; ++
I) {
715 Index.getOperand(1) == Elem) {
724 bool SystemZDAGToDAGISel::detectOrAndInsertion(
SDValue &
Op,
732 auto *MaskNode = dyn_cast<ConstantSDNode>(
Op.getOperand(1).getNode());
737 uint64_t AndMask = MaskNode->getZExtValue();
738 if (InsertMask & AndMask)
744 if (Used != (AndMask | InsertMask)) {
745 KnownBits Known = CurDAG->computeKnownBits(
Op.getOperand(0));
750 Op =
Op.getOperand(0);
754 bool SystemZDAGToDAGISel::refineRxSBGMask(RxSBGOperands &RxSBG,
757 if (RxSBG.Rotate != 0)
758 Mask = (
Mask << RxSBG.Rotate) | (
Mask >> (64 - RxSBG.Rotate));
760 if (
TII->isRxSBGMask(
Mask, RxSBG.BitSize, RxSBG.Start, RxSBG.End)) {
770 if (RxSBG.Rotate != 0)
771 Mask = ((
Mask << RxSBG.Rotate) | (
Mask >> (64 - RxSBG.Rotate)));
772 return (
Mask & RxSBG.Mask) != 0;
775 bool SystemZDAGToDAGISel::expandRxSBG(RxSBGOperands &RxSBG)
const {
777 unsigned Opcode =
N.getOpcode();
780 if (RxSBG.Opcode == SystemZ::RNSBG)
782 uint64_t BitSize =
N.getValueSizeInBits();
784 if (!refineRxSBGMask(RxSBG,
Mask))
786 RxSBG.Input =
N.getOperand(0);
790 if (RxSBG.Opcode == SystemZ::RNSBG)
793 auto *MaskNode = dyn_cast<ConstantSDNode>(
N.getOperand(1).getNode());
799 if (!refineRxSBGMask(RxSBG,
Mask)) {
803 KnownBits Known = CurDAG->computeKnownBits(Input);
805 if (!refineRxSBGMask(RxSBG,
Mask))
813 if (RxSBG.Opcode != SystemZ::RNSBG)
816 auto *MaskNode = dyn_cast<ConstantSDNode>(
N.getOperand(1).getNode());
822 if (!refineRxSBGMask(RxSBG,
Mask)) {
826 KnownBits Known = CurDAG->computeKnownBits(Input);
828 if (!refineRxSBGMask(RxSBG,
Mask))
837 if (RxSBG.BitSize != 64 ||
N.getValueType() !=
MVT::i64)
839 auto *CountNode = dyn_cast<ConstantSDNode>(
N.getOperand(1).getNode());
843 RxSBG.Rotate = (RxSBG.Rotate + CountNode->getZExtValue()) & 63;
844 RxSBG.Input =
N.getOperand(0);
850 RxSBG.Input =
N.getOperand(0);
854 if (RxSBG.Opcode != SystemZ::RNSBG) {
856 unsigned InnerBitSize =
N.getOperand(0).getValueSizeInBits();
857 if (!refineRxSBGMask(RxSBG,
allOnes(InnerBitSize)))
860 RxSBG.Input =
N.getOperand(0);
868 unsigned BitSize =
N.getValueSizeInBits();
869 unsigned InnerBitSize =
N.getOperand(0).getValueSizeInBits();
873 if (RxSBG.Mask == 1 && RxSBG.Rotate == 1)
874 RxSBG.Rotate += (BitSize - InnerBitSize);
879 RxSBG.Input =
N.getOperand(0);
884 auto *CountNode = dyn_cast<ConstantSDNode>(
N.getOperand(1).getNode());
888 uint64_t Count = CountNode->getZExtValue();
889 unsigned BitSize =
N.getValueSizeInBits();
890 if (Count < 1 || Count >= BitSize)
893 if (RxSBG.Opcode == SystemZ::RNSBG) {
900 if (!refineRxSBGMask(RxSBG,
allOnes(BitSize - Count) << Count))
904 RxSBG.Rotate = (RxSBG.Rotate + Count) & 63;
905 RxSBG.Input =
N.getOperand(0);
911 auto *CountNode = dyn_cast<ConstantSDNode>(
N.getOperand(1).getNode());
915 uint64_t Count = CountNode->getZExtValue();
916 unsigned BitSize =
N.getValueSizeInBits();
917 if (Count < 1 || Count >= BitSize)
920 if (RxSBG.Opcode == SystemZ::RNSBG || Opcode ==
ISD::SRA) {
928 if (!refineRxSBGMask(RxSBG,
allOnes(BitSize - Count)))
932 RxSBG.Rotate = (RxSBG.Rotate - Count) & 63;
933 RxSBG.Input =
N.getOperand(0);
942 SDNode *
N = CurDAG->getMachineNode(TargetOpcode::IMPLICIT_DEF,
DL, VT);
949 return CurDAG->getTargetInsertSubreg(SystemZ::subreg_l32,
952 return CurDAG->getTargetExtractSubreg(SystemZ::subreg_l32,
DL, VT,
N);
953 assert(
N.getValueType() == VT &&
"Unexpected value types");
957 bool SystemZDAGToDAGISel::tryRISBGZero(
SDNode *
N) {
959 EVT VT =
N->getValueType(0);
962 RxSBGOperands RISBG(SystemZ::RISBG,
SDValue(
N, 0));
964 while (expandRxSBG(RISBG))
971 if (Count == 0 || isa<ConstantSDNode>(RISBG.Input))
976 if (Count == 1 &&
N->getOpcode() !=
ISD::AND)
982 if (RISBG.Rotate == 0) {
983 bool PreferAnd =
false;
989 else if (RISBG.Mask == 0xff ||
990 RISBG.Mask == 0xffff ||
991 RISBG.Mask == 0x7fffffff ||
997 else if (
auto *
Load = dyn_cast<LoadSDNode>(RISBG.Input)) {
1001 RISBG.Mask == 0xffffff00 &&
1002 Subtarget->hasLoadAndZeroRightmostByte())
1012 if (
N !=
New.getNode()) {
1015 ReplaceNode(
N,
New.getNode());
1019 if (!
N->isMachineOpcode())
1025 unsigned Opcode = SystemZ::RISBG;
1027 if (Subtarget->hasMiscellaneousExtensions())
1028 Opcode = SystemZ::RISBGN;
1030 if (VT ==
MVT::i32 && Subtarget->hasHighWord() &&
1035 RISBG.Start >= 32 && RISBG.End >= RISBG.Start &&
1036 ((RISBG.Start + RISBG.Rotate) & 63) >= 32 &&
1037 ((RISBG.End + RISBG.Rotate) & 63) >=
1038 ((RISBG.Start + RISBG.Rotate) & 63)) {
1039 Opcode = SystemZ::RISBMux;
1045 getUNDEF(
DL, OpcodeVT),
1046 convertTo(
DL, OpcodeVT, RISBG.Input),
1047 CurDAG->getTargetConstant(RISBG.Start,
DL,
MVT::i32),
1048 CurDAG->getTargetConstant(RISBG.End | 128,
DL,
MVT::i32),
1049 CurDAG->getTargetConstant(RISBG.Rotate,
DL,
MVT::i32)
1052 DL, VT,
SDValue(CurDAG->getMachineNode(Opcode,
DL, OpcodeVT, Ops), 0));
1053 ReplaceNode(
N,
New.getNode());
1057 bool SystemZDAGToDAGISel::tryRxSBG(
SDNode *
N,
unsigned Opcode) {
1059 EVT VT =
N->getValueType(0);
1064 RxSBGOperands RxSBG[] = {
1065 RxSBGOperands(Opcode,
N->getOperand(0)),
1066 RxSBGOperands(Opcode,
N->getOperand(1))
1068 unsigned Count[] = { 0, 0 };
1069 for (
unsigned I = 0;
I < 2; ++
I)
1070 while (expandRxSBG(RxSBG[
I]))
1079 if (Count[0] == 0 && Count[1] == 0)
1083 unsigned I = Count[0] > Count[1] ? 0 : 1;
1087 if (Opcode == SystemZ::ROSBG && (RxSBG[
I].
Mask & 0xff) == 0)
1088 if (
auto *
Load = dyn_cast<LoadSDNode>(Op0.
getNode()))
1094 if (Opcode == SystemZ::ROSBG && detectOrAndInsertion(Op0, RxSBG[
I].
Mask)) {
1095 Opcode = SystemZ::RISBG;
1097 if (Subtarget->hasMiscellaneousExtensions())
1098 Opcode = SystemZ::RISBGN;
1104 CurDAG->getTargetConstant(RxSBG[
I].Start,
DL,
MVT::i32),
1105 CurDAG->getTargetConstant(RxSBG[
I].End,
DL,
MVT::i32),
1106 CurDAG->getTargetConstant(RxSBG[
I].Rotate,
DL,
MVT::i32)
1110 ReplaceNode(
N,
New.getNode());
1114 void SystemZDAGToDAGISel::splitLargeImmediate(
unsigned Opcode,
SDNode *Node,
1117 EVT VT = Node->getValueType(0);
1121 Upper = CurDAG->getNode(Opcode,
DL, VT, Op0, Upper);
1137 SelectCode(
Upper.getNode());
1138 Upper = Handle.getValue();
1142 SDValue Or = CurDAG->getNode(Opcode,
DL, VT, Upper, Lower);
1144 ReplaceNode(Node,
Or.getNode());
1146 SelectCode(
Or.getNode());
1149 void SystemZDAGToDAGISel::loadVectorConstant(
1156 EVT VT = Node->getValueType(0);
1159 for (
unsigned OpVal : VCI.
OpVals)
1160 Ops.push_back(CurDAG->getTargetConstant(OpVal,
DL,
MVT::i32));
1164 ReplaceNode(Node,
Op.getNode());
1167 ReplaceNode(Node, BitCast.
getNode());
1168 SelectCode(BitCast.
getNode());
1170 unsigned SubRegIdx =
1171 (VT.
getSizeInBits() == 32 ? SystemZ::subreg_h32 : SystemZ::subreg_h64);
1173 Node, CurDAG->getTargetExtractSubreg(SubRegIdx,
DL, VT,
Op).getNode());
1175 SelectCode(
Op.getNode());
1178 bool SystemZDAGToDAGISel::tryGather(
SDNode *
N,
unsigned Opcode) {
1180 auto *ElemN = dyn_cast<ConstantSDNode>(ElemV);
1184 unsigned Elem = ElemN->getZExtValue();
1185 EVT VT =
N->getValueType(0);
1189 auto *
Load = dyn_cast<LoadSDNode>(
N->getOperand(1));
1190 if (!
Load || !
Load->hasNUsesOfValue(1, 0))
1192 if (
Load->getMemoryVT().getSizeInBits() !=
1193 Load->getValueType(0).getSizeInBits())
1197 if (!selectBDVAddr12Only(
Load->getBasePtr(), ElemV,
Base, Disp,
Index) ||
1208 ReplaceNode(
N, Res);
1212 bool SystemZDAGToDAGISel::tryScatter(
StoreSDNode *
Store,
unsigned Opcode) {
1216 if (
Store->getMemoryVT().getSizeInBits() !=
Value.getValueSizeInBits())
1220 auto *ElemN = dyn_cast<ConstantSDNode>(ElemV);
1226 unsigned Elem = ElemN->getZExtValue();
1231 if (!selectBDVAddr12Only(
Store->getBasePtr(), ElemV,
Base, Disp,
Index) ||
1268 LoadNode = cast<LoadSDNode>(
Load);
1271 if (!
Load.hasOneUse())
1283 bool ChainCheck =
false;
1284 if (Chain ==
Load.getValue(1)) {
1291 const unsigned int Max = 1024;
1294 if (
Op ==
Load.getValue(1)) {
1297 ChainOps.push_back(
Load.getOperand(0));
1300 LoopWorklist.push_back(
Op.getNode());
1301 ChainOps.push_back(
Op);
1307 if (
Op.getNode() != LoadNode)
1308 LoopWorklist.push_back(
Op.getNode());
1335 bool SystemZDAGToDAGISel::tryFoldLoadStoreIntoMemOperand(
SDNode *Node) {
1345 unsigned NewOpc = 0;
1346 bool NegateOperand =
false;
1351 NegateOperand =
true;
1355 NewOpc = SystemZ::ASI;
1357 NewOpc = SystemZ::AGSI;
1362 NegateOperand =
true;
1366 NewOpc = SystemZ::ALSI;
1368 NewOpc = SystemZ::ALGSI;
1381 auto *OperandC = dyn_cast<ConstantSDNode>(Operand);
1384 auto OperandV = OperandC->getAPIntValue();
1386 OperandV = -OperandV;
1387 if (OperandV.getMinSignedBits() > 8)
1389 Operand = CurDAG->getTargetConstant(OperandV,
DL, MemVT);
1395 SDValue Ops[] = {
Base, Disp, Operand, InputChain };
1398 CurDAG->setNodeMemRefs(
1403 CurDAG->RemoveDeadNode(Node);
1410 if (
Load->getMemoryVT() !=
Store->getMemoryVT())
1414 if (
Load->isVolatile() ||
Store->isVolatile())
1418 if (
Load->isInvariant() &&
Load->isDereferenceable())
1422 const Value *V1 =
Load->getMemOperand()->getValue();
1429 int64_t End1 =
Load->getSrcValueOffset() +
Size;
1430 int64_t End2 =
Store->getSrcValueOffset() +
Size;
1431 if (V1 ==
V2 && End1 == End2)
1438 bool SystemZDAGToDAGISel::storeLoadCanUseMVC(
SDNode *
N)
const {
1439 auto *
Store = cast<StoreSDNode>(
N);
1440 auto *
Load = cast<LoadSDNode>(
Store->getValue());
1445 if (Size > 1 && Size <= 8) {
1454 return canUseBlockOperation(
Store,
Load);
1457 bool SystemZDAGToDAGISel::storeLoadCanUseBlockBinary(
SDNode *
N,
1459 auto *StoreA = cast<StoreSDNode>(
N);
1460 auto *LoadA = cast<LoadSDNode>(StoreA->getValue().getOperand(1 -
I));
1461 auto *LoadB = cast<LoadSDNode>(StoreA->getValue().getOperand(
I));
1462 return !LoadA->isVolatile() && LoadA->getMemoryVT() == LoadB->getMemoryVT() &&
1463 canUseBlockOperation(StoreA, LoadB);
1466 bool SystemZDAGToDAGISel::storeLoadIsAligned(
SDNode *
N)
const {
1468 auto *MemAccess = cast<LSBaseSDNode>(
N);
1469 TypeSize StoreSize = MemAccess->getMemoryVT().getStoreSize();
1472 assert(MMO &&
"Expected a memory operand.");
1475 if (MemAccess->getAlign().value() < StoreSize ||
1476 !MemAccess->getOffset().isUndef())
1485 if ((PSV->isGOT() || PSV->isConstantPool()))
1491 dyn_cast<GlobalAddressSDNode>(
BasePtr.getOperand(0))) {
1493 if (GA->getOffset() % StoreSize != 0)
1508 if (Node->isMachineOpcode()) {
1510 Node->setNodeId(-1);
1514 unsigned Opcode = Node->getOpcode();
1518 if (tryRxSBG(Node, SystemZ::ROSBG))
1524 if (tryRxSBG(Node, SystemZ::RXSBG))
1531 if (Node->getValueType(0) ==
MVT::i64 &&
1533 if (
auto *Op1 = dyn_cast<ConstantSDNode>(Node->getOperand(1))) {
1534 uint64_t Val = Op1->getZExtValue();
1537 if (Subtarget->hasMiscellaneousExtensions3()) {
1538 unsigned ChildOpcode = Node->getOperand(0).getOpcode();
1547 auto Op0 = Node->getOperand(0);
1548 if (
auto *Op0Op1 = dyn_cast<ConstantSDNode>(Op0->
getOperand(1)))
1549 if (Op0Op1->getZExtValue() == (
uint64_t)-1)
1554 splitLargeImmediate(Opcode, Node, Node->getOperand(0),
1563 if (tryRxSBG(Node, SystemZ::RNSBG))
1570 if (tryRISBGZero(Node))
1577 if (Node->getValueType(0) ==
MVT::i64) {
1578 uint64_t Val = cast<ConstantSDNode>(Node)->getZExtValue();
1588 SDValue Op0 = Node->getOperand(0);
1589 SDValue Op1 = Node->getOperand(1);
1593 (Subtarget->hasLoadStoreOnCond2() &&
1594 Node->getValueType(0).isInteger() &&
1596 isInt<16>(cast<ConstantSDNode>(Op1)->getSExtValue()) &&
1598 isInt<16>(cast<ConstantSDNode>(Op0)->getSExtValue())))) {
1599 SDValue CCValid = Node->getOperand(2);
1600 SDValue CCMask = Node->getOperand(3);
1602 cast<ConstantSDNode>(CCValid.
getNode())->getZExtValue();
1604 cast<ConstantSDNode>(CCMask.
getNode())->getZExtValue();
1606 CCMask = CurDAG->getTargetConstant(ConstCCValid ^ ConstCCMask,
1608 SDValue Op4 = Node->getOperand(4);
1610 CurDAG->UpdateNodeOperands(Node, Op1, Op0, CCValid, CCMask, Op4);
1611 if (UpdatedNode != Node) {
1613 ReplaceNode(Node, UpdatedNode);
1621 EVT VT = Node->getValueType(0);
1623 if (ElemBitSize == 32) {
1624 if (tryGather(Node, SystemZ::VGEF))
1626 }
else if (ElemBitSize == 64) {
1627 if (tryGather(Node, SystemZ::VGEG))
1634 auto *BVN = cast<BuildVectorSDNode>(Node);
1637 loadVectorConstant(VCI, Node);
1644 APFloat Imm = cast<ConstantFPSDNode>(Node)->getValueAPF();
1645 if (
Imm.isZero() ||
Imm.isNegZero())
1650 loadVectorConstant(VCI, Node);
1655 if (tryFoldLoadStoreIntoMemOperand(Node))
1657 auto *
Store = cast<StoreSDNode>(Node);
1658 unsigned ElemBitSize =
Store->getValue().getValueSizeInBits();
1659 if (ElemBitSize == 32) {
1660 if (tryScatter(
Store, SystemZ::VSCEF))
1662 }
else if (ElemBitSize == 64) {
1663 if (tryScatter(
Store, SystemZ::VSCEG))
1673 bool SystemZDAGToDAGISel::
1674 SelectInlineAsmMemoryOperand(
const SDValue &
Op,
1675 unsigned ConstraintID,
1676 std::vector<SDValue> &OutOps) {
1677 SystemZAddressingMode::AddrForm
Form;
1678 SystemZAddressingMode::DispRange DispRange;
1681 switch(ConstraintID) {
1688 Form = SystemZAddressingMode::FormBD;
1689 DispRange = SystemZAddressingMode::Disp12Only;
1694 Form = SystemZAddressingMode::FormBDXNormal;
1695 DispRange = SystemZAddressingMode::Disp12Only;
1700 Form = SystemZAddressingMode::FormBD;
1701 DispRange = SystemZAddressingMode::Disp20Only;
1712 Form = SystemZAddressingMode::FormBDXNormal;
1713 DispRange = SystemZAddressingMode::Disp20Only;
1719 Subtarget->getRegisterInfo()->getPointerRegClass(*MF);
1728 SDValue(CurDAG->getMachineNode(TargetOpcode::COPY_TO_REGCLASS,
1736 SDValue(CurDAG->getMachineNode(TargetOpcode::COPY_TO_REGCLASS,
1741 OutOps.push_back(
Base);
1742 OutOps.push_back(Disp);
1743 OutOps.push_back(
Index);
1766 SDNode *CCRegUser =
nullptr;
1768 cast<RegisterSDNode>(CCUser->
getOperand(1))->getReg() == SystemZ::CC) {
1769 for (
auto *U : CCUser->
uses()) {
1770 if (CCRegUser ==
nullptr)
1772 else if (CCRegUser != U)
1776 if (CCRegUser ==
nullptr)
1789 if (!IsLegalToFold(
N, U, CCRegUser, OptLevel,
false))
1799 struct IPMConversion {
1800 IPMConversion(
unsigned xorValue, int64_t addValue,
unsigned bit)
1801 : XORValue(xorValue), AddValue(addValue),
Bit(
bit) {}
1876 SDValue SystemZDAGToDAGISel::expandSelectBoolean(
SDNode *Node) {
1877 auto *TrueOp = dyn_cast<ConstantSDNode>(Node->getOperand(0));
1878 auto *FalseOp = dyn_cast<ConstantSDNode>(Node->getOperand(1));
1879 if (!TrueOp || !FalseOp)
1881 if (FalseOp->getZExtValue() != 0)
1883 if (TrueOp->getSExtValue() != 1 && TrueOp->getSExtValue() != -1)
1886 auto *CCValidOp = dyn_cast<ConstantSDNode>(Node->getOperand(2));
1887 auto *CCMaskOp = dyn_cast<ConstantSDNode>(Node->getOperand(3));
1888 if (!CCValidOp || !CCMaskOp)
1890 int CCValid = CCValidOp->getZExtValue();
1891 int CCMask = CCMaskOp->getZExtValue();
1894 SDValue CCReg = Node->getOperand(4);
1906 EVT VT = Node->getValueType(0);
1915 if (TrueOp->getSExtValue() == 1) {
1920 CurDAG->getConstant(1,
DL, VT));
1935 void SystemZDAGToDAGISel::PreprocessISelDAG() {
1938 if (Subtarget->hasLoadStoreOnCond2())
1941 bool MadeChange =
false;
1944 E = CurDAG->allnodes_end();
1951 switch (
N->getOpcode()) {
1954 Res = expandSelectBoolean(
N);
1959 LLVM_DEBUG(
dbgs() <<
"SystemZ DAG preprocessing replacing:\nOld: ");
1965 CurDAG->ReplaceAllUsesOfValueWith(
SDValue(
N, 0), Res);
1971 CurDAG->RemoveDeadNodes();