LLVM 17.0.0git
NVPTX.h
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1//===-- NVPTX.h - Top-level interface for NVPTX representation --*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file contains the entry points for global functions defined in
10// the LLVM NVPTX back-end.
11//
12//===----------------------------------------------------------------------===//
13
14#ifndef LLVM_LIB_TARGET_NVPTX_NVPTX_H
15#define LLVM_LIB_TARGET_NVPTX_NVPTX_H
16
17#include "llvm/IR/PassManager.h"
18#include "llvm/Pass.h"
20
21namespace llvm {
22class FunctionPass;
23class MachineFunctionPass;
24class NVPTXTargetMachine;
25class PassRegistry;
26
27namespace NVPTXCC {
34 GE
35};
36}
37
38FunctionPass *createNVPTXISelDag(NVPTXTargetMachine &TM,
52
53struct NVVMIntrRangePass : PassInfoMixin<NVVMIntrRangePass> {
55 NVVMIntrRangePass(unsigned SmVersion) : SmVersion(SmVersion) {}
57
58private:
59 unsigned SmVersion;
60};
61
62struct NVVMReflectPass : PassInfoMixin<NVVMReflectPass> {
64 NVVMReflectPass(unsigned SmVersion) : SmVersion(SmVersion) {}
66
67private:
68 unsigned SmVersion;
69};
70
71struct GenericToNVVMPass : PassInfoMixin<GenericToNVVMPass> {
73};
74
75namespace NVPTX {
78 CUDA
79};
80
81// A field inside TSFlags needs a shift and a mask. The usage is
82// always as follows :
83// ((TSFlags & fieldMask) >> fieldShift)
84// The enum keeps the mask, the shift, and all valid values of the
85// field in one place.
89
90 VecNOP = 0,
98 VecOther = 15
99};
100
109 isStoreShift = 6
111
112namespace PTXLdStInstCode {
118 PARAM = 4,
119 LOCAL = 5
125 Untyped
129 V2 = 2,
130 V4 = 4
132}
133
134/// PTXCvtMode - Conversion code enumeration
135namespace PTXCvtMode {
137 NONE = 0,
147
148 BASE_MASK = 0x0F,
149 FTZ_FLAG = 0x10,
150 SAT_FLAG = 0x20,
151 RELU_FLAG = 0x40
153}
154
155/// PTXCmpMode - Comparison mode enumeration
156namespace PTXCmpMode {
158 EQ = 0,
175 // NAN is a MACRO
177
178 BASE_MASK = 0xFF,
179 FTZ_FLAG = 0x100
181}
182}
184} // namespace llvm
185
186// Defines symbolic names for NVPTX registers. This defines a mapping from
187// register name to register number.
188#define GET_REGINFO_ENUM
189#include "NVPTXGenRegisterInfo.inc"
190
191// Defines symbolic names for the NVPTX instructions.
192#define GET_INSTRINFO_ENUM
193#define GET_INSTRINFO_MC_HELPER_DECLS
194#include "NVPTXGenInstrInfo.inc"
195
196#endif
#define F(x, y, z)
Definition: MD5.cpp:55
unsigned SmVersion
Definition: NVVMReflect.cpp:78
const char LLVMTargetMachineRef TM
This header defines various interfaces for pass management in LLVM.
A container for analyses that lazily runs them and caches their results.
Definition: PassManager.h:620
FunctionPass class - This class is used to implement most global optimizations.
Definition: Pass.h:311
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
ModulePass class - This class is used to implement unstructured interprocedural optimizations and ana...
Definition: Pass.h:251
A Module instance is used to store all the information related to an LLVM module.
Definition: Module.h:65
PassRegistry - This class manages the registration and intitialization of the pass subsystem as appli...
Definition: PassRegistry.h:37
A set of analyses that are preserved following a run of a transformation pass.
Definition: PassManager.h:152
Level
Code generation optimization level.
Definition: CodeGen.h:57
VecInstType
Definition: NVPTX.h:86
@ VecOther
Definition: NVPTX.h:98
@ VecInstTypeShift
Definition: NVPTX.h:87
@ VecExtract
Definition: NVPTX.h:95
@ VecInsert
Definition: NVPTX.h:96
@ VecShuffle
Definition: NVPTX.h:94
@ VecBuild
Definition: NVPTX.h:93
@ VecInstTypeMask
Definition: NVPTX.h:88
@ VecLoad
Definition: NVPTX.h:91
@ VecDest
Definition: NVPTX.h:97
@ VecStore
Definition: NVPTX.h:92
@ VecNOP
Definition: NVPTX.h:90
DrvInterface
Definition: NVPTX.h:76
@ NVCL
Definition: NVPTX.h:77
@ CUDA
Definition: NVPTX.h:78
@ isStoreShift
Definition: NVPTX.h:109
@ isLoadShift
Definition: NVPTX.h:107
@ isLoadMask
Definition: NVPTX.h:106
@ isStoreMask
Definition: NVPTX.h:108
@ SimpleMoveShift
Definition: NVPTX.h:103
@ SimpleMoveMask
Definition: NVPTX.h:102
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
ModulePass * createNVPTXAssignValidGlobalNamesPass()
MachineFunctionPass * createNVPTXReplaceImageHandlesPass()
ModulePass * createGenericToNVVMLegacyPass()
FunctionPass * createNVVMReflectPass(unsigned int SmVersion)
Definition: NVVMReflect.cpp:65
MachineFunctionPass * createNVPTXPrologEpilogPass()
MachineFunctionPass * createNVPTXProxyRegErasurePass()
void initializeNVPTXDAGToDAGISelPass(PassRegistry &)
MachineFunctionPass * createNVPTXPeephole()
FunctionPass * createNVVMIntrRangePass(unsigned int SmVersion)
FunctionPass * createNVPTXLowerArgsPass()
FunctionPass * createNVPTXImageOptimizerPass()
FunctionPass * createNVPTXLowerAllocaPass()
ModulePass * createNVPTXCtorDtorLoweringLegacyPass()
FunctionPass * createNVPTXISelDag(NVPTXTargetMachine &TM, llvm::CodeGenOpt::Level OptLevel)
createNVPTXISelDag - This pass converts a legalized DAG into a NVPTX-specific DAG,...
PreservedAnalyses run(Module &M, ModuleAnalysisManager &AM)
NVVMIntrRangePass(unsigned SmVersion)
Definition: NVPTX.h:55
PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM)
PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM)
NVVMReflectPass(unsigned SmVersion)
Definition: NVPTX.h:64
A CRTP mix-in to automatically provide informational APIs needed for passes.
Definition: PassManager.h:371