LLVM 22.0.0git
SelectionDAGDumper.cpp
Go to the documentation of this file.
1//===- SelectionDAGDumper.cpp - Implement SelectionDAG::dump() ------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This implements the SelectionDAG::dump method and friends.
10//
11//===----------------------------------------------------------------------===//
12
13#include "SDNodeDbgValue.h"
14#include "llvm/ADT/APFloat.h"
15#include "llvm/ADT/APInt.h"
31#include "llvm/Config/llvm-config.h"
32#include "llvm/IR/BasicBlock.h"
33#include "llvm/IR/Constants.h"
35#include "llvm/IR/DebugLoc.h"
36#include "llvm/IR/Function.h"
37#include "llvm/IR/Intrinsics.h"
39#include "llvm/IR/Value.h"
43#include "llvm/Support/Debug.h"
48#include <cstdint>
49#include <iterator>
50
51using namespace llvm;
52
53static cl::opt<bool>
54VerboseDAGDumping("dag-dump-verbose", cl::Hidden,
55 cl::desc("Display more information when dumping selection "
56 "DAG nodes."));
57
58std::string SDNode::getOperationName(const SelectionDAG *G) const {
59 switch (getOpcode()) {
60 default:
62 return "<<Unknown DAG Node>>";
63 if (isMachineOpcode()) {
64 if (G)
65 if (const TargetInstrInfo *TII = G->getSubtarget().getInstrInfo())
66 if (getMachineOpcode() < TII->getNumOpcodes())
67 return std::string(TII->getName(getMachineOpcode()));
68 return "<<Unknown Machine Node #" + utostr(getOpcode()) + ">>";
69 }
70 if (G) {
71 const SelectionDAGTargetInfo &TSI = G->getSelectionDAGInfo();
72 if (const char *Name = TSI.getTargetNodeName(getOpcode()))
73 return Name;
74 const TargetLowering &TLI = G->getTargetLoweringInfo();
75 const char *Name = TLI.getTargetNodeName(getOpcode());
76 if (Name) return Name;
77 return "<<Unknown Target Node #" + utostr(getOpcode()) + ">>";
78 }
79 return "<<Unknown Node #" + utostr(getOpcode()) + ">>";
80
81 // clang-format off
82#ifndef NDEBUG
83 case ISD::DELETED_NODE: return "<<Deleted Node!>>";
84#endif
85 case ISD::PREFETCH: return "Prefetch";
86 case ISD::MEMBARRIER: return "MemBarrier";
87 case ISD::ATOMIC_FENCE: return "AtomicFence";
88 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap";
89 case ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS: return "AtomicCmpSwapWithSuccess";
90 case ISD::ATOMIC_SWAP: return "AtomicSwap";
91 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd";
92 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub";
93 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd";
94 case ISD::ATOMIC_LOAD_CLR: return "AtomicLoadClr";
95 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr";
96 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor";
97 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand";
98 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin";
99 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax";
100 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin";
101 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax";
102 case ISD::ATOMIC_LOAD_FADD: return "AtomicLoadFAdd";
103 case ISD::ATOMIC_LOAD_FSUB: return "AtomicLoadFSub";
104 case ISD::ATOMIC_LOAD_FMIN: return "AtomicLoadFMin";
105 case ISD::ATOMIC_LOAD_FMAX: return "AtomicLoadFMax";
106 case ISD::ATOMIC_LOAD_FMINIMUM: return "AtomicLoadFMinimum";
107 case ISD::ATOMIC_LOAD_FMAXIMUM: return "AtomicLoadFMaximum";
109 return "AtomicLoadUIncWrap";
111 return "AtomicLoadUDecWrap";
113 return "AtomicLoadUSubCond";
115 return "AtomicLoadUSubSat";
116 case ISD::ATOMIC_LOAD: return "AtomicLoad";
117 case ISD::ATOMIC_STORE: return "AtomicStore";
118 case ISD::PCMARKER: return "PCMarker";
119 case ISD::READCYCLECOUNTER: return "ReadCycleCounter";
120 case ISD::READSTEADYCOUNTER: return "ReadSteadyCounter";
121 case ISD::SRCVALUE: return "SrcValue";
122 case ISD::MDNODE_SDNODE: return "MDNode";
123 case ISD::EntryToken: return "EntryToken";
124 case ISD::TokenFactor: return "TokenFactor";
125 case ISD::AssertSext: return "AssertSext";
126 case ISD::AssertZext: return "AssertZext";
127 case ISD::AssertNoFPClass: return "AssertNoFPClass";
128 case ISD::AssertAlign: return "AssertAlign";
129
130 case ISD::BasicBlock: return "BasicBlock";
131 case ISD::VALUETYPE: return "ValueType";
132 case ISD::Register: return "Register";
133 case ISD::RegisterMask: return "RegisterMask";
134 case ISD::Constant:
135 if (cast<ConstantSDNode>(this)->isOpaque())
136 return "OpaqueConstant";
137 return "Constant";
138 case ISD::ConstantFP: return "ConstantFP";
139 case ISD::GlobalAddress: return "GlobalAddress";
140 case ISD::GlobalTLSAddress: return "GlobalTLSAddress";
141 case ISD::PtrAuthGlobalAddress: return "PtrAuthGlobalAddress";
142 case ISD::FrameIndex: return "FrameIndex";
143 case ISD::JumpTable: return "JumpTable";
145 return "JUMP_TABLE_DEBUG_INFO";
146 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE";
147 case ISD::RETURNADDR: return "RETURNADDR";
148 case ISD::ADDROFRETURNADDR: return "ADDROFRETURNADDR";
149 case ISD::FRAMEADDR: return "FRAMEADDR";
150 case ISD::SPONENTRY: return "SPONENTRY";
151 case ISD::STACKADDRESS: return "STACKADDRESS";
152 case ISD::LOCAL_RECOVER: return "LOCAL_RECOVER";
153 case ISD::READ_REGISTER: return "READ_REGISTER";
154 case ISD::WRITE_REGISTER: return "WRITE_REGISTER";
155 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET";
156 case ISD::EH_DWARF_CFA: return "EH_DWARF_CFA";
157 case ISD::EH_RETURN: return "EH_RETURN";
158 case ISD::EH_SJLJ_SETJMP: return "EH_SJLJ_SETJMP";
159 case ISD::EH_SJLJ_LONGJMP: return "EH_SJLJ_LONGJMP";
160 case ISD::EH_SJLJ_SETUP_DISPATCH: return "EH_SJLJ_SETUP_DISPATCH";
161 case ISD::ConstantPool: return "ConstantPool";
162 case ISD::TargetIndex: return "TargetIndex";
163 case ISD::ExternalSymbol: return "ExternalSymbol";
164 case ISD::BlockAddress: return "BlockAddress";
168 unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1;
169 unsigned IID = getOperand(OpNo)->getAsZExtVal();
170 if (IID < Intrinsic::num_intrinsics)
172 if (!G)
173 return "Unknown intrinsic";
174 llvm_unreachable("Invalid intrinsic ID");
175 }
176
177 case ISD::BUILD_VECTOR: return "BUILD_VECTOR";
179 if (cast<ConstantSDNode>(this)->isOpaque())
180 return "OpaqueTargetConstant";
181 return "TargetConstant";
182
183 case ISD::TargetConstantFP: return "TargetConstantFP";
184 case ISD::TargetGlobalAddress: return "TargetGlobalAddress";
185 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress";
186 case ISD::TargetFrameIndex: return "TargetFrameIndex";
187 case ISD::TargetJumpTable: return "TargetJumpTable";
188 case ISD::TargetConstantPool: return "TargetConstantPool";
189 case ISD::TargetExternalSymbol: return "TargetExternalSymbol";
190 case ISD::MCSymbol: return "MCSymbol";
191 case ISD::TargetBlockAddress: return "TargetBlockAddress";
192
193 case ISD::CopyToReg: return "CopyToReg";
194 case ISD::CopyFromReg: return "CopyFromReg";
195 case ISD::UNDEF: return "undef";
196 case ISD::POISON: return "poison";
197 case ISD::VSCALE: return "vscale";
198 case ISD::MERGE_VALUES: return "merge_values";
199 case ISD::INLINEASM: return "inlineasm";
200 case ISD::INLINEASM_BR: return "inlineasm_br";
201 case ISD::EH_LABEL: return "eh_label";
202 case ISD::ANNOTATION_LABEL: return "annotation_label";
203 case ISD::HANDLENODE: return "handlenode";
204
205 // Unary operators
206 case ISD::FABS: return "fabs";
207 case ISD::FMINNUM: return "fminnum";
208 case ISD::STRICT_FMINNUM: return "strict_fminnum";
209 case ISD::FMAXNUM: return "fmaxnum";
210 case ISD::STRICT_FMAXNUM: return "strict_fmaxnum";
211 case ISD::FMINNUM_IEEE: return "fminnum_ieee";
212 case ISD::FMAXNUM_IEEE: return "fmaxnum_ieee";
213 case ISD::FMINIMUM: return "fminimum";
214 case ISD::STRICT_FMINIMUM: return "strict_fminimum";
215 case ISD::FMAXIMUM: return "fmaximum";
216 case ISD::STRICT_FMAXIMUM: return "strict_fmaximum";
217 case ISD::FMINIMUMNUM: return "fminimumnum";
218 case ISD::FMAXIMUMNUM: return "fmaximumnum";
219 case ISD::FNEG: return "fneg";
220 case ISD::FSQRT: return "fsqrt";
221 case ISD::STRICT_FSQRT: return "strict_fsqrt";
222 case ISD::FCBRT: return "fcbrt";
223 case ISD::FSIN: return "fsin";
224 case ISD::STRICT_FSIN: return "strict_fsin";
225 case ISD::FCOS: return "fcos";
226 case ISD::STRICT_FCOS: return "strict_fcos";
227 case ISD::FSINCOS: return "fsincos";
228 case ISD::FSINCOSPI: return "fsincospi";
229 case ISD::FMODF: return "fmodf";
230 case ISD::FTAN: return "ftan";
231 case ISD::STRICT_FTAN: return "strict_ftan";
232 case ISD::FASIN: return "fasin";
233 case ISD::STRICT_FASIN: return "strict_fasin";
234 case ISD::FACOS: return "facos";
235 case ISD::STRICT_FACOS: return "strict_facos";
236 case ISD::FATAN: return "fatan";
237 case ISD::STRICT_FATAN: return "strict_fatan";
238 case ISD::FATAN2: return "fatan2";
239 case ISD::STRICT_FATAN2: return "strict_fatan2";
240 case ISD::FSINH: return "fsinh";
241 case ISD::STRICT_FSINH: return "strict_fsinh";
242 case ISD::FCOSH: return "fcosh";
243 case ISD::STRICT_FCOSH: return "strict_fcosh";
244 case ISD::FTANH: return "ftanh";
245 case ISD::STRICT_FTANH: return "strict_ftanh";
246 case ISD::FTRUNC: return "ftrunc";
247 case ISD::STRICT_FTRUNC: return "strict_ftrunc";
248 case ISD::FFLOOR: return "ffloor";
249 case ISD::STRICT_FFLOOR: return "strict_ffloor";
250 case ISD::FCEIL: return "fceil";
251 case ISD::STRICT_FCEIL: return "strict_fceil";
252 case ISD::FRINT: return "frint";
253 case ISD::STRICT_FRINT: return "strict_frint";
254 case ISD::FNEARBYINT: return "fnearbyint";
255 case ISD::STRICT_FNEARBYINT: return "strict_fnearbyint";
256 case ISD::FROUND: return "fround";
257 case ISD::STRICT_FROUND: return "strict_fround";
258 case ISD::FROUNDEVEN: return "froundeven";
259 case ISD::STRICT_FROUNDEVEN: return "strict_froundeven";
260 case ISD::FEXP: return "fexp";
261 case ISD::STRICT_FEXP: return "strict_fexp";
262 case ISD::FEXP2: return "fexp2";
263 case ISD::STRICT_FEXP2: return "strict_fexp2";
264 case ISD::FEXP10: return "fexp10";
265 case ISD::FLOG: return "flog";
266 case ISD::STRICT_FLOG: return "strict_flog";
267 case ISD::FLOG2: return "flog2";
268 case ISD::STRICT_FLOG2: return "strict_flog2";
269 case ISD::FLOG10: return "flog10";
270 case ISD::STRICT_FLOG10: return "strict_flog10";
271
272 // Binary operators
273 case ISD::ADD: return "add";
274 case ISD::PTRADD: return "ptradd";
275 case ISD::SUB: return "sub";
276 case ISD::MUL: return "mul";
277 case ISD::MULHU: return "mulhu";
278 case ISD::MULHS: return "mulhs";
279 case ISD::AVGFLOORU: return "avgflooru";
280 case ISD::AVGFLOORS: return "avgfloors";
281 case ISD::AVGCEILU: return "avgceilu";
282 case ISD::AVGCEILS: return "avgceils";
283 case ISD::ABDS: return "abds";
284 case ISD::ABDU: return "abdu";
285 case ISD::SDIV: return "sdiv";
286 case ISD::UDIV: return "udiv";
287 case ISD::SREM: return "srem";
288 case ISD::UREM: return "urem";
289 case ISD::SMUL_LOHI: return "smul_lohi";
290 case ISD::UMUL_LOHI: return "umul_lohi";
291 case ISD::SDIVREM: return "sdivrem";
292 case ISD::UDIVREM: return "udivrem";
293 case ISD::AND: return "and";
294 case ISD::OR: return "or";
295 case ISD::XOR: return "xor";
296 case ISD::SHL: return "shl";
297 case ISD::SRA: return "sra";
298 case ISD::SRL: return "srl";
299 case ISD::ROTL: return "rotl";
300 case ISD::ROTR: return "rotr";
301 case ISD::FSHL: return "fshl";
302 case ISD::FSHR: return "fshr";
303 case ISD::CLMUL: return "clmul";
304 case ISD::CLMULR: return "clmulr";
305 case ISD::CLMULH: return "clmulh";
306 case ISD::FADD: return "fadd";
307 case ISD::STRICT_FADD: return "strict_fadd";
308 case ISD::FSUB: return "fsub";
309 case ISD::STRICT_FSUB: return "strict_fsub";
310 case ISD::FMUL: return "fmul";
311 case ISD::STRICT_FMUL: return "strict_fmul";
312 case ISD::FDIV: return "fdiv";
313 case ISD::STRICT_FDIV: return "strict_fdiv";
314 case ISD::FMA: return "fma";
315 case ISD::STRICT_FMA: return "strict_fma";
316 case ISD::FMAD: return "fmad";
317 case ISD::FMULADD: return "fmuladd";
318 case ISD::FREM: return "frem";
319 case ISD::STRICT_FREM: return "strict_frem";
320 case ISD::FCOPYSIGN: return "fcopysign";
321 case ISD::FGETSIGN: return "fgetsign";
322 case ISD::FCANONICALIZE: return "fcanonicalize";
323 case ISD::IS_FPCLASS: return "is_fpclass";
324 case ISD::FPOW: return "fpow";
325 case ISD::STRICT_FPOW: return "strict_fpow";
326 case ISD::SMIN: return "smin";
327 case ISD::SMAX: return "smax";
328 case ISD::UMIN: return "umin";
329 case ISD::UMAX: return "umax";
330 case ISD::SCMP: return "scmp";
331 case ISD::UCMP: return "ucmp";
332
333 case ISD::FLDEXP: return "fldexp";
334 case ISD::STRICT_FLDEXP: return "strict_fldexp";
335 case ISD::FFREXP: return "ffrexp";
336 case ISD::FPOWI: return "fpowi";
337 case ISD::STRICT_FPOWI: return "strict_fpowi";
338 case ISD::SETCC: return "setcc";
339 case ISD::SETCCCARRY: return "setcccarry";
340 case ISD::STRICT_FSETCC: return "strict_fsetcc";
341 case ISD::STRICT_FSETCCS: return "strict_fsetccs";
342 case ISD::FPTRUNC_ROUND: return "fptrunc_round";
343 case ISD::SELECT: return "select";
344 case ISD::VSELECT: return "vselect";
345 case ISD::SELECT_CC: return "select_cc";
346 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt";
347 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt";
348 case ISD::CONCAT_VECTORS: return "concat_vectors";
349 case ISD::INSERT_SUBVECTOR: return "insert_subvector";
350 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector";
351 case ISD::VECTOR_DEINTERLEAVE: return "vector_deinterleave";
352 case ISD::VECTOR_INTERLEAVE: return "vector_interleave";
353 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector";
354 case ISD::VECTOR_SHUFFLE: return "vector_shuffle";
355 case ISD::VECTOR_SPLICE_LEFT: return "vector_splice_left";
356 case ISD::VECTOR_SPLICE_RIGHT: return "vector_splice_right";
357 case ISD::SPLAT_VECTOR: return "splat_vector";
358 case ISD::SPLAT_VECTOR_PARTS: return "splat_vector_parts";
359 case ISD::VECTOR_REVERSE: return "vector_reverse";
360 case ISD::STEP_VECTOR: return "step_vector";
361 case ISD::CARRY_FALSE: return "carry_false";
362 case ISD::ADDC: return "addc";
363 case ISD::ADDE: return "adde";
364 case ISD::UADDO_CARRY: return "uaddo_carry";
365 case ISD::SADDO_CARRY: return "saddo_carry";
366 case ISD::SADDO: return "saddo";
367 case ISD::UADDO: return "uaddo";
368 case ISD::SSUBO: return "ssubo";
369 case ISD::USUBO: return "usubo";
370 case ISD::SMULO: return "smulo";
371 case ISD::UMULO: return "umulo";
372 case ISD::SUBC: return "subc";
373 case ISD::SUBE: return "sube";
374 case ISD::USUBO_CARRY: return "usubo_carry";
375 case ISD::SSUBO_CARRY: return "ssubo_carry";
376 case ISD::SHL_PARTS: return "shl_parts";
377 case ISD::SRA_PARTS: return "sra_parts";
378 case ISD::SRL_PARTS: return "srl_parts";
379
380 case ISD::SADDSAT: return "saddsat";
381 case ISD::UADDSAT: return "uaddsat";
382 case ISD::SSUBSAT: return "ssubsat";
383 case ISD::USUBSAT: return "usubsat";
384 case ISD::SSHLSAT: return "sshlsat";
385 case ISD::USHLSAT: return "ushlsat";
386
387 case ISD::SMULFIX: return "smulfix";
388 case ISD::SMULFIXSAT: return "smulfixsat";
389 case ISD::UMULFIX: return "umulfix";
390 case ISD::UMULFIXSAT: return "umulfixsat";
391
392 case ISD::SDIVFIX: return "sdivfix";
393 case ISD::SDIVFIXSAT: return "sdivfixsat";
394 case ISD::UDIVFIX: return "udivfix";
395 case ISD::UDIVFIXSAT: return "udivfixsat";
396
397 // Conversion operators.
398 case ISD::SIGN_EXTEND: return "sign_extend";
399 case ISD::ZERO_EXTEND: return "zero_extend";
400 case ISD::ANY_EXTEND: return "any_extend";
401 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg";
402 case ISD::ANY_EXTEND_VECTOR_INREG: return "any_extend_vector_inreg";
403 case ISD::SIGN_EXTEND_VECTOR_INREG: return "sign_extend_vector_inreg";
404 case ISD::ZERO_EXTEND_VECTOR_INREG: return "zero_extend_vector_inreg";
405 case ISD::TRUNCATE: return "truncate";
406 case ISD::TRUNCATE_SSAT_S: return "truncate_ssat_s";
407 case ISD::TRUNCATE_SSAT_U: return "truncate_ssat_u";
408 case ISD::TRUNCATE_USAT_U: return "truncate_usat_u";
409 case ISD::FP_ROUND: return "fp_round";
410 case ISD::STRICT_FP_ROUND: return "strict_fp_round";
411 case ISD::FP_EXTEND: return "fp_extend";
412 case ISD::STRICT_FP_EXTEND: return "strict_fp_extend";
413
414 case ISD::SINT_TO_FP: return "sint_to_fp";
415 case ISD::STRICT_SINT_TO_FP: return "strict_sint_to_fp";
416 case ISD::UINT_TO_FP: return "uint_to_fp";
417 case ISD::STRICT_UINT_TO_FP: return "strict_uint_to_fp";
418 case ISD::FP_TO_SINT: return "fp_to_sint";
419 case ISD::STRICT_FP_TO_SINT: return "strict_fp_to_sint";
420 case ISD::FP_TO_UINT: return "fp_to_uint";
421 case ISD::STRICT_FP_TO_UINT: return "strict_fp_to_uint";
422 case ISD::FP_TO_SINT_SAT: return "fp_to_sint_sat";
423 case ISD::FP_TO_UINT_SAT: return "fp_to_uint_sat";
424 case ISD::BITCAST: return "bitcast";
425 case ISD::ADDRSPACECAST: return "addrspacecast";
426 case ISD::FP16_TO_FP: return "fp16_to_fp";
427 case ISD::STRICT_FP16_TO_FP: return "strict_fp16_to_fp";
428 case ISD::FP_TO_FP16: return "fp_to_fp16";
429 case ISD::STRICT_FP_TO_FP16: return "strict_fp_to_fp16";
430 case ISD::BF16_TO_FP: return "bf16_to_fp";
431 case ISD::STRICT_BF16_TO_FP: return "strict_bf16_to_fp";
432 case ISD::FP_TO_BF16: return "fp_to_bf16";
433 case ISD::STRICT_FP_TO_BF16: return "strict_fp_to_bf16";
434 case ISD::LROUND: return "lround";
435 case ISD::STRICT_LROUND: return "strict_lround";
436 case ISD::LLROUND: return "llround";
437 case ISD::STRICT_LLROUND: return "strict_llround";
438 case ISD::LRINT: return "lrint";
439 case ISD::STRICT_LRINT: return "strict_lrint";
440 case ISD::LLRINT: return "llrint";
441 case ISD::STRICT_LLRINT: return "strict_llrint";
442
443 // Control flow instructions
444 case ISD::BR: return "br";
445 case ISD::BRIND: return "brind";
446 case ISD::BR_JT: return "br_jt";
447 case ISD::BRCOND: return "brcond";
448 case ISD::BR_CC: return "br_cc";
449 case ISD::CALLSEQ_START: return "callseq_start";
450 case ISD::CALLSEQ_END: return "callseq_end";
451
452 // EH instructions
453 case ISD::CATCHRET: return "catchret";
454 case ISD::CLEANUPRET: return "cleanupret";
455
456 // Other operators
457 case ISD::LOAD: return "load";
458 case ISD::STORE: return "store";
459 case ISD::MLOAD: return "masked_load";
460 case ISD::MSTORE: return "masked_store";
461 case ISD::MGATHER: return "masked_gather";
462 case ISD::MSCATTER: return "masked_scatter";
463 case ISD::VECTOR_COMPRESS: return "vector_compress";
464 case ISD::VAARG: return "vaarg";
465 case ISD::VACOPY: return "vacopy";
466 case ISD::VAEND: return "vaend";
467 case ISD::VASTART: return "vastart";
468 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc";
469 case ISD::EXTRACT_ELEMENT: return "extract_element";
470 case ISD::BUILD_PAIR: return "build_pair";
471 case ISD::STACKSAVE: return "stacksave";
472 case ISD::STACKRESTORE: return "stackrestore";
473 case ISD::TRAP: return "trap";
474 case ISD::DEBUGTRAP: return "debugtrap";
475 case ISD::UBSANTRAP: return "ubsantrap";
476 case ISD::LIFETIME_START: return "lifetime.start";
477 case ISD::LIFETIME_END: return "lifetime.end";
478 case ISD::FAKE_USE:
479 return "fake_use";
480 case ISD::RELOC_NONE:
481 return "reloc_none";
483 return "pseudoprobe";
484 case ISD::GC_TRANSITION_START: return "gc_transition.start";
485 case ISD::GC_TRANSITION_END: return "gc_transition.end";
486 case ISD::GET_DYNAMIC_AREA_OFFSET: return "get.dynamic.area.offset";
487 case ISD::FREEZE: return "freeze";
489 return "call_setup";
491 return "call_alloc";
492
493 // Floating point environment manipulation
494 case ISD::GET_ROUNDING: return "get_rounding";
495 case ISD::SET_ROUNDING: return "set_rounding";
496 case ISD::GET_FPENV: return "get_fpenv";
497 case ISD::SET_FPENV: return "set_fpenv";
498 case ISD::RESET_FPENV: return "reset_fpenv";
499 case ISD::GET_FPENV_MEM: return "get_fpenv_mem";
500 case ISD::SET_FPENV_MEM: return "set_fpenv_mem";
501 case ISD::GET_FPMODE: return "get_fpmode";
502 case ISD::SET_FPMODE: return "set_fpmode";
503 case ISD::RESET_FPMODE: return "reset_fpmode";
504
505 // Convergence control instructions
506 case ISD::CONVERGENCECTRL_ANCHOR: return "convergencectrl_anchor";
507 case ISD::CONVERGENCECTRL_ENTRY: return "convergencectrl_entry";
508 case ISD::CONVERGENCECTRL_LOOP: return "convergencectrl_loop";
509 case ISD::CONVERGENCECTRL_GLUE: return "convergencectrl_glue";
510
511 // Bit manipulation
512 case ISD::ABS: return "abs";
513 case ISD::BITREVERSE: return "bitreverse";
514 case ISD::BSWAP: return "bswap";
515 case ISD::CTPOP: return "ctpop";
516 case ISD::CTTZ: return "cttz";
517 case ISD::CTTZ_ZERO_UNDEF: return "cttz_zero_undef";
518 case ISD::CTLZ: return "ctlz";
519 case ISD::CTLZ_ZERO_UNDEF: return "ctlz_zero_undef";
520 case ISD::CTLS: return "ctls";
521 case ISD::PARITY: return "parity";
522
523 // Trampolines
524 case ISD::INIT_TRAMPOLINE: return "init_trampoline";
525 case ISD::ADJUST_TRAMPOLINE: return "adjust_trampoline";
526
527 // clang-format on
528
529 case ISD::CONDCODE:
530 switch (cast<CondCodeSDNode>(this)->get()) {
531 default: llvm_unreachable("Unknown setcc condition!");
532 case ISD::SETOEQ: return "setoeq";
533 case ISD::SETOGT: return "setogt";
534 case ISD::SETOGE: return "setoge";
535 case ISD::SETOLT: return "setolt";
536 case ISD::SETOLE: return "setole";
537 case ISD::SETONE: return "setone";
538
539 case ISD::SETO: return "seto";
540 case ISD::SETUO: return "setuo";
541 case ISD::SETUEQ: return "setueq";
542 case ISD::SETUGT: return "setugt";
543 case ISD::SETUGE: return "setuge";
544 case ISD::SETULT: return "setult";
545 case ISD::SETULE: return "setule";
546 case ISD::SETUNE: return "setune";
547
548 case ISD::SETEQ: return "seteq";
549 case ISD::SETGT: return "setgt";
550 case ISD::SETGE: return "setge";
551 case ISD::SETLT: return "setlt";
552 case ISD::SETLE: return "setle";
553 case ISD::SETNE: return "setne";
554
555 case ISD::SETTRUE: return "settrue";
556 case ISD::SETTRUE2: return "settrue2";
557 case ISD::SETFALSE: return "setfalse";
558 case ISD::SETFALSE2: return "setfalse2";
559 }
560 case ISD::VECREDUCE_FADD: return "vecreduce_fadd";
561 case ISD::VECREDUCE_SEQ_FADD: return "vecreduce_seq_fadd";
562 case ISD::VECREDUCE_FMUL: return "vecreduce_fmul";
563 case ISD::VECREDUCE_SEQ_FMUL: return "vecreduce_seq_fmul";
564 case ISD::VECREDUCE_ADD: return "vecreduce_add";
565 case ISD::VECREDUCE_MUL: return "vecreduce_mul";
566 case ISD::VECREDUCE_AND: return "vecreduce_and";
567 case ISD::VECREDUCE_OR: return "vecreduce_or";
568 case ISD::VECREDUCE_XOR: return "vecreduce_xor";
569 case ISD::VECREDUCE_SMAX: return "vecreduce_smax";
570 case ISD::VECREDUCE_SMIN: return "vecreduce_smin";
571 case ISD::VECREDUCE_UMAX: return "vecreduce_umax";
572 case ISD::VECREDUCE_UMIN: return "vecreduce_umin";
573 case ISD::VECREDUCE_FMAX: return "vecreduce_fmax";
574 case ISD::VECREDUCE_FMIN: return "vecreduce_fmin";
575 case ISD::VECREDUCE_FMAXIMUM: return "vecreduce_fmaximum";
576 case ISD::VECREDUCE_FMINIMUM: return "vecreduce_fminimum";
577 case ISD::STACKMAP:
578 return "stackmap";
579 case ISD::PATCHPOINT:
580 return "patchpoint";
581 case ISD::CLEAR_CACHE:
582 return "clear_cache";
583
585 return "histogram";
586
588 return "find_last_active";
589
591 return "get_active_lane_mask";
592
594 return "partial_reduce_umla";
596 return "partial_reduce_smla";
598 return "partial_reduce_sumla";
600 return "partial_reduce_fmla";
602 return "loop_dep_war";
604 return "loop_dep_raw";
605
606 // Vector Predication
607#define BEGIN_REGISTER_VP_SDNODE(SDID, LEGALARG, NAME, ...) \
608 case ISD::SDID: \
609 return #NAME;
610#include "llvm/IR/VPIntrinsics.def"
611 }
612}
613
615 switch (AM) {
616 default: return "";
617 case ISD::PRE_INC: return "<pre-inc>";
618 case ISD::PRE_DEC: return "<pre-dec>";
619 case ISD::POST_INC: return "<post-inc>";
620 case ISD::POST_DEC: return "<post-dec>";
621 }
622}
623
625 return Printable([&Node](raw_ostream &OS) {
626#ifndef NDEBUG
627 static const raw_ostream::Colors Color[] = {
631 };
632 OS.changeColor(Color[Node.PersistentId % std::size(Color)]);
633 OS << 't' << Node.PersistentId;
634 OS.resetColor();
635#else
636 OS << (const void*)&Node;
637#endif
638 });
639}
640
641// Print the MMO with more information from the SelectionDAG.
643 const MachineFunction *MF, const Module *M,
644 const MachineFrameInfo *MFI,
645 const TargetInstrInfo *TII, LLVMContext &Ctx) {
646 ModuleSlotTracker MST(M);
647 if (MF)
650 MMO.print(OS, MST, SSNs, Ctx, MFI, TII);
651}
652
654 const SelectionDAG *G) {
655 if (G) {
656 const MachineFunction *MF = &G->getMachineFunction();
657 return printMemOperand(OS, MMO, MF, MF->getFunction().getParent(),
658 &MF->getFrameInfo(),
659 G->getSubtarget().getInstrInfo(), *G->getContext());
660 }
661
662 LLVMContext Ctx;
663 return printMemOperand(OS, MMO, /*MF=*/nullptr, /*M=*/nullptr,
664 /*MFI=*/nullptr, /*TII=*/nullptr, Ctx);
665}
666
667#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
668LLVM_DUMP_METHOD void SDNode::dump() const { dump(nullptr); }
669
671 print(dbgs(), G);
672 dbgs() << '\n';
673}
674#endif
675
677 for (unsigned i = 0, e = getNumValues(); i != e; ++i) {
678 if (i) OS << ",";
679 if (getValueType(i) == MVT::Other)
680 OS << "ch";
681 else
682 OS << getValueType(i).getEVTString();
683 }
684}
685
688 OS << " nuw";
689
691 OS << " nsw";
692
693 if (getFlags().hasExact())
694 OS << " exact";
695
696 if (getFlags().hasDisjoint())
697 OS << " disjoint";
698
699 if (getFlags().hasSameSign())
700 OS << " samesign";
701
702 if (getFlags().hasInBounds())
703 OS << " inbounds";
704
705 if (getFlags().hasNonNeg())
706 OS << " nneg";
707
708 if (getFlags().hasNoNaNs())
709 OS << " nnan";
710
711 if (getFlags().hasNoInfs())
712 OS << " ninf";
713
714 if (getFlags().hasNoSignedZeros())
715 OS << " nsz";
716
717 if (getFlags().hasAllowReciprocal())
718 OS << " arcp";
719
720 if (getFlags().hasAllowContract())
721 OS << " contract";
722
723 if (getFlags().hasApproximateFuncs())
724 OS << " afn";
725
726 if (getFlags().hasAllowReassociation())
727 OS << " reassoc";
728
729 if (getFlags().hasNoFPExcept())
730 OS << " nofpexcept";
731
732 if (const MachineSDNode *MN = dyn_cast<MachineSDNode>(this)) {
733 if (!MN->memoperands_empty()) {
734 OS << "<";
735 OS << "Mem:";
736 for (MachineSDNode::mmo_iterator i = MN->memoperands_begin(),
737 e = MN->memoperands_end(); i != e; ++i) {
738 printMemOperand(OS, **i, G);
739 if (std::next(i) != e)
740 OS << " ";
741 }
742 OS << ">";
743 }
744 } else if (const ShuffleVectorSDNode *SVN =
746 OS << "<";
747 for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) {
748 int Idx = SVN->getMaskElt(i);
749 if (i) OS << ",";
750 if (Idx < 0)
751 OS << "u";
752 else
753 OS << Idx;
754 }
755 OS << ">";
756 } else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) {
757 OS << '<' << CSDN->getAPIntValue() << '>';
758 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) {
759 if (&CSDN->getValueAPF().getSemantics() == &APFloat::IEEEsingle())
760 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>';
761 else if (&CSDN->getValueAPF().getSemantics() == &APFloat::IEEEdouble())
762 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>';
763 else {
764 OS << "<APFloat(";
765 CSDN->getValueAPF().bitcastToAPInt().print(OS, false);
766 OS << ")>";
767 }
768 } else if (const GlobalAddressSDNode *GADN =
770 int64_t offset = GADN->getOffset();
771 OS << '<';
772 GADN->getGlobal()->printAsOperand(OS);
773 OS << '>';
774 if (offset > 0)
775 OS << " + " << offset;
776 else
777 OS << " " << offset;
778 if (unsigned int TF = GADN->getTargetFlags())
779 OS << " [TF=" << TF << ']';
780 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) {
781 OS << "<" << FIDN->getIndex() << ">";
782 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) {
783 OS << "<" << JTDN->getIndex() << ">";
784 if (unsigned int TF = JTDN->getTargetFlags())
785 OS << " [TF=" << TF << ']';
786 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){
787 int offset = CP->getOffset();
788 if (CP->isMachineConstantPoolEntry())
789 OS << "<" << *CP->getMachineCPVal() << ">";
790 else
791 OS << "<" << *CP->getConstVal() << ">";
792 if (offset > 0)
793 OS << " + " << offset;
794 else
795 OS << " " << offset;
796 if (unsigned int TF = CP->getTargetFlags())
797 OS << " [TF=" << TF << ']';
798 } else if (const TargetIndexSDNode *TI = dyn_cast<TargetIndexSDNode>(this)) {
799 OS << "<" << TI->getIndex() << '+' << TI->getOffset() << ">";
800 if (unsigned TF = TI->getTargetFlags())
801 OS << " [TF=" << TF << ']';
802 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) {
803 OS << "<";
804 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock();
805 if (LBB)
806 OS << LBB->getName() << " ";
807 OS << (const void*)BBDN->getBasicBlock() << ">";
808 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) {
809 OS << ' ' << printReg(R->getReg(),
810 G ? G->getSubtarget().getRegisterInfo() : nullptr);
811 } else if (const ExternalSymbolSDNode *ES =
813 OS << "'" << ES->getSymbol() << "'";
814 if (unsigned int TF = ES->getTargetFlags())
815 OS << " [TF=" << TF << ']';
816 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) {
817 if (M->getValue())
818 OS << "<" << M->getValue() << ">";
819 else
820 OS << "<null>";
821 } else if (const MDNodeSDNode *MD = dyn_cast<MDNodeSDNode>(this)) {
822 if (MD->getMD())
823 OS << "<" << MD->getMD() << ">";
824 else
825 OS << "<null>";
826 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) {
827 OS << ":" << N->getVT();
828 }
829 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) {
830 OS << "<";
831
832 printMemOperand(OS, *LD->getMemOperand(), G);
833
834 bool doExt = true;
835 switch (LD->getExtensionType()) {
836 default: doExt = false; break;
837 case ISD::EXTLOAD: OS << ", anyext"; break;
838 case ISD::SEXTLOAD: OS << ", sext"; break;
839 case ISD::ZEXTLOAD: OS << ", zext"; break;
840 }
841 if (doExt)
842 OS << " from " << LD->getMemoryVT();
843
844 const char *AM = getIndexedModeName(LD->getAddressingMode());
845 if (*AM)
846 OS << ", " << AM;
847
848 OS << ">";
849 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) {
850 OS << "<";
851 printMemOperand(OS, *ST->getMemOperand(), G);
852
853 if (ST->isTruncatingStore())
854 OS << ", trunc to " << ST->getMemoryVT();
855
856 const char *AM = getIndexedModeName(ST->getAddressingMode());
857 if (*AM)
858 OS << ", " << AM;
859
860 OS << ">";
861 } else if (const MaskedLoadSDNode *MLd = dyn_cast<MaskedLoadSDNode>(this)) {
862 OS << "<";
863
864 printMemOperand(OS, *MLd->getMemOperand(), G);
865
866 bool doExt = true;
867 switch (MLd->getExtensionType()) {
868 default: doExt = false; break;
869 case ISD::EXTLOAD: OS << ", anyext"; break;
870 case ISD::SEXTLOAD: OS << ", sext"; break;
871 case ISD::ZEXTLOAD: OS << ", zext"; break;
872 }
873 if (doExt)
874 OS << " from " << MLd->getMemoryVT();
875
876 const char *AM = getIndexedModeName(MLd->getAddressingMode());
877 if (*AM)
878 OS << ", " << AM;
879
880 if (MLd->isExpandingLoad())
881 OS << ", expanding";
882
883 OS << ">";
884 } else if (const MaskedStoreSDNode *MSt = dyn_cast<MaskedStoreSDNode>(this)) {
885 OS << "<";
886 printMemOperand(OS, *MSt->getMemOperand(), G);
887
888 if (MSt->isTruncatingStore())
889 OS << ", trunc to " << MSt->getMemoryVT();
890
891 const char *AM = getIndexedModeName(MSt->getAddressingMode());
892 if (*AM)
893 OS << ", " << AM;
894
895 if (MSt->isCompressingStore())
896 OS << ", compressing";
897
898 OS << ">";
899 } else if (const auto *MGather = dyn_cast<MaskedGatherSDNode>(this)) {
900 OS << "<";
901 printMemOperand(OS, *MGather->getMemOperand(), G);
902
903 bool doExt = true;
904 switch (MGather->getExtensionType()) {
905 default: doExt = false; break;
906 case ISD::EXTLOAD: OS << ", anyext"; break;
907 case ISD::SEXTLOAD: OS << ", sext"; break;
908 case ISD::ZEXTLOAD: OS << ", zext"; break;
909 }
910 if (doExt)
911 OS << " from " << MGather->getMemoryVT();
912
913 auto Signed = MGather->isIndexSigned() ? "signed" : "unsigned";
914 auto Scaled = MGather->isIndexScaled() ? "scaled" : "unscaled";
915 OS << ", " << Signed << " " << Scaled << " offset";
916
917 OS << ">";
918 } else if (const auto *MScatter = dyn_cast<MaskedScatterSDNode>(this)) {
919 OS << "<";
920 printMemOperand(OS, *MScatter->getMemOperand(), G);
921
922 if (MScatter->isTruncatingStore())
923 OS << ", trunc to " << MScatter->getMemoryVT();
924
925 auto Signed = MScatter->isIndexSigned() ? "signed" : "unsigned";
926 auto Scaled = MScatter->isIndexScaled() ? "scaled" : "unscaled";
927 OS << ", " << Signed << " " << Scaled << " offset";
928
929 OS << ">";
930 } else if (const MemSDNode *M = dyn_cast<MemSDNode>(this)) {
931 OS << "<";
932 printMemOperand(OS, *M->getMemOperand(), G);
933 if (auto *A = dyn_cast<AtomicSDNode>(M))
934 if (A->getOpcode() == ISD::ATOMIC_LOAD) {
935 bool doExt = true;
936 switch (A->getExtensionType()) {
937 default: doExt = false; break;
938 case ISD::EXTLOAD: OS << ", anyext"; break;
939 case ISD::SEXTLOAD: OS << ", sext"; break;
940 case ISD::ZEXTLOAD: OS << ", zext"; break;
941 }
942 if (doExt)
943 OS << " from " << A->getMemoryVT();
944 }
945 OS << ">";
946 } else if (const BlockAddressSDNode *BA =
948 int64_t offset = BA->getOffset();
949 OS << "<";
950 BA->getBlockAddress()->getFunction()->printAsOperand(OS, false);
951 OS << ", ";
952 BA->getBlockAddress()->getBasicBlock()->printAsOperand(OS, false);
953 OS << ">";
954 if (offset > 0)
955 OS << " + " << offset;
956 else
957 OS << " " << offset;
958 if (unsigned int TF = BA->getTargetFlags())
959 OS << " [TF=" << TF << ']';
960 } else if (const AddrSpaceCastSDNode *ASC =
962 OS << '['
963 << ASC->getSrcAddressSpace()
964 << " -> "
965 << ASC->getDestAddressSpace()
966 << ']';
967 } else if (const auto *AA = dyn_cast<AssertAlignSDNode>(this)) {
968 OS << '<' << AA->getAlign().value() << '>';
969 }
970
971 if (VerboseDAGDumping) {
972 if (unsigned Order = getIROrder())
973 OS << " [ORD=" << Order << ']';
974
975 if (getNodeId() != -1)
976 OS << " [ID=" << getNodeId() << ']';
977 if (!(isa<ConstantSDNode>(this) || (isa<ConstantFPSDNode>(this))))
978 OS << " # D:" << isDivergent();
979
980 if (G && !G->GetDbgValues(this).empty()) {
981 OS << " [NoOfDbgValues=" << G->GetDbgValues(this).size() << ']';
982 for (SDDbgValue *Dbg : G->GetDbgValues(this))
983 if (!Dbg->isInvalidated())
984 Dbg->print(OS);
985 } else if (getHasDebugValue())
986 OS << " [NoOfDbgValues>0]";
987
988 if (const auto *MD = G ? G->getPCSections(this) : nullptr) {
989 OS << " [pcsections ";
990 MD->printAsOperand(OS, G->getMachineFunction().getFunction().getParent());
991 OS << ']';
992 }
993
994 if (MDNode *MMRA = G ? G->getMMRAMetadata(this) : nullptr) {
995 OS << " [mmra ";
996 MMRA->printAsOperand(OS,
997 G->getMachineFunction().getFunction().getParent());
998 OS << ']';
999 }
1000 }
1001}
1002
1004 OS << " DbgVal(Order=" << getOrder() << ')';
1005 if (isInvalidated())
1006 OS << "(Invalidated)";
1007 if (isEmitted())
1008 OS << "(Emitted)";
1009 OS << "(";
1010 bool Comma = false;
1011 for (const SDDbgOperand &Op : getLocationOps()) {
1012 if (Comma)
1013 OS << ", ";
1014 switch (Op.getKind()) {
1016 if (Op.getSDNode())
1017 OS << "SDNODE=" << PrintNodeId(*Op.getSDNode()) << ':' << Op.getResNo();
1018 else
1019 OS << "SDNODE";
1020 break;
1022 OS << "CONST";
1023 break;
1025 OS << "FRAMEIX=" << Op.getFrameIx();
1026 break;
1027 case SDDbgOperand::VREG:
1028 OS << "VREG=" << printReg(Op.getVReg());
1029 break;
1030 }
1031 Comma = true;
1032 }
1033 OS << ")";
1034 if (isIndirect()) OS << "(Indirect)";
1035 if (isVariadic())
1036 OS << "(Variadic)";
1037 OS << ":\"" << Var->getName() << '"';
1038#ifndef NDEBUG
1039 if (Expr->getNumElements())
1040 Expr->dump();
1041#endif
1042}
1043
1044#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
1046 if (isInvalidated())
1047 return;
1048 print(dbgs());
1049 dbgs() << "\n";
1050}
1051#endif
1052
1053/// Return true if this node is so simple that we should just print it inline
1054/// if it appears as an operand.
1055static bool shouldPrintInline(const SDNode &Node, const SelectionDAG *G) {
1056 // Avoid lots of cluttering when inline printing nodes with associated
1057 // DbgValues in verbose mode.
1058 if (VerboseDAGDumping && G && !G->GetDbgValues(&Node).empty())
1059 return false;
1060 if (Node.getOpcode() == ISD::EntryToken)
1061 return false;
1062 return Node.getNumOperands() == 0;
1063}
1064
1065#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
1066static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) {
1067 for (const SDValue &Op : N->op_values()) {
1068 if (shouldPrintInline(*Op.getNode(), G))
1069 continue;
1070 if (Op.getNode()->hasOneUse())
1071 DumpNodes(Op.getNode(), indent+2, G);
1072 }
1073
1074 dbgs().indent(indent);
1075 N->dump(G);
1076}
1077
1078LLVM_DUMP_METHOD void SelectionDAG::dump(bool Sorted) const {
1079 dbgs() << "SelectionDAG has " << AllNodes.size() << " nodes:\n";
1080
1081 auto dumpEachNode = [this](const SDNode &N) {
1082 if (!N.hasOneUse() && &N != getRoot().getNode() &&
1083 (!shouldPrintInline(N, this) || N.use_empty()))
1084 DumpNodes(&N, 2, this);
1085 };
1086
1087 if (Sorted) {
1088 SmallVector<const SDNode *> SortedNodes;
1089 SortedNodes.reserve(AllNodes.size());
1090 getTopologicallyOrderedNodes(SortedNodes);
1091 for (const SDNode *N : SortedNodes)
1092 dumpEachNode(*N);
1093 } else {
1094 for (const SDNode &N : allnodes())
1095 dumpEachNode(N);
1096 }
1097
1098 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this);
1099 dbgs() << "\n";
1100
1101 if (VerboseDAGDumping) {
1102 if (DbgBegin() != DbgEnd())
1103 dbgs() << "SDDbgValues:\n";
1104 for (auto *Dbg : make_range(DbgBegin(), DbgEnd()))
1105 Dbg->dump();
1107 dbgs() << "Byval SDDbgValues:\n";
1108 for (auto *Dbg : make_range(ByvalParmDbgBegin(), ByvalParmDbgEnd()))
1109 Dbg->dump();
1110 }
1111 dbgs() << "\n";
1112}
1113#endif
1114
1115void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const {
1116 OS << PrintNodeId(*this) << ": ";
1117 print_types(OS, G);
1118 OS << " = " << getOperationName(G);
1119 print_details(OS, G);
1120}
1121
1122static bool printOperand(raw_ostream &OS, const SelectionDAG *G,
1123 const SDValue Value) {
1124 if (!Value.getNode()) {
1125 OS << "<null>";
1126 return false;
1127 }
1128
1129 if (shouldPrintInline(*Value.getNode(), G)) {
1130 OS << Value->getOperationName(G) << ':';
1131 Value->print_types(OS, G);
1132 Value->print_details(OS, G);
1133 return true;
1134 }
1135
1136 OS << PrintNodeId(*Value.getNode());
1137 if (unsigned RN = Value.getResNo())
1138 OS << ':' << RN;
1139 return false;
1140}
1141
1142#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
1144
1145static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent,
1146 const SelectionDAG *G, VisitedSDNodeSet &once) {
1147 if (!once.insert(N).second) // If we've been here before, return now.
1148 return;
1149
1150 // Dump the current SDNode, but don't end the line yet.
1151 OS.indent(indent);
1152 N->printr(OS, G);
1153
1154 // Having printed this SDNode, walk the children:
1155 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
1156 if (i) OS << ",";
1157 OS << " ";
1158
1159 const SDValue Op = N->getOperand(i);
1160 bool printedInline = printOperand(OS, G, Op);
1161 if (printedInline)
1162 once.insert(Op.getNode());
1163 }
1164
1165 OS << "\n";
1166
1167 // Dump children that have grandchildren on their own line(s).
1168 for (const SDValue &Op : N->op_values())
1169 DumpNodesr(OS, Op.getNode(), indent+2, G, once);
1170}
1171
1173 VisitedSDNodeSet once;
1174 DumpNodesr(dbgs(), this, 0, nullptr, once);
1175}
1176
1178 VisitedSDNodeSet once;
1179 DumpNodesr(dbgs(), this, 0, G, once);
1180}
1181#endif
1182
1184 const SelectionDAG *G, unsigned depth,
1185 unsigned indent) {
1186 if (depth == 0)
1187 return;
1188
1189 OS.indent(indent);
1190
1191 N->print(OS, G);
1192
1193 for (const SDValue &Op : N->op_values()) {
1194 // Don't follow chain operands.
1195 if (Op.getValueType() == MVT::Other)
1196 continue;
1197 // Don't print children that were fully rendered inline.
1198 if (shouldPrintInline(*Op.getNode(), G))
1199 continue;
1200 OS << '\n';
1201 printrWithDepthHelper(OS, Op.getNode(), G, depth - 1, indent + 2);
1202 }
1203}
1204
1206 unsigned depth) const {
1207 printrWithDepthHelper(OS, this, G, depth, 0);
1208}
1209
1211 // Don't print impossibly deep things.
1212 printrWithDepth(OS, G, 10);
1213}
1214
1215#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
1217void SDNode::dumprWithDepth(const SelectionDAG *G, unsigned depth) const {
1218 printrWithDepth(dbgs(), G, depth);
1219}
1220
1222 // Don't print impossibly deep things.
1223 dumprWithDepth(G, 10);
1224}
1225#endif
1226
1227void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const {
1228 printr(OS, G);
1229 // Under VerboseDAGDumping divergence will be printed always.
1231 OS << " # D:1";
1232 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
1233 if (i) OS << ", "; else OS << " ";
1234 printOperand(OS, G, getOperand(i));
1235 }
1236 if (DebugLoc DL = getDebugLoc()) {
1237 OS << ", ";
1238 DL.print(OS);
1239 }
1240}
This file declares a class to represent arbitrary precision floating point values and provide a varie...
This file implements a class to represent arbitrary precision integral constant values and operations...
@ Scaled
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
static GCRegistry::Add< ErlangGC > A("erlang", "erlang-compatible garbage collector")
#define LLVM_DUMP_METHOD
Mark debug helper function definitions like dump() that should not be stripped from debug builds.
Definition Compiler.h:638
This file contains the declarations for the subclasses of Constant, which represent the different fla...
const HexagonInstrInfo * TII
static bool hasNoSignedWrap(BinaryOperator &I)
static bool hasNoUnsignedWrap(BinaryOperator &I)
#define G(x, y, z)
Definition MD5.cpp:55
This file declares the MachineConstantPool class which is an abstract constant pool to keep track of ...
static Printable PrintNodeId(const SDNode &Node)
SmallPtrSet< const SDNode *, 32 > VisitedSDNodeSet
static cl::opt< bool > VerboseDAGDumping("dag-dump-verbose", cl::Hidden, cl::desc("Display more information when dumping selection " "DAG nodes."))
static bool printOperand(raw_ostream &OS, const SelectionDAG *G, const SDValue Value)
static bool shouldPrintInline(const SDNode &Node, const SelectionDAG *G)
Return true if this node is so simple that we should just print it inline if it appears as an operand...
static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent, const SelectionDAG *G, VisitedSDNodeSet &once)
static void printMemOperand(raw_ostream &OS, const MachineMemOperand &MMO, const MachineFunction *MF, const Module *M, const MachineFrameInfo *MFI, const TargetInstrInfo *TII, LLVMContext &Ctx)
static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G)
static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N, const SelectionDAG *G, unsigned depth, unsigned indent)
This file defines the SmallPtrSet class.
This file contains some functions that are useful when dealing with strings.
This file describes how to lower LLVM code to machine code.
static const fltSemantics & IEEEsingle()
Definition APFloat.h:296
static const fltSemantics & IEEEdouble()
Definition APFloat.h:297
A debug info location.
Definition DebugLoc.h:123
Module * getParent()
Get the module that this global value is contained inside of...
This is an important class for using LLVM in a threaded context.
Definition LLVMContext.h:68
This class is used to represent ISD::LOAD nodes.
Metadata node.
Definition Metadata.h:1078
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted.
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
Function & getFunction()
Return the LLVM function that this machine code represents.
A description of a memory reference used in the backend.
LLVM_ABI void print(raw_ostream &OS, ModuleSlotTracker &MST, SmallVectorImpl< StringRef > &SSNs, const LLVMContext &Context, const MachineFrameInfo *MFI, const TargetInstrInfo *TII) const
Support for operator<<.
An SDNode that represents everything that will be needed to construct a MachineInstr.
ArrayRef< MachineMemOperand * >::const_iterator mmo_iterator
This class is used to represent an MLOAD node.
This class is used to represent an MSTORE node.
This is an abstract virtual class for memory operations.
Manage lifetime of a slot tracker for printing IR.
void incorporateFunction(const Function &F)
Incorporate the given function.
A Module instance is used to store all the information related to an LLVM module.
Definition Module.h:67
Simple wrapper around std::function<void(raw_ostream&)>.
Definition Printable.h:38
Holds the information for a single machine location through SDISel; either an SDNode,...
@ VREG
Value is a virtual register.
@ FRAMEIX
Value is contents of a stack location.
@ SDNODE
Value is the result of an expression.
@ CONST
Value is a constant.
Holds the information from a dbg_value node through SDISel.
bool isEmitted() const
LLVM_DUMP_METHOD void print(raw_ostream &OS) const
unsigned getOrder() const
Returns the SDNodeOrder.
LLVM_DUMP_METHOD void dump() const
bool isInvalidated() const
ArrayRef< SDDbgOperand > getLocationOps() const
bool isIndirect() const
Returns whether this is an indirect value.
bool isVariadic() const
Represents one node in the SelectionDAG.
bool isMachineOpcode() const
Test if this node has a post-isel opcode, directly corresponding to a MachineInstr opcode.
LLVM_ABI void dumprFull(const SelectionDAG *G=nullptr) const
printrFull to dbgs().
int getNodeId() const
Return the unique node id.
LLVM_ABI void dump() const
Dump this node, for debugging.
unsigned getOpcode() const
Return the SelectionDAG opcode value for this node.
bool isDivergent() const
static LLVM_ABI const char * getIndexedModeName(ISD::MemIndexedMode AM)
unsigned getIROrder() const
Return the node ordering.
bool getHasDebugValue() const
LLVM_ABI void dumpr() const
Dump (recursively) this node and its use-def subgraph.
SDNodeFlags getFlags() const
LLVM_ABI std::string getOperationName(const SelectionDAG *G=nullptr) const
Return the opcode of this operation for printing.
LLVM_ABI void printrFull(raw_ostream &O, const SelectionDAG *G=nullptr) const
Print a SelectionDAG node and all children down to the leaves.
friend class SelectionDAG
LLVM_ABI void printr(raw_ostream &OS, const SelectionDAG *G=nullptr) const
uint64_t getAsZExtVal() const
Helper method returns the zero-extended integer value of a ConstantSDNode.
unsigned getNumValues() const
Return the number of values defined/returned by this operator.
unsigned getNumOperands() const
Return the number of values used by this operation.
unsigned getMachineOpcode() const
This may only be called if isMachineOpcode returns true.
const SDValue & getOperand(unsigned Num) const
LLVM_ABI void print(raw_ostream &OS, const SelectionDAG *G=nullptr) const
const DebugLoc & getDebugLoc() const
Return the source location info.
LLVM_ABI void printrWithDepth(raw_ostream &O, const SelectionDAG *G=nullptr, unsigned depth=100) const
Print a SelectionDAG node and children up to depth "depth." The given SelectionDAG allows target-spec...
LLVM_ABI void dumprWithDepth(const SelectionDAG *G=nullptr, unsigned depth=100) const
printrWithDepth to dbgs().
EVT getValueType(unsigned ResNo) const
Return the type of a specified result.
LLVM_ABI void print_details(raw_ostream &OS, const SelectionDAG *G) const
LLVM_ABI void print_types(raw_ostream &OS, const SelectionDAG *G) const
Unlike LLVM values, Selection DAG nodes may return multiple values as the result of a computation.
Targets can subclass this to parameterize the SelectionDAG lowering and instruction selection process...
virtual const char * getTargetNodeName(unsigned Opcode) const
Returns the name of the given target-specific opcode, suitable for debug printing.
This is used to represent a portion of an LLVM function in a low-level Data Dependence DAG representa...
const SDValue & getRoot() const
Return the root tag of the SelectionDAG.
SDDbgInfo::DbgIterator ByvalParmDbgEnd() const
SDDbgInfo::DbgIterator ByvalParmDbgBegin() const
LLVM_ABI void dump(bool Sorted=false) const
Dump the textual format of this DAG.
SDDbgInfo::DbgIterator DbgEnd() const
SDDbgInfo::DbgIterator DbgBegin() const
iterator_range< allnodes_iterator > allnodes()
LLVM_ABI SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, ArrayRef< SDUse > Ops)
Gets or creates the specified node.
LLVM_ABI void getTopologicallyOrderedNodes(SmallVectorImpl< const SDNode * > &SortedNodes) const
Get all the nodes in their topological order without modifying any states.
This SDNode is used to implement the code generator support for the llvm IR shufflevector instruction...
std::pair< iterator, bool > insert(PtrType Ptr)
Inserts Ptr if and only if there is no element in the container equal to Ptr.
SmallPtrSet - This class implements a set which is optimized for holding SmallSize or less elements.
void reserve(size_type N)
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
An SDNode that holds an arbitrary LLVM IR Value.
This class is used to represent ISD::STORE nodes.
std::string str() const
str - Get the contents as an std::string.
Definition StringRef.h:225
Completely target-dependent object reference.
TargetInstrInfo - Interface to description of machine instruction set.
This class defines information used to lower LLVM code to legal SelectionDAG operators that the targe...
virtual const char * getTargetNodeName(unsigned Opcode) const
This method returns the name of a target specific DAG node.
This class is used to represent EVT's, which are used to parameterize some operations.
LLVM Value Representation.
Definition Value.h:75
LLVM_ABI StringRef getName() const
Return a constant reference to the value's name.
Definition Value.cpp:322
This class implements an extremely fast bulk output stream that can only output to a stream.
Definition raw_ostream.h:53
virtual raw_ostream & changeColor(enum Colors Color, bool Bold=false, bool BG=false)
Changes the foreground color of text that will be output from this point forward.
virtual raw_ostream & resetColor()
Resets the colors to terminal defaults.
static constexpr Colors BLACK
static constexpr Colors GREEN
raw_ostream & indent(unsigned NumSpaces)
indent - Insert 'NumSpaces' spaces.
static constexpr Colors BLUE
static constexpr Colors RED
static constexpr Colors MAGENTA
static constexpr Colors YELLOW
static constexpr Colors CYAN
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
Abstract Attribute helper functions.
Definition Attributor.h:165
@ SETCC
SetCC operator - This evaluates to a true value iff the condition is true.
Definition ISDOpcodes.h:818
@ MERGE_VALUES
MERGE_VALUES - This node takes multiple discrete operands and returns them all as its individual resu...
Definition ISDOpcodes.h:261
@ STACKRESTORE
STACKRESTORE has two operands, an input chain and a pointer to restore to it returns an output chain.
@ STACKSAVE
STACKSAVE - STACKSAVE has one operand, an input chain.
@ CTLZ_ZERO_UNDEF
Definition ISDOpcodes.h:787
@ TargetConstantPool
Definition ISDOpcodes.h:189
@ CONVERGENCECTRL_ANCHOR
The llvm.experimental.convergence.* intrinsics.
@ MDNODE_SDNODE
MDNODE_SDNODE - This is a node that holdes an MDNode*, which is used to reference metadata in the IR.
@ STRICT_FSETCC
STRICT_FSETCC/STRICT_FSETCCS - Constrained versions of SETCC, used for floating-point operands only.
Definition ISDOpcodes.h:511
@ PTRADD
PTRADD represents pointer arithmetic semantics, for targets that opt in using shouldPreservePtrArith(...
@ DELETED_NODE
DELETED_NODE - This is an illegal value that is used to catch errors.
Definition ISDOpcodes.h:45
@ POISON
POISON - A poison node.
Definition ISDOpcodes.h:236
@ SET_FPENV
Sets the current floating-point environment.
@ PARTIAL_REDUCE_SMLA
PARTIAL_REDUCE_[U|S]MLA(Accumulator, Input1, Input2) The partial reduction nodes sign or zero extend ...
@ LOOP_DEPENDENCE_RAW_MASK
@ VECREDUCE_SEQ_FADD
Generic reduction nodes.
@ MLOAD
Masked load and store - consecutive vector load and store operations with additional mask operand tha...
@ EH_SJLJ_LONGJMP
OUTCHAIN = EH_SJLJ_LONGJMP(INCHAIN, buffer) This corresponds to the eh.sjlj.longjmp intrinsic.
Definition ISDOpcodes.h:168
@ FGETSIGN
INT = FGETSIGN(FP) - Return the sign bit of the specified floating point value as an integer 0/1 valu...
Definition ISDOpcodes.h:538
@ SMUL_LOHI
SMUL_LOHI/UMUL_LOHI - Multiply two integers of type iN, producing a signed/unsigned value of type i[2...
Definition ISDOpcodes.h:275
@ INSERT_SUBVECTOR
INSERT_SUBVECTOR(VECTOR1, VECTOR2, IDX) - Returns a vector with VECTOR2 inserted into VECTOR1.
Definition ISDOpcodes.h:600
@ STACKADDRESS
STACKADDRESS - Represents the llvm.stackaddress intrinsic.
Definition ISDOpcodes.h:127
@ JUMP_TABLE_DEBUG_INFO
JUMP_TABLE_DEBUG_INFO - Jumptable debug info.
@ BSWAP
Byte Swap and Counting operators.
Definition ISDOpcodes.h:778
@ SMULFIX
RESULT = [US]MULFIX(LHS, RHS, SCALE) - Perform fixed point multiplication on 2 integers with the same...
Definition ISDOpcodes.h:394
@ VAEND
VAEND, VASTART - VAEND and VASTART have three operands: an input chain, pointer, and a SRCVALUE.
@ TargetBlockAddress
Definition ISDOpcodes.h:191
@ ATOMIC_STORE
OUTCHAIN = ATOMIC_STORE(INCHAIN, val, ptr) This corresponds to "store atomic" instruction.
@ ADDC
Carry-setting nodes for multiple precision addition and subtraction.
Definition ISDOpcodes.h:294
@ FRAME_TO_ARGS_OFFSET
FRAME_TO_ARGS_OFFSET - This node represents offset from frame pointer to first (possible) on-stack ar...
Definition ISDOpcodes.h:145
@ RESET_FPENV
Set floating-point environment to default state.
@ FMAD
FMAD - Perform a * b + c, while getting the same result as the separately rounded operations.
Definition ISDOpcodes.h:522
@ ADD
Simple integer binary arithmetic operators.
Definition ISDOpcodes.h:264
@ LOAD
LOAD and STORE have token chains as their first operand, then the same operands as an LLVM load/store...
@ SMULFIXSAT
Same as the corresponding unsaturated fixed point instructions, but the result is clamped between the...
Definition ISDOpcodes.h:400
@ SET_FPMODE
Sets the current dynamic floating-point control modes.
@ ANY_EXTEND
ANY_EXTEND - Used for integer types. The high bits are undefined.
Definition ISDOpcodes.h:852
@ ATOMIC_LOAD_USUB_COND
@ FMA
FMA - Perform a * b + c with no intermediate rounding step.
Definition ISDOpcodes.h:518
@ VECTOR_FIND_LAST_ACTIVE
Finds the index of the last active mask element Operands: Mask.
@ FMODF
FMODF - Decomposes the operand into integral and fractional parts, each having the same type and sign...
@ FATAN2
FATAN2 - atan2, inspired by libm.
@ FSINCOSPI
FSINCOSPI - Compute both the sine and cosine times pi more accurately than FSINCOS(pi*x),...
@ INTRINSIC_VOID
OUTCHAIN = INTRINSIC_VOID(INCHAIN, INTRINSICID, arg1, arg2, ...) This node represents a target intrin...
Definition ISDOpcodes.h:220
@ EH_SJLJ_SETUP_DISPATCH
OUTCHAIN = EH_SJLJ_SETUP_DISPATCH(INCHAIN) The target initializes the dispatch table here.
Definition ISDOpcodes.h:172
@ GlobalAddress
Definition ISDOpcodes.h:88
@ ATOMIC_CMP_SWAP_WITH_SUCCESS
Val, Success, OUTCHAIN = ATOMIC_CMP_SWAP_WITH_SUCCESS(INCHAIN, ptr, cmp, swap) N.b.
@ STRICT_FMINIMUM
Definition ISDOpcodes.h:471
@ SINT_TO_FP
[SU]INT_TO_FP - These operators convert integers (whose interpreted sign depends on the first letter)...
Definition ISDOpcodes.h:879
@ CONCAT_VECTORS
CONCAT_VECTORS(VECTOR0, VECTOR1, ...) - Given a number of values of vector type with the same length ...
Definition ISDOpcodes.h:584
@ VECREDUCE_FMAX
FMIN/FMAX nodes can have flags, for NaN/NoNaN variants.
@ FADD
Simple binary floating point operators.
Definition ISDOpcodes.h:417
@ VECREDUCE_FMAXIMUM
FMINIMUM/FMAXIMUM nodes propatate NaNs and signed zeroes using the llvm.minimum and llvm....
@ ABS
ABS - Determine the unsigned absolute value of a signed integer value of the same bitwidth.
Definition ISDOpcodes.h:746
@ MEMBARRIER
MEMBARRIER - Compiler barrier only; generate a no-op.
@ ATOMIC_FENCE
OUTCHAIN = ATOMIC_FENCE(INCHAIN, ordering, scope) This corresponds to the fence instruction.
@ RESET_FPMODE
Sets default dynamic floating-point control modes.
@ SIGN_EXTEND_VECTOR_INREG
SIGN_EXTEND_VECTOR_INREG(Vector) - This operator represents an in-register sign-extension of the low ...
Definition ISDOpcodes.h:909
@ SDIVREM
SDIVREM/UDIVREM - Divide two integers and produce both a quotient and remainder result.
Definition ISDOpcodes.h:280
@ FP16_TO_FP
FP16_TO_FP, FP_TO_FP16 - These operators are used to perform promotions and truncation for half-preci...
@ FMULADD
FMULADD - Performs a * b + c, with, or without, intermediate rounding.
Definition ISDOpcodes.h:528
@ FPTRUNC_ROUND
FPTRUNC_ROUND - This corresponds to the fptrunc_round intrinsic.
Definition ISDOpcodes.h:515
@ FAKE_USE
FAKE_USE represents a use of the operand but does not do anything.
@ BITCAST
BITCAST - This operator converts between integer, vector and FP values, as if the value was stored to...
Definition ISDOpcodes.h:992
@ BUILD_PAIR
BUILD_PAIR - This is the opposite of EXTRACT_ELEMENT in some ways.
Definition ISDOpcodes.h:254
@ CLMUL
Carry-less multiplication operations.
Definition ISDOpcodes.h:773
@ INIT_TRAMPOLINE
INIT_TRAMPOLINE - This corresponds to the init_trampoline intrinsic.
@ FLDEXP
FLDEXP - ldexp, inspired by libm (op0 * 2**op1).
@ SDIVFIX
RESULT = [US]DIVFIX(LHS, RHS, SCALE) - Perform fixed point division on 2 integers with the same width...
Definition ISDOpcodes.h:407
@ STRICT_FSQRT
Constrained versions of libm-equivalent floating point intrinsics.
Definition ISDOpcodes.h:438
@ BUILTIN_OP_END
BUILTIN_OP_END - This must be the last enum value in this list.
@ GlobalTLSAddress
Definition ISDOpcodes.h:89
@ SRCVALUE
SRCVALUE - This is a node type that holds a Value* that is used to make reference to a value in the L...
@ EH_LABEL
EH_LABEL - Represents a label in mid basic block used to track locations needed for debug and excepti...
@ ATOMIC_LOAD_USUB_SAT
@ EH_RETURN
OUTCHAIN = EH_RETURN(INCHAIN, OFFSET, HANDLER) - This node represents 'eh_return' gcc dwarf builtin,...
Definition ISDOpcodes.h:156
@ ANNOTATION_LABEL
ANNOTATION_LABEL - Represents a mid basic block label used by annotations.
@ SET_ROUNDING
Set rounding mode.
Definition ISDOpcodes.h:974
@ CONVERGENCECTRL_GLUE
This does not correspond to any convergence control intrinsic.
@ PARTIAL_REDUCE_UMLA
@ SIGN_EXTEND
Conversion operators.
Definition ISDOpcodes.h:843
@ AVGCEILS
AVGCEILS/AVGCEILU - Rounding averaging add - Add two integers using an integer of type i[N+2],...
Definition ISDOpcodes.h:714
@ STRICT_UINT_TO_FP
Definition ISDOpcodes.h:485
@ SCALAR_TO_VECTOR
SCALAR_TO_VECTOR(VAL) - This represents the operation of loading a scalar value into element 0 of the...
Definition ISDOpcodes.h:664
@ PREALLOCATED_SETUP
PREALLOCATED_SETUP - This has 2 operands: an input chain and a SRCVALUE with the preallocated call Va...
@ READSTEADYCOUNTER
READSTEADYCOUNTER - This corresponds to the readfixedcounter intrinsic.
@ ADDROFRETURNADDR
ADDROFRETURNADDR - Represents the llvm.addressofreturnaddress intrinsic.
Definition ISDOpcodes.h:117
@ TargetExternalSymbol
Definition ISDOpcodes.h:190
@ CONVERGENCECTRL_ENTRY
@ BR
Control flow instructions. These all have token chains.
@ VECREDUCE_FADD
These reductions have relaxed evaluation order semantics, and have a single vector operand.
@ CTTZ_ZERO_UNDEF
Bit counting operators with an undefined result for zero inputs.
Definition ISDOpcodes.h:786
@ TargetJumpTable
Definition ISDOpcodes.h:188
@ TargetIndex
TargetIndex - Like a constant pool entry, but with completely target-dependent semantics.
Definition ISDOpcodes.h:198
@ PARTIAL_REDUCE_FMLA
@ PREFETCH
PREFETCH - This corresponds to a prefetch intrinsic.
@ TRUNCATE_SSAT_U
Definition ISDOpcodes.h:872
@ FSINCOS
FSINCOS - Compute both fsin and fcos as a single operation.
@ SETCCCARRY
Like SetCC, ops #0 and #1 are the LHS and RHS operands to compare, but op #2 is a boolean indicating ...
Definition ISDOpcodes.h:826
@ FNEG
Perform various unary floating-point operations inspired by libm.
@ BR_CC
BR_CC - Conditional branch.
@ SSUBO
Same for subtraction.
Definition ISDOpcodes.h:352
@ PREALLOCATED_ARG
PREALLOCATED_ARG - This has 3 operands: an input chain, a SRCVALUE with the preallocated call Value,...
@ BRIND
BRIND - Indirect branch.
@ BR_JT
BR_JT - Jumptable branch.
@ GC_TRANSITION_START
GC_TRANSITION_START/GC_TRANSITION_END - These operators mark the beginning and end of GC transition s...
@ VECTOR_INTERLEAVE
VECTOR_INTERLEAVE(VEC1, VEC2, ...) - Returns N vectors from N input vectors, where N is the factor to...
Definition ISDOpcodes.h:635
@ STEP_VECTOR
STEP_VECTOR(IMM) - Returns a scalable vector whose lanes are comprised of a linear sequence of unsign...
Definition ISDOpcodes.h:690
@ FCANONICALIZE
Returns platform specific canonical encoding of a floating point number.
Definition ISDOpcodes.h:541
@ IS_FPCLASS
Performs a check of floating point class property, defined by IEEE-754.
Definition ISDOpcodes.h:548
@ SSUBSAT
RESULT = [US]SUBSAT(LHS, RHS) - Perform saturation subtraction on 2 integers with the same bit width ...
Definition ISDOpcodes.h:374
@ SELECT
Select(COND, TRUEVAL, FALSEVAL).
Definition ISDOpcodes.h:795
@ ATOMIC_LOAD
Val, OUTCHAIN = ATOMIC_LOAD(INCHAIN, ptr) This corresponds to "load atomic" instruction.
@ UNDEF
UNDEF - An undefined node.
Definition ISDOpcodes.h:233
@ EXTRACT_ELEMENT
EXTRACT_ELEMENT - This is used to get the lower or upper (determined by a Constant,...
Definition ISDOpcodes.h:247
@ SPLAT_VECTOR
SPLAT_VECTOR(VAL) - Returns a vector with the scalar value VAL duplicated in all lanes.
Definition ISDOpcodes.h:671
@ AssertAlign
AssertAlign - These nodes record if a register contains a value that has a known alignment and the tr...
Definition ISDOpcodes.h:69
@ VACOPY
VACOPY - VACOPY has 5 operands: an input chain, a destination pointer, a source pointer,...
@ GET_ACTIVE_LANE_MASK
GET_ACTIVE_LANE_MASK - this corrosponds to the llvm.get.active.lane.mask intrinsic.
@ BasicBlock
Various leaf nodes.
Definition ISDOpcodes.h:81
@ CopyFromReg
CopyFromReg - This node indicates that the input value is a virtual or physical register that is defi...
Definition ISDOpcodes.h:230
@ SADDO
RESULT, BOOL = [SU]ADDO(LHS, RHS) - Overflow-aware nodes for addition.
Definition ISDOpcodes.h:348
@ TargetGlobalAddress
TargetGlobalAddress - Like GlobalAddress, but the DAG does no folding or anything else with this node...
Definition ISDOpcodes.h:185
@ CTLS
Count leading redundant sign bits.
Definition ISDOpcodes.h:791
@ VECREDUCE_ADD
Integer reductions may have a result type larger than the vector element type.
@ GET_ROUNDING
Returns current rounding mode: -1 Undefined 0 Round to 0 1 Round to nearest, ties to even 2 Round to ...
Definition ISDOpcodes.h:969
@ STRICT_FP_TO_FP16
@ MULHU
MULHU/MULHS - Multiply high - Multiply two integers of type iN, producing an unsigned/signed value of...
Definition ISDOpcodes.h:703
@ CLEANUPRET
CLEANUPRET - Represents a return from a cleanup block funclet.
@ ATOMIC_LOAD_FMAXIMUM
@ GET_FPMODE
Reads the current dynamic floating-point control modes.
@ STRICT_FP16_TO_FP
@ GET_FPENV
Gets the current floating-point environment.
@ SHL
Shift and rotation operations.
Definition ISDOpcodes.h:764
@ AssertNoFPClass
AssertNoFPClass - These nodes record if a register contains a float value that is known to be not som...
Definition ISDOpcodes.h:78
@ VECTOR_SHUFFLE
VECTOR_SHUFFLE(VEC1, VEC2) - Returns a vector, of the same type as VEC1/VEC2.
Definition ISDOpcodes.h:649
@ PtrAuthGlobalAddress
A ptrauth constant.
Definition ISDOpcodes.h:100
@ EXTRACT_SUBVECTOR
EXTRACT_SUBVECTOR(VECTOR, IDX) - Returns a subvector from VECTOR.
Definition ISDOpcodes.h:614
@ FMINNUM_IEEE
FMINNUM_IEEE/FMAXNUM_IEEE - Perform floating-point minimumNumber or maximumNumber on two values,...
@ STRICT_FMAXIMUM
Definition ISDOpcodes.h:470
@ EntryToken
EntryToken - This is the marker used to indicate the start of a region.
Definition ISDOpcodes.h:48
@ READ_REGISTER
READ_REGISTER, WRITE_REGISTER - This node represents llvm.register on the DAG, which implements the n...
Definition ISDOpcodes.h:139
@ EXTRACT_VECTOR_ELT
EXTRACT_VECTOR_ELT(VECTOR, IDX) - Returns a single element from VECTOR identified by the (potentially...
Definition ISDOpcodes.h:576
@ CopyToReg
CopyToReg - This node has three operands: a chain, a register number to set to this value,...
Definition ISDOpcodes.h:224
@ ZERO_EXTEND
ZERO_EXTEND - Used for integer types, zeroing the new bits.
Definition ISDOpcodes.h:849
@ TargetConstantFP
Definition ISDOpcodes.h:180
@ DEBUGTRAP
DEBUGTRAP - Trap intended to get the attention of a debugger.
@ SELECT_CC
Select with condition operator - This selects between a true value and a false value (ops #2 and #3) ...
Definition ISDOpcodes.h:810
@ VSCALE
VSCALE(IMM) - Returns the runtime scaling factor used to calculate the number of elements within a sc...
@ ATOMIC_CMP_SWAP
Val, OUTCHAIN = ATOMIC_CMP_SWAP(INCHAIN, ptr, cmp, swap) For double-word atomic operations: ValLo,...
@ LOCAL_RECOVER
LOCAL_RECOVER - Represents the llvm.localrecover intrinsic.
Definition ISDOpcodes.h:135
@ FMINNUM
FMINNUM/FMAXNUM - Perform floating-point minimum maximum on two values, following IEEE-754 definition...
@ UBSANTRAP
UBSANTRAP - Trap with an immediate describing the kind of sanitizer failure.
@ SSHLSAT
RESULT = [US]SHLSAT(LHS, RHS) - Perform saturation left shift.
Definition ISDOpcodes.h:386
@ PATCHPOINT
The llvm.experimental.patchpoint.
@ SMULO
Same for multiplication.
Definition ISDOpcodes.h:356
@ ATOMIC_LOAD_FMINIMUM
@ DYNAMIC_STACKALLOC
DYNAMIC_STACKALLOC - Allocate some number of bytes on the stack aligned to a specified boundary.
@ TargetFrameIndex
Definition ISDOpcodes.h:187
@ VECTOR_SPLICE_LEFT
VECTOR_SPLICE_LEFT(VEC1, VEC2, IMM) - Shifts CONCAT_VECTORS(VEC1, VEC2) left by IMM elements and retu...
Definition ISDOpcodes.h:653
@ ANY_EXTEND_VECTOR_INREG
ANY_EXTEND_VECTOR_INREG(Vector) - This operator represents an in-register any-extension of the low la...
Definition ISDOpcodes.h:898
@ SIGN_EXTEND_INREG
SIGN_EXTEND_INREG - This operator atomically performs a SHL/SRA pair to sign extend a small value in ...
Definition ISDOpcodes.h:887
@ SMIN
[US]{MIN/MAX} - Binary minimum or maximum of signed or unsigned integers.
Definition ISDOpcodes.h:726
@ VECTOR_REVERSE
VECTOR_REVERSE(VECTOR) - Returns a vector, of the same type as VECTOR, whose elements are shuffled us...
Definition ISDOpcodes.h:640
@ LIFETIME_START
This corresponds to the llvm.lifetime.
@ SDIVFIXSAT
Same as the corresponding unsaturated fixed point instructions, but the result is clamped between the...
Definition ISDOpcodes.h:413
@ FP_EXTEND
X = FP_EXTEND(Y) - Extend a smaller FP type into a larger FP type.
Definition ISDOpcodes.h:977
@ GLOBAL_OFFSET_TABLE
The address of the GOT.
Definition ISDOpcodes.h:103
@ VSELECT
Select with a vector condition (op #0) and two vector operands (ops #1 and #2), returning a vector re...
Definition ISDOpcodes.h:804
@ UADDO_CARRY
Carry-using nodes for multiple precision addition and subtraction.
Definition ISDOpcodes.h:328
@ STRICT_SINT_TO_FP
STRICT_[US]INT_TO_FP - Convert a signed or unsigned integer to a floating point value.
Definition ISDOpcodes.h:484
@ MGATHER
Masked gather and scatter - load and store operations for a vector of random addresses with additiona...
@ HANDLENODE
HANDLENODE node - Used as a handle for various purposes.
@ STRICT_BF16_TO_FP
@ PCMARKER
PCMARKER - This corresponds to the pcmarker intrinsic.
@ STRICT_FROUNDEVEN
Definition ISDOpcodes.h:464
@ INLINEASM_BR
INLINEASM_BR - Branching version of inline asm. Used by asm-goto.
@ EH_DWARF_CFA
EH_DWARF_CFA - This node represents the pointer to the DWARF Canonical Frame Address (CFA),...
Definition ISDOpcodes.h:150
@ BF16_TO_FP
BF16_TO_FP, FP_TO_BF16 - These operators are used to perform promotions and truncation for bfloat16.
@ FRAMEADDR
FRAMEADDR, RETURNADDR - These nodes represent llvm.frameaddress and llvm.returnaddress on the DAG.
Definition ISDOpcodes.h:110
@ ATOMIC_LOAD_UDEC_WRAP
@ STRICT_FP_TO_UINT
Definition ISDOpcodes.h:478
@ STRICT_FP_ROUND
X = STRICT_FP_ROUND(Y, TRUNC) - Rounding 'Y' from a larger floating point type down to the precision ...
Definition ISDOpcodes.h:500
@ STRICT_FP_TO_SINT
STRICT_FP_TO_[US]INT - Convert a floating point value to a signed or unsigned integer.
Definition ISDOpcodes.h:477
@ FMINIMUM
FMINIMUM/FMAXIMUM - NaN-propagating minimum/maximum that also treat -0.0 as less than 0....
@ FP_TO_SINT
FP_TO_[US]INT - Convert a floating point value to a signed or unsigned integer.
Definition ISDOpcodes.h:925
@ READCYCLECOUNTER
READCYCLECOUNTER - This corresponds to the readcyclecounter intrinsic.
@ TargetConstant
TargetConstant* - Like Constant*, but the DAG does not do any folding, simplification,...
Definition ISDOpcodes.h:179
@ STRICT_FP_EXTEND
X = STRICT_FP_EXTEND(Y) - Extend a smaller FP type into a larger FP type.
Definition ISDOpcodes.h:505
@ RELOC_NONE
Issue a no-op relocation against a given symbol at the current location.
@ AND
Bitwise operators - logical and, logical or, logical xor.
Definition ISDOpcodes.h:738
@ TRAP
TRAP - Trapping instruction.
@ INTRINSIC_WO_CHAIN
RESULT = INTRINSIC_WO_CHAIN(INTRINSICID, arg1, arg2, ...) This node represents a target intrinsic fun...
Definition ISDOpcodes.h:205
@ GET_FPENV_MEM
Gets the current floating-point environment.
@ PSEUDO_PROBE
Pseudo probe for AutoFDO, as a place holder in a basic block to improve the sample counts quality.
@ STRICT_FP_TO_BF16
@ SCMP
[US]CMP - 3-way comparison of signed or unsigned integers.
Definition ISDOpcodes.h:734
@ CARRY_FALSE
CARRY_FALSE - This node is used when folding other nodes, like ADDC/SUBC, which indicate the carry re...
Definition ISDOpcodes.h:285
@ AVGFLOORS
AVGFLOORS/AVGFLOORU - Averaging add - Add two integers using an integer of type i[N+1],...
Definition ISDOpcodes.h:709
@ VECTOR_SPLICE_RIGHT
VECTOR_SPLICE_RIGHT(VEC1, VEC2, IMM) - Shifts CONCAT_VECTORS(VEC1, VEC2) right by IMM elements and re...
Definition ISDOpcodes.h:656
@ ADDE
Carry-using nodes for multiple precision addition and subtraction.
Definition ISDOpcodes.h:304
@ STRICT_FADD
Constrained versions of the binary floating point operators.
Definition ISDOpcodes.h:427
@ STACKMAP
The llvm.experimental.stackmap intrinsic.
@ SPLAT_VECTOR_PARTS
SPLAT_VECTOR_PARTS(SCALAR1, SCALAR2, ...) - Returns a vector with the scalar values joined together a...
Definition ISDOpcodes.h:680
@ FREEZE
FREEZE - FREEZE(VAL) returns an arbitrary value if VAL is UNDEF (or is evaluated to UNDEF),...
Definition ISDOpcodes.h:241
@ INSERT_VECTOR_ELT
INSERT_VECTOR_ELT(VECTOR, VAL, IDX) - Returns VECTOR with the element at IDX replaced with VAL.
Definition ISDOpcodes.h:565
@ TokenFactor
TokenFactor - This node takes multiple tokens as input and produces a single token result.
Definition ISDOpcodes.h:53
@ ATOMIC_SWAP
Val, OUTCHAIN = ATOMIC_SWAP(INCHAIN, ptr, amt) Val, OUTCHAIN = ATOMIC_LOAD_[OpName](INCHAIN,...
@ ExternalSymbol
Definition ISDOpcodes.h:93
@ FFREXP
FFREXP - frexp, extract fractional and exponent component of a floating-point value.
@ FP_ROUND
X = FP_ROUND(Y, TRUNC) - Rounding 'Y' from a larger floating point type down to the precision of the ...
Definition ISDOpcodes.h:958
@ VECTOR_COMPRESS
VECTOR_COMPRESS(Vec, Mask, Passthru) consecutively place vector elements based on mask e....
Definition ISDOpcodes.h:698
@ SPONENTRY
SPONENTRY - Represents the llvm.sponentry intrinsic.
Definition ISDOpcodes.h:122
@ CLEAR_CACHE
llvm.clear_cache intrinsic Operands: Input Chain, Start Addres, End Address Outputs: Output Chain
@ CONVERGENCECTRL_LOOP
@ ZERO_EXTEND_VECTOR_INREG
ZERO_EXTEND_VECTOR_INREG(Vector) - This operator represents an in-register zero-extension of the low ...
Definition ISDOpcodes.h:920
@ ADDRSPACECAST
ADDRSPACECAST - This operator converts between pointers of different address spaces.
Definition ISDOpcodes.h:996
@ EXPERIMENTAL_VECTOR_HISTOGRAM
Experimental vector histogram intrinsic Operands: Input Chain, Inc, Mask, Base, Index,...
@ INLINEASM
INLINEASM - Represents an inline asm block.
@ STRICT_FNEARBYINT
Definition ISDOpcodes.h:458
@ FP_TO_SINT_SAT
FP_TO_[US]INT_SAT - Convert floating point value in operand 0 to a signed or unsigned scalar integer ...
Definition ISDOpcodes.h:944
@ VECREDUCE_FMINIMUM
@ EH_SJLJ_SETJMP
RESULT, OUTCHAIN = EH_SJLJ_SETJMP(INCHAIN, buffer) This corresponds to the eh.sjlj....
Definition ISDOpcodes.h:162
@ TRUNCATE
TRUNCATE - Completely drop the high bits.
Definition ISDOpcodes.h:855
@ VAARG
VAARG - VAARG has four operands: an input chain, a pointer, a SRCVALUE, and the alignment.
@ BRCOND
BRCOND - Conditional branch.
@ VECREDUCE_SEQ_FMUL
@ SHL_PARTS
SHL_PARTS/SRA_PARTS/SRL_PARTS - These operators are used for expanded integer shift operations.
Definition ISDOpcodes.h:832
@ CATCHRET
CATCHRET - Represents a return from a catch block funclet.
@ GC_TRANSITION_END
@ AssertSext
AssertSext, AssertZext - These nodes record if a register contains a value that has already been zero...
Definition ISDOpcodes.h:62
@ ATOMIC_LOAD_UINC_WRAP
@ FCOPYSIGN
FCOPYSIGN(X, Y) - Return the value of X with the sign of Y.
Definition ISDOpcodes.h:534
@ PARTIAL_REDUCE_SUMLA
@ SADDSAT
RESULT = [US]ADDSAT(LHS, RHS) - Perform saturation addition on 2 integers with the same bit width (W)...
Definition ISDOpcodes.h:365
@ CALLSEQ_START
CALLSEQ_START/CALLSEQ_END - These operators mark the beginning and end of a call sequence,...
@ VECTOR_DEINTERLEAVE
VECTOR_DEINTERLEAVE(VEC1, VEC2, ...) - Returns N vectors from N input vectors, where N is the factor ...
Definition ISDOpcodes.h:624
@ GET_DYNAMIC_AREA_OFFSET
GET_DYNAMIC_AREA_OFFSET - get offset from native SP to the address of the most recent dynamic alloca.
@ SET_FPENV_MEM
Sets the current floating point environment.
@ FMINIMUMNUM
FMINIMUMNUM/FMAXIMUMNUM - minimumnum/maximumnum that is same with FMINNUM_IEEE and FMAXNUM_IEEE besid...
@ TRUNCATE_SSAT_S
TRUNCATE_[SU]SAT_[SU] - Truncate for saturated operand [SU] located in middle, prefix for SAT means i...
Definition ISDOpcodes.h:870
@ ABDS
ABDS/ABDU - Absolute difference - Return the absolute difference between two numbers interpreted as s...
Definition ISDOpcodes.h:721
@ ADJUST_TRAMPOLINE
ADJUST_TRAMPOLINE - This corresponds to the adjust_trampoline intrinsic.
@ TRUNCATE_USAT_U
Definition ISDOpcodes.h:874
@ SADDO_CARRY
Carry-using overflow-aware nodes for multiple precision addition and subtraction.
Definition ISDOpcodes.h:338
@ INTRINSIC_W_CHAIN
RESULT,OUTCHAIN = INTRINSIC_W_CHAIN(INCHAIN, INTRINSICID, arg1, ...) This node represents a target in...
Definition ISDOpcodes.h:213
@ TargetGlobalTLSAddress
Definition ISDOpcodes.h:186
@ BUILD_VECTOR
BUILD_VECTOR(ELT0, ELT1, ELT2, ELT3,...) - Return a fixed-width vector with the specified,...
Definition ISDOpcodes.h:556
@ LOOP_DEPENDENCE_WAR_MASK
The llvm.loop.dependence.
MemIndexedMode
MemIndexedMode enum - This enum defines the load / store indexed addressing modes.
LLVM_ABI StringRef getBaseName(ID id)
Return the LLVM name for an intrinsic, without encoded types for overloading, such as "llvm....
This is an optimization pass for GlobalISel generic memory operations.
Definition Types.h:26
decltype(auto) dyn_cast(const From &Val)
dyn_cast<X> - Return the argument parameter cast to the specified type.
Definition Casting.h:643
iterator_range< T > make_range(T x, T y)
Convenience function for iterating over sub-ranges.
std::string utostr(uint64_t X, bool isNeg=false)
decltype(auto) get(const PointerIntPair< PointerTy, IntBits, IntType, PtrTraits, Info > &Pair)
LLVM_ABI raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition Debug.cpp:207
bool isa(const From &Val)
isa<X> - Return true if the parameter to the template is an instance of one of the template type argu...
Definition Casting.h:547
DWARFExpression::Operation Op
decltype(auto) cast(const From &Val)
cast<X> - Return the argument parameter cast to the specified type.
Definition Casting.h:559
LLVM_ABI Printable printReg(Register Reg, const TargetRegisterInfo *TRI=nullptr, unsigned SubIdx=0, const MachineRegisterInfo *MRI=nullptr)
Prints virtual and physical registers with or without a TRI instance.
#define N
LLVM_ABI std::string getEVTString() const
This function returns value type as a string, e.g. "i32".