LLVM  15.0.0git
SelectionDAGDumper.cpp
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1 //===- SelectionDAGDumper.cpp - Implement SelectionDAG::dump() ------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This implements the SelectionDAG::dump method and friends.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #include "SDNodeDbgValue.h"
14 #include "llvm/ADT/APFloat.h"
15 #include "llvm/ADT/APInt.h"
16 #include "llvm/ADT/SmallPtrSet.h"
17 #include "llvm/ADT/StringExtras.h"
29 #include "llvm/Config/llvm-config.h"
30 #include "llvm/IR/BasicBlock.h"
31 #include "llvm/IR/Constants.h"
33 #include "llvm/IR/DebugLoc.h"
34 #include "llvm/IR/Function.h"
35 #include "llvm/IR/Intrinsics.h"
37 #include "llvm/IR/Value.h"
38 #include "llvm/Support/Casting.h"
40 #include "llvm/Support/Compiler.h"
41 #include "llvm/Support/Debug.h"
44 #include "llvm/Support/Printable.h"
48 #include <cstdint>
49 #include <iterator>
50 
51 using namespace llvm;
52 
53 static cl::opt<bool>
54 VerboseDAGDumping("dag-dump-verbose", cl::Hidden,
55  cl::desc("Display more information when dumping selection "
56  "DAG nodes."));
57 
58 std::string SDNode::getOperationName(const SelectionDAG *G) const {
59  switch (getOpcode()) {
60  default:
62  return "<<Unknown DAG Node>>";
63  if (isMachineOpcode()) {
64  if (G)
65  if (const TargetInstrInfo *TII = G->getSubtarget().getInstrInfo())
66  if (getMachineOpcode() < TII->getNumOpcodes())
67  return std::string(TII->getName(getMachineOpcode()));
68  return "<<Unknown Machine Node #" + utostr(getOpcode()) + ">>";
69  }
70  if (G) {
71  const TargetLowering &TLI = G->getTargetLoweringInfo();
72  const char *Name = TLI.getTargetNodeName(getOpcode());
73  if (Name) return Name;
74  return "<<Unknown Target Node #" + utostr(getOpcode()) + ">>";
75  }
76  return "<<Unknown Node #" + utostr(getOpcode()) + ">>";
77 
78 #ifndef NDEBUG
79  case ISD::DELETED_NODE: return "<<Deleted Node!>>";
80 #endif
81  case ISD::PREFETCH: return "Prefetch";
82  case ISD::ATOMIC_FENCE: return "AtomicFence";
83  case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap";
84  case ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS: return "AtomicCmpSwapWithSuccess";
85  case ISD::ATOMIC_SWAP: return "AtomicSwap";
86  case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd";
87  case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub";
88  case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd";
89  case ISD::ATOMIC_LOAD_CLR: return "AtomicLoadClr";
90  case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr";
91  case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor";
92  case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand";
93  case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin";
94  case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax";
95  case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin";
96  case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax";
97  case ISD::ATOMIC_LOAD_FADD: return "AtomicLoadFAdd";
98  case ISD::ATOMIC_LOAD: return "AtomicLoad";
99  case ISD::ATOMIC_STORE: return "AtomicStore";
100  case ISD::PCMARKER: return "PCMarker";
101  case ISD::READCYCLECOUNTER: return "ReadCycleCounter";
102  case ISD::SRCVALUE: return "SrcValue";
103  case ISD::MDNODE_SDNODE: return "MDNode";
104  case ISD::EntryToken: return "EntryToken";
105  case ISD::TokenFactor: return "TokenFactor";
106  case ISD::AssertSext: return "AssertSext";
107  case ISD::AssertZext: return "AssertZext";
108  case ISD::AssertAlign: return "AssertAlign";
109 
110  case ISD::BasicBlock: return "BasicBlock";
111  case ISD::VALUETYPE: return "ValueType";
112  case ISD::Register: return "Register";
113  case ISD::RegisterMask: return "RegisterMask";
114  case ISD::Constant:
115  if (cast<ConstantSDNode>(this)->isOpaque())
116  return "OpaqueConstant";
117  return "Constant";
118  case ISD::ConstantFP: return "ConstantFP";
119  case ISD::GlobalAddress: return "GlobalAddress";
120  case ISD::GlobalTLSAddress: return "GlobalTLSAddress";
121  case ISD::FrameIndex: return "FrameIndex";
122  case ISD::JumpTable: return "JumpTable";
123  case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE";
124  case ISD::RETURNADDR: return "RETURNADDR";
125  case ISD::ADDROFRETURNADDR: return "ADDROFRETURNADDR";
126  case ISD::FRAMEADDR: return "FRAMEADDR";
127  case ISD::SPONENTRY: return "SPONENTRY";
128  case ISD::LOCAL_RECOVER: return "LOCAL_RECOVER";
129  case ISD::READ_REGISTER: return "READ_REGISTER";
130  case ISD::WRITE_REGISTER: return "WRITE_REGISTER";
131  case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET";
132  case ISD::EH_DWARF_CFA: return "EH_DWARF_CFA";
133  case ISD::EH_RETURN: return "EH_RETURN";
134  case ISD::EH_SJLJ_SETJMP: return "EH_SJLJ_SETJMP";
135  case ISD::EH_SJLJ_LONGJMP: return "EH_SJLJ_LONGJMP";
136  case ISD::EH_SJLJ_SETUP_DISPATCH: return "EH_SJLJ_SETUP_DISPATCH";
137  case ISD::ConstantPool: return "ConstantPool";
138  case ISD::TargetIndex: return "TargetIndex";
139  case ISD::ExternalSymbol: return "ExternalSymbol";
140  case ISD::BlockAddress: return "BlockAddress";
142  case ISD::INTRINSIC_VOID:
143  case ISD::INTRINSIC_W_CHAIN: {
144  unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1;
145  unsigned IID = cast<ConstantSDNode>(getOperand(OpNo))->getZExtValue();
146  if (IID < Intrinsic::num_intrinsics)
148  if (!G)
149  return "Unknown intrinsic";
150  if (const TargetIntrinsicInfo *TII = G->getTarget().getIntrinsicInfo())
151  return TII->getName(IID);
152  llvm_unreachable("Invalid intrinsic ID");
153  }
154 
155  case ISD::BUILD_VECTOR: return "BUILD_VECTOR";
156  case ISD::TargetConstant:
157  if (cast<ConstantSDNode>(this)->isOpaque())
158  return "OpaqueTargetConstant";
159  return "TargetConstant";
160  case ISD::TargetConstantFP: return "TargetConstantFP";
161  case ISD::TargetGlobalAddress: return "TargetGlobalAddress";
162  case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress";
163  case ISD::TargetFrameIndex: return "TargetFrameIndex";
164  case ISD::TargetJumpTable: return "TargetJumpTable";
165  case ISD::TargetConstantPool: return "TargetConstantPool";
166  case ISD::TargetExternalSymbol: return "TargetExternalSymbol";
167  case ISD::MCSymbol: return "MCSymbol";
168  case ISD::TargetBlockAddress: return "TargetBlockAddress";
169 
170  case ISD::CopyToReg: return "CopyToReg";
171  case ISD::CopyFromReg: return "CopyFromReg";
172  case ISD::UNDEF: return "undef";
173  case ISD::VSCALE: return "vscale";
174  case ISD::MERGE_VALUES: return "merge_values";
175  case ISD::INLINEASM: return "inlineasm";
176  case ISD::INLINEASM_BR: return "inlineasm_br";
177  case ISD::EH_LABEL: return "eh_label";
178  case ISD::ANNOTATION_LABEL: return "annotation_label";
179  case ISD::HANDLENODE: return "handlenode";
180 
181  // Unary operators
182  case ISD::FABS: return "fabs";
183  case ISD::FMINNUM: return "fminnum";
184  case ISD::STRICT_FMINNUM: return "strict_fminnum";
185  case ISD::FMAXNUM: return "fmaxnum";
186  case ISD::STRICT_FMAXNUM: return "strict_fmaxnum";
187  case ISD::FMINNUM_IEEE: return "fminnum_ieee";
188  case ISD::FMAXNUM_IEEE: return "fmaxnum_ieee";
189  case ISD::FMINIMUM: return "fminimum";
190  case ISD::STRICT_FMINIMUM: return "strict_fminimum";
191  case ISD::FMAXIMUM: return "fmaximum";
192  case ISD::STRICT_FMAXIMUM: return "strict_fmaximum";
193  case ISD::FNEG: return "fneg";
194  case ISD::FSQRT: return "fsqrt";
195  case ISD::STRICT_FSQRT: return "strict_fsqrt";
196  case ISD::FCBRT: return "fcbrt";
197  case ISD::FSIN: return "fsin";
198  case ISD::STRICT_FSIN: return "strict_fsin";
199  case ISD::FCOS: return "fcos";
200  case ISD::STRICT_FCOS: return "strict_fcos";
201  case ISD::FSINCOS: return "fsincos";
202  case ISD::FTRUNC: return "ftrunc";
203  case ISD::STRICT_FTRUNC: return "strict_ftrunc";
204  case ISD::FFLOOR: return "ffloor";
205  case ISD::STRICT_FFLOOR: return "strict_ffloor";
206  case ISD::FCEIL: return "fceil";
207  case ISD::STRICT_FCEIL: return "strict_fceil";
208  case ISD::FRINT: return "frint";
209  case ISD::STRICT_FRINT: return "strict_frint";
210  case ISD::FNEARBYINT: return "fnearbyint";
211  case ISD::STRICT_FNEARBYINT: return "strict_fnearbyint";
212  case ISD::FROUND: return "fround";
213  case ISD::STRICT_FROUND: return "strict_fround";
214  case ISD::FROUNDEVEN: return "froundeven";
215  case ISD::STRICT_FROUNDEVEN: return "strict_froundeven";
216  case ISD::FEXP: return "fexp";
217  case ISD::STRICT_FEXP: return "strict_fexp";
218  case ISD::FEXP2: return "fexp2";
219  case ISD::STRICT_FEXP2: return "strict_fexp2";
220  case ISD::FLOG: return "flog";
221  case ISD::STRICT_FLOG: return "strict_flog";
222  case ISD::FLOG2: return "flog2";
223  case ISD::STRICT_FLOG2: return "strict_flog2";
224  case ISD::FLOG10: return "flog10";
225  case ISD::STRICT_FLOG10: return "strict_flog10";
226 
227  // Binary operators
228  case ISD::ADD: return "add";
229  case ISD::SUB: return "sub";
230  case ISD::MUL: return "mul";
231  case ISD::MULHU: return "mulhu";
232  case ISD::MULHS: return "mulhs";
233  case ISD::AVGFLOORU: return "avgflooru";
234  case ISD::AVGFLOORS: return "avgfloors";
235  case ISD::AVGCEILU: return "avgceilu";
236  case ISD::AVGCEILS: return "avgceils";
237  case ISD::ABDS: return "abds";
238  case ISD::ABDU: return "abdu";
239  case ISD::SDIV: return "sdiv";
240  case ISD::UDIV: return "udiv";
241  case ISD::SREM: return "srem";
242  case ISD::UREM: return "urem";
243  case ISD::SMUL_LOHI: return "smul_lohi";
244  case ISD::UMUL_LOHI: return "umul_lohi";
245  case ISD::SDIVREM: return "sdivrem";
246  case ISD::UDIVREM: return "udivrem";
247  case ISD::AND: return "and";
248  case ISD::OR: return "or";
249  case ISD::XOR: return "xor";
250  case ISD::SHL: return "shl";
251  case ISD::SRA: return "sra";
252  case ISD::SRL: return "srl";
253  case ISD::ROTL: return "rotl";
254  case ISD::ROTR: return "rotr";
255  case ISD::FSHL: return "fshl";
256  case ISD::FSHR: return "fshr";
257  case ISD::FADD: return "fadd";
258  case ISD::STRICT_FADD: return "strict_fadd";
259  case ISD::FSUB: return "fsub";
260  case ISD::STRICT_FSUB: return "strict_fsub";
261  case ISD::FMUL: return "fmul";
262  case ISD::STRICT_FMUL: return "strict_fmul";
263  case ISD::FDIV: return "fdiv";
264  case ISD::STRICT_FDIV: return "strict_fdiv";
265  case ISD::FMA: return "fma";
266  case ISD::STRICT_FMA: return "strict_fma";
267  case ISD::FMAD: return "fmad";
268  case ISD::FREM: return "frem";
269  case ISD::STRICT_FREM: return "strict_frem";
270  case ISD::FCOPYSIGN: return "fcopysign";
271  case ISD::FGETSIGN: return "fgetsign";
272  case ISD::FCANONICALIZE: return "fcanonicalize";
273  case ISD::IS_FPCLASS: return "is_fpclass";
274  case ISD::FPOW: return "fpow";
275  case ISD::STRICT_FPOW: return "strict_fpow";
276  case ISD::SMIN: return "smin";
277  case ISD::SMAX: return "smax";
278  case ISD::UMIN: return "umin";
279  case ISD::UMAX: return "umax";
280 
281  case ISD::FPOWI: return "fpowi";
282  case ISD::STRICT_FPOWI: return "strict_fpowi";
283  case ISD::SETCC: return "setcc";
284  case ISD::SETCCCARRY: return "setcccarry";
285  case ISD::STRICT_FSETCC: return "strict_fsetcc";
286  case ISD::STRICT_FSETCCS: return "strict_fsetccs";
287  case ISD::SELECT: return "select";
288  case ISD::VSELECT: return "vselect";
289  case ISD::SELECT_CC: return "select_cc";
290  case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt";
291  case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt";
292  case ISD::CONCAT_VECTORS: return "concat_vectors";
293  case ISD::INSERT_SUBVECTOR: return "insert_subvector";
294  case ISD::EXTRACT_SUBVECTOR: return "extract_subvector";
295  case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector";
296  case ISD::VECTOR_SHUFFLE: return "vector_shuffle";
297  case ISD::VECTOR_SPLICE: return "vector_splice";
298  case ISD::SPLAT_VECTOR: return "splat_vector";
299  case ISD::SPLAT_VECTOR_PARTS: return "splat_vector_parts";
300  case ISD::VECTOR_REVERSE: return "vector_reverse";
301  case ISD::STEP_VECTOR: return "step_vector";
302  case ISD::CARRY_FALSE: return "carry_false";
303  case ISD::ADDC: return "addc";
304  case ISD::ADDE: return "adde";
305  case ISD::ADDCARRY: return "addcarry";
306  case ISD::SADDO_CARRY: return "saddo_carry";
307  case ISD::SADDO: return "saddo";
308  case ISD::UADDO: return "uaddo";
309  case ISD::SSUBO: return "ssubo";
310  case ISD::USUBO: return "usubo";
311  case ISD::SMULO: return "smulo";
312  case ISD::UMULO: return "umulo";
313  case ISD::SUBC: return "subc";
314  case ISD::SUBE: return "sube";
315  case ISD::SUBCARRY: return "subcarry";
316  case ISD::SSUBO_CARRY: return "ssubo_carry";
317  case ISD::SHL_PARTS: return "shl_parts";
318  case ISD::SRA_PARTS: return "sra_parts";
319  case ISD::SRL_PARTS: return "srl_parts";
320 
321  case ISD::SADDSAT: return "saddsat";
322  case ISD::UADDSAT: return "uaddsat";
323  case ISD::SSUBSAT: return "ssubsat";
324  case ISD::USUBSAT: return "usubsat";
325  case ISD::SSHLSAT: return "sshlsat";
326  case ISD::USHLSAT: return "ushlsat";
327 
328  case ISD::SMULFIX: return "smulfix";
329  case ISD::SMULFIXSAT: return "smulfixsat";
330  case ISD::UMULFIX: return "umulfix";
331  case ISD::UMULFIXSAT: return "umulfixsat";
332 
333  case ISD::SDIVFIX: return "sdivfix";
334  case ISD::SDIVFIXSAT: return "sdivfixsat";
335  case ISD::UDIVFIX: return "udivfix";
336  case ISD::UDIVFIXSAT: return "udivfixsat";
337 
338  // Conversion operators.
339  case ISD::SIGN_EXTEND: return "sign_extend";
340  case ISD::ZERO_EXTEND: return "zero_extend";
341  case ISD::ANY_EXTEND: return "any_extend";
342  case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg";
343  case ISD::ANY_EXTEND_VECTOR_INREG: return "any_extend_vector_inreg";
344  case ISD::SIGN_EXTEND_VECTOR_INREG: return "sign_extend_vector_inreg";
345  case ISD::ZERO_EXTEND_VECTOR_INREG: return "zero_extend_vector_inreg";
346  case ISD::TRUNCATE: return "truncate";
347  case ISD::FP_ROUND: return "fp_round";
348  case ISD::STRICT_FP_ROUND: return "strict_fp_round";
349  case ISD::FP_EXTEND: return "fp_extend";
350  case ISD::STRICT_FP_EXTEND: return "strict_fp_extend";
351 
352  case ISD::SINT_TO_FP: return "sint_to_fp";
353  case ISD::STRICT_SINT_TO_FP: return "strict_sint_to_fp";
354  case ISD::UINT_TO_FP: return "uint_to_fp";
355  case ISD::STRICT_UINT_TO_FP: return "strict_uint_to_fp";
356  case ISD::FP_TO_SINT: return "fp_to_sint";
357  case ISD::STRICT_FP_TO_SINT: return "strict_fp_to_sint";
358  case ISD::FP_TO_UINT: return "fp_to_uint";
359  case ISD::STRICT_FP_TO_UINT: return "strict_fp_to_uint";
360  case ISD::FP_TO_SINT_SAT: return "fp_to_sint_sat";
361  case ISD::FP_TO_UINT_SAT: return "fp_to_uint_sat";
362  case ISD::BITCAST: return "bitcast";
363  case ISD::ADDRSPACECAST: return "addrspacecast";
364  case ISD::FP16_TO_FP: return "fp16_to_fp";
365  case ISD::STRICT_FP16_TO_FP: return "strict_fp16_to_fp";
366  case ISD::FP_TO_FP16: return "fp_to_fp16";
367  case ISD::STRICT_FP_TO_FP16: return "strict_fp_to_fp16";
368  case ISD::LROUND: return "lround";
369  case ISD::STRICT_LROUND: return "strict_lround";
370  case ISD::LLROUND: return "llround";
371  case ISD::STRICT_LLROUND: return "strict_llround";
372  case ISD::LRINT: return "lrint";
373  case ISD::STRICT_LRINT: return "strict_lrint";
374  case ISD::LLRINT: return "llrint";
375  case ISD::STRICT_LLRINT: return "strict_llrint";
376 
377  // Control flow instructions
378  case ISD::BR: return "br";
379  case ISD::BRIND: return "brind";
380  case ISD::BR_JT: return "br_jt";
381  case ISD::BRCOND: return "brcond";
382  case ISD::BR_CC: return "br_cc";
383  case ISD::CALLSEQ_START: return "callseq_start";
384  case ISD::CALLSEQ_END: return "callseq_end";
385 
386  // EH instructions
387  case ISD::CATCHRET: return "catchret";
388  case ISD::CLEANUPRET: return "cleanupret";
389 
390  // Other operators
391  case ISD::LOAD: return "load";
392  case ISD::STORE: return "store";
393  case ISD::MLOAD: return "masked_load";
394  case ISD::MSTORE: return "masked_store";
395  case ISD::MGATHER: return "masked_gather";
396  case ISD::MSCATTER: return "masked_scatter";
397  case ISD::VAARG: return "vaarg";
398  case ISD::VACOPY: return "vacopy";
399  case ISD::VAEND: return "vaend";
400  case ISD::VASTART: return "vastart";
401  case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc";
402  case ISD::EXTRACT_ELEMENT: return "extract_element";
403  case ISD::BUILD_PAIR: return "build_pair";
404  case ISD::STACKSAVE: return "stacksave";
405  case ISD::STACKRESTORE: return "stackrestore";
406  case ISD::TRAP: return "trap";
407  case ISD::DEBUGTRAP: return "debugtrap";
408  case ISD::UBSANTRAP: return "ubsantrap";
409  case ISD::LIFETIME_START: return "lifetime.start";
410  case ISD::LIFETIME_END: return "lifetime.end";
411  case ISD::PSEUDO_PROBE:
412  return "pseudoprobe";
413  case ISD::GC_TRANSITION_START: return "gc_transition.start";
414  case ISD::GC_TRANSITION_END: return "gc_transition.end";
415  case ISD::GET_DYNAMIC_AREA_OFFSET: return "get.dynamic.area.offset";
416  case ISD::FREEZE: return "freeze";
418  return "call_setup";
420  return "call_alloc";
421 
422  // Floating point environment manipulation
423  case ISD::FLT_ROUNDS_: return "flt_rounds";
424  case ISD::SET_ROUNDING: return "set_rounding";
425 
426  // Bit manipulation
427  case ISD::ABS: return "abs";
428  case ISD::BITREVERSE: return "bitreverse";
429  case ISD::BSWAP: return "bswap";
430  case ISD::CTPOP: return "ctpop";
431  case ISD::CTTZ: return "cttz";
432  case ISD::CTTZ_ZERO_UNDEF: return "cttz_zero_undef";
433  case ISD::CTLZ: return "ctlz";
434  case ISD::CTLZ_ZERO_UNDEF: return "ctlz_zero_undef";
435  case ISD::PARITY: return "parity";
436 
437  // Trampolines
438  case ISD::INIT_TRAMPOLINE: return "init_trampoline";
439  case ISD::ADJUST_TRAMPOLINE: return "adjust_trampoline";
440 
441  case ISD::CONDCODE:
442  switch (cast<CondCodeSDNode>(this)->get()) {
443  default: llvm_unreachable("Unknown setcc condition!");
444  case ISD::SETOEQ: return "setoeq";
445  case ISD::SETOGT: return "setogt";
446  case ISD::SETOGE: return "setoge";
447  case ISD::SETOLT: return "setolt";
448  case ISD::SETOLE: return "setole";
449  case ISD::SETONE: return "setone";
450 
451  case ISD::SETO: return "seto";
452  case ISD::SETUO: return "setuo";
453  case ISD::SETUEQ: return "setueq";
454  case ISD::SETUGT: return "setugt";
455  case ISD::SETUGE: return "setuge";
456  case ISD::SETULT: return "setult";
457  case ISD::SETULE: return "setule";
458  case ISD::SETUNE: return "setune";
459 
460  case ISD::SETEQ: return "seteq";
461  case ISD::SETGT: return "setgt";
462  case ISD::SETGE: return "setge";
463  case ISD::SETLT: return "setlt";
464  case ISD::SETLE: return "setle";
465  case ISD::SETNE: return "setne";
466 
467  case ISD::SETTRUE: return "settrue";
468  case ISD::SETTRUE2: return "settrue2";
469  case ISD::SETFALSE: return "setfalse";
470  case ISD::SETFALSE2: return "setfalse2";
471  }
472  case ISD::VECREDUCE_FADD: return "vecreduce_fadd";
473  case ISD::VECREDUCE_SEQ_FADD: return "vecreduce_seq_fadd";
474  case ISD::VECREDUCE_FMUL: return "vecreduce_fmul";
475  case ISD::VECREDUCE_SEQ_FMUL: return "vecreduce_seq_fmul";
476  case ISD::VECREDUCE_ADD: return "vecreduce_add";
477  case ISD::VECREDUCE_MUL: return "vecreduce_mul";
478  case ISD::VECREDUCE_AND: return "vecreduce_and";
479  case ISD::VECREDUCE_OR: return "vecreduce_or";
480  case ISD::VECREDUCE_XOR: return "vecreduce_xor";
481  case ISD::VECREDUCE_SMAX: return "vecreduce_smax";
482  case ISD::VECREDUCE_SMIN: return "vecreduce_smin";
483  case ISD::VECREDUCE_UMAX: return "vecreduce_umax";
484  case ISD::VECREDUCE_UMIN: return "vecreduce_umin";
485  case ISD::VECREDUCE_FMAX: return "vecreduce_fmax";
486  case ISD::VECREDUCE_FMIN: return "vecreduce_fmin";
487 
488  // Vector Predication
489 #define BEGIN_REGISTER_VP_SDNODE(SDID, LEGALARG, NAME, ...) \
490  case ISD::SDID: \
491  return #NAME;
492 #include "llvm/IR/VPIntrinsics.def"
493  }
494 }
495 
497  switch (AM) {
498  default: return "";
499  case ISD::PRE_INC: return "<pre-inc>";
500  case ISD::PRE_DEC: return "<pre-dec>";
501  case ISD::POST_INC: return "<post-inc>";
502  case ISD::POST_DEC: return "<post-dec>";
503  }
504 }
505 
506 static Printable PrintNodeId(const SDNode &Node) {
507  return Printable([&Node](raw_ostream &OS) {
508 #ifndef NDEBUG
509  OS << 't' << Node.PersistentId;
510 #else
511  OS << (const void*)&Node;
512 #endif
513  });
514 }
515 
516 // Print the MMO with more information from the SelectionDAG.
517 static void printMemOperand(raw_ostream &OS, const MachineMemOperand &MMO,
518  const MachineFunction *MF, const Module *M,
519  const MachineFrameInfo *MFI,
520  const TargetInstrInfo *TII, LLVMContext &Ctx) {
521  ModuleSlotTracker MST(M);
522  if (MF)
523  MST.incorporateFunction(MF->getFunction());
525  MMO.print(OS, MST, SSNs, Ctx, MFI, TII);
526 }
527 
528 static void printMemOperand(raw_ostream &OS, const MachineMemOperand &MMO,
529  const SelectionDAG *G) {
530  if (G) {
531  const MachineFunction *MF = &G->getMachineFunction();
532  return printMemOperand(OS, MMO, MF, MF->getFunction().getParent(),
533  &MF->getFrameInfo(),
534  G->getSubtarget().getInstrInfo(), *G->getContext());
535  }
536 
537  LLVMContext Ctx;
538  return printMemOperand(OS, MMO, /*MF=*/nullptr, /*M=*/nullptr,
539  /*MFI=*/nullptr, /*TII=*/nullptr, Ctx);
540 }
541 
542 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
543 LLVM_DUMP_METHOD void SDNode::dump() const { dump(nullptr); }
544 
546  print(dbgs(), G);
547  dbgs() << '\n';
548 }
549 #endif
550 
552  for (unsigned i = 0, e = getNumValues(); i != e; ++i) {
553  if (i) OS << ",";
554  if (getValueType(i) == MVT::Other)
555  OS << "ch";
556  else
557  OS << getValueType(i).getEVTString();
558  }
559 }
560 
562  if (getFlags().hasNoUnsignedWrap())
563  OS << " nuw";
564 
565  if (getFlags().hasNoSignedWrap())
566  OS << " nsw";
567 
568  if (getFlags().hasExact())
569  OS << " exact";
570 
571  if (getFlags().hasNoNaNs())
572  OS << " nnan";
573 
574  if (getFlags().hasNoInfs())
575  OS << " ninf";
576 
577  if (getFlags().hasNoSignedZeros())
578  OS << " nsz";
579 
580  if (getFlags().hasAllowReciprocal())
581  OS << " arcp";
582 
583  if (getFlags().hasAllowContract())
584  OS << " contract";
585 
586  if (getFlags().hasApproximateFuncs())
587  OS << " afn";
588 
589  if (getFlags().hasAllowReassociation())
590  OS << " reassoc";
591 
592  if (getFlags().hasNoFPExcept())
593  OS << " nofpexcept";
594 
595  if (const MachineSDNode *MN = dyn_cast<MachineSDNode>(this)) {
596  if (!MN->memoperands_empty()) {
597  OS << "<";
598  OS << "Mem:";
599  for (MachineSDNode::mmo_iterator i = MN->memoperands_begin(),
600  e = MN->memoperands_end(); i != e; ++i) {
601  printMemOperand(OS, **i, G);
602  if (std::next(i) != e)
603  OS << " ";
604  }
605  OS << ">";
606  }
607  } else if (const ShuffleVectorSDNode *SVN =
608  dyn_cast<ShuffleVectorSDNode>(this)) {
609  OS << "<";
610  for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) {
611  int Idx = SVN->getMaskElt(i);
612  if (i) OS << ",";
613  if (Idx < 0)
614  OS << "u";
615  else
616  OS << Idx;
617  }
618  OS << ">";
619  } else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) {
620  OS << '<' << CSDN->getAPIntValue() << '>';
621  } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) {
622  if (&CSDN->getValueAPF().getSemantics() == &APFloat::IEEEsingle())
623  OS << '<' << CSDN->getValueAPF().convertToFloat() << '>';
624  else if (&CSDN->getValueAPF().getSemantics() == &APFloat::IEEEdouble())
625  OS << '<' << CSDN->getValueAPF().convertToDouble() << '>';
626  else {
627  OS << "<APFloat(";
628  CSDN->getValueAPF().bitcastToAPInt().print(OS, false);
629  OS << ")>";
630  }
631  } else if (const GlobalAddressSDNode *GADN =
632  dyn_cast<GlobalAddressSDNode>(this)) {
633  int64_t offset = GADN->getOffset();
634  OS << '<';
635  GADN->getGlobal()->printAsOperand(OS);
636  OS << '>';
637  if (offset > 0)
638  OS << " + " << offset;
639  else
640  OS << " " << offset;
641  if (unsigned int TF = GADN->getTargetFlags())
642  OS << " [TF=" << TF << ']';
643  } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) {
644  OS << "<" << FIDN->getIndex() << ">";
645  } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) {
646  OS << "<" << JTDN->getIndex() << ">";
647  if (unsigned int TF = JTDN->getTargetFlags())
648  OS << " [TF=" << TF << ']';
649  } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){
650  int offset = CP->getOffset();
651  if (CP->isMachineConstantPoolEntry())
652  OS << "<" << *CP->getMachineCPVal() << ">";
653  else
654  OS << "<" << *CP->getConstVal() << ">";
655  if (offset > 0)
656  OS << " + " << offset;
657  else
658  OS << " " << offset;
659  if (unsigned int TF = CP->getTargetFlags())
660  OS << " [TF=" << TF << ']';
661  } else if (const TargetIndexSDNode *TI = dyn_cast<TargetIndexSDNode>(this)) {
662  OS << "<" << TI->getIndex() << '+' << TI->getOffset() << ">";
663  if (unsigned TF = TI->getTargetFlags())
664  OS << " [TF=" << TF << ']';
665  } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) {
666  OS << "<";
667  const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock();
668  if (LBB)
669  OS << LBB->getName() << " ";
670  OS << (const void*)BBDN->getBasicBlock() << ">";
671  } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) {
672  OS << ' ' << printReg(R->getReg(),
673  G ? G->getSubtarget().getRegisterInfo() : nullptr);
674  } else if (const ExternalSymbolSDNode *ES =
675  dyn_cast<ExternalSymbolSDNode>(this)) {
676  OS << "'" << ES->getSymbol() << "'";
677  if (unsigned int TF = ES->getTargetFlags())
678  OS << " [TF=" << TF << ']';
679  } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) {
680  if (M->getValue())
681  OS << "<" << M->getValue() << ">";
682  else
683  OS << "<null>";
684  } else if (const MDNodeSDNode *MD = dyn_cast<MDNodeSDNode>(this)) {
685  if (MD->getMD())
686  OS << "<" << MD->getMD() << ">";
687  else
688  OS << "<null>";
689  } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) {
690  OS << ":" << N->getVT().getEVTString();
691  }
692  else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) {
693  OS << "<";
694 
695  printMemOperand(OS, *LD->getMemOperand(), G);
696 
697  bool doExt = true;
698  switch (LD->getExtensionType()) {
699  default: doExt = false; break;
700  case ISD::EXTLOAD: OS << ", anyext"; break;
701  case ISD::SEXTLOAD: OS << ", sext"; break;
702  case ISD::ZEXTLOAD: OS << ", zext"; break;
703  }
704  if (doExt)
705  OS << " from " << LD->getMemoryVT().getEVTString();
706 
707  const char *AM = getIndexedModeName(LD->getAddressingMode());
708  if (*AM)
709  OS << ", " << AM;
710 
711  OS << ">";
712  } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) {
713  OS << "<";
714  printMemOperand(OS, *ST->getMemOperand(), G);
715 
716  if (ST->isTruncatingStore())
717  OS << ", trunc to " << ST->getMemoryVT().getEVTString();
718 
719  const char *AM = getIndexedModeName(ST->getAddressingMode());
720  if (*AM)
721  OS << ", " << AM;
722 
723  OS << ">";
724  } else if (const MaskedLoadSDNode *MLd = dyn_cast<MaskedLoadSDNode>(this)) {
725  OS << "<";
726 
727  printMemOperand(OS, *MLd->getMemOperand(), G);
728 
729  bool doExt = true;
730  switch (MLd->getExtensionType()) {
731  default: doExt = false; break;
732  case ISD::EXTLOAD: OS << ", anyext"; break;
733  case ISD::SEXTLOAD: OS << ", sext"; break;
734  case ISD::ZEXTLOAD: OS << ", zext"; break;
735  }
736  if (doExt)
737  OS << " from " << MLd->getMemoryVT().getEVTString();
738 
739  const char *AM = getIndexedModeName(MLd->getAddressingMode());
740  if (*AM)
741  OS << ", " << AM;
742 
743  if (MLd->isExpandingLoad())
744  OS << ", expanding";
745 
746  OS << ">";
747  } else if (const MaskedStoreSDNode *MSt = dyn_cast<MaskedStoreSDNode>(this)) {
748  OS << "<";
749  printMemOperand(OS, *MSt->getMemOperand(), G);
750 
751  if (MSt->isTruncatingStore())
752  OS << ", trunc to " << MSt->getMemoryVT().getEVTString();
753 
754  const char *AM = getIndexedModeName(MSt->getAddressingMode());
755  if (*AM)
756  OS << ", " << AM;
757 
758  if (MSt->isCompressingStore())
759  OS << ", compressing";
760 
761  OS << ">";
762  } else if (const auto *MGather = dyn_cast<MaskedGatherSDNode>(this)) {
763  OS << "<";
764  printMemOperand(OS, *MGather->getMemOperand(), G);
765 
766  bool doExt = true;
767  switch (MGather->getExtensionType()) {
768  default: doExt = false; break;
769  case ISD::EXTLOAD: OS << ", anyext"; break;
770  case ISD::SEXTLOAD: OS << ", sext"; break;
771  case ISD::ZEXTLOAD: OS << ", zext"; break;
772  }
773  if (doExt)
774  OS << " from " << MGather->getMemoryVT().getEVTString();
775 
776  auto Signed = MGather->isIndexSigned() ? "signed" : "unsigned";
777  auto Scaled = MGather->isIndexScaled() ? "scaled" : "unscaled";
778  OS << ", " << Signed << " " << Scaled << " offset";
779 
780  OS << ">";
781  } else if (const auto *MScatter = dyn_cast<MaskedScatterSDNode>(this)) {
782  OS << "<";
783  printMemOperand(OS, *MScatter->getMemOperand(), G);
784 
785  if (MScatter->isTruncatingStore())
786  OS << ", trunc to " << MScatter->getMemoryVT().getEVTString();
787 
788  auto Signed = MScatter->isIndexSigned() ? "signed" : "unsigned";
789  auto Scaled = MScatter->isIndexScaled() ? "scaled" : "unscaled";
790  OS << ", " << Signed << " " << Scaled << " offset";
791 
792  OS << ">";
793  } else if (const MemSDNode *M = dyn_cast<MemSDNode>(this)) {
794  OS << "<";
795  printMemOperand(OS, *M->getMemOperand(), G);
796  OS << ">";
797  } else if (const BlockAddressSDNode *BA =
798  dyn_cast<BlockAddressSDNode>(this)) {
799  int64_t offset = BA->getOffset();
800  OS << "<";
801  BA->getBlockAddress()->getFunction()->printAsOperand(OS, false);
802  OS << ", ";
803  BA->getBlockAddress()->getBasicBlock()->printAsOperand(OS, false);
804  OS << ">";
805  if (offset > 0)
806  OS << " + " << offset;
807  else
808  OS << " " << offset;
809  if (unsigned int TF = BA->getTargetFlags())
810  OS << " [TF=" << TF << ']';
811  } else if (const AddrSpaceCastSDNode *ASC =
812  dyn_cast<AddrSpaceCastSDNode>(this)) {
813  OS << '['
814  << ASC->getSrcAddressSpace()
815  << " -> "
816  << ASC->getDestAddressSpace()
817  << ']';
818  } else if (const LifetimeSDNode *LN = dyn_cast<LifetimeSDNode>(this)) {
819  if (LN->hasOffset())
820  OS << "<" << LN->getOffset() << " to " << LN->getOffset() + LN->getSize() << ">";
821  } else if (const auto *AA = dyn_cast<AssertAlignSDNode>(this)) {
822  OS << '<' << AA->getAlign().value() << '>';
823  }
824 
825  if (VerboseDAGDumping) {
826  if (unsigned Order = getIROrder())
827  OS << " [ORD=" << Order << ']';
828 
829  if (getNodeId() != -1)
830  OS << " [ID=" << getNodeId() << ']';
831  if (!(isa<ConstantSDNode>(this) || (isa<ConstantFPSDNode>(this))))
832  OS << " # D:" << isDivergent();
833 
834  if (G && !G->GetDbgValues(this).empty()) {
835  OS << " [NoOfDbgValues=" << G->GetDbgValues(this).size() << ']';
836  for (SDDbgValue *Dbg : G->GetDbgValues(this))
837  if (!Dbg->isInvalidated())
838  Dbg->print(OS);
839  } else if (getHasDebugValue())
840  OS << " [NoOfDbgValues>0]";
841  }
842 }
843 
844 LLVM_DUMP_METHOD void SDDbgValue::print(raw_ostream &OS) const {
845  OS << " DbgVal(Order=" << getOrder() << ')';
846  if (isInvalidated())
847  OS << "(Invalidated)";
848  if (isEmitted())
849  OS << "(Emitted)";
850  OS << "(";
851  bool Comma = false;
852  for (const SDDbgOperand &Op : getLocationOps()) {
853  if (Comma)
854  OS << ", ";
855  switch (Op.getKind()) {
856  case SDDbgOperand::SDNODE:
857  if (Op.getSDNode())
858  OS << "SDNODE=" << PrintNodeId(*Op.getSDNode()) << ':' << Op.getResNo();
859  else
860  OS << "SDNODE";
861  break;
862  case SDDbgOperand::CONST:
863  OS << "CONST";
864  break;
865  case SDDbgOperand::FRAMEIX:
866  OS << "FRAMEIX=" << Op.getFrameIx();
867  break;
868  case SDDbgOperand::VREG:
869  OS << "VREG=" << Op.getVReg();
870  break;
871  }
872  Comma = true;
873  }
874  OS << ")";
875  if (isIndirect()) OS << "(Indirect)";
876  if (isVariadic())
877  OS << "(Variadic)";
878  OS << ":\"" << Var->getName() << '"';
879 #ifndef NDEBUG
880  if (Expr->getNumElements())
881  Expr->dump();
882 #endif
883 }
884 
885 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
886 LLVM_DUMP_METHOD void SDDbgValue::dump() const {
887  if (isInvalidated())
888  return;
889  print(dbgs());
890  dbgs() << "\n";
891 }
892 #endif
893 
894 /// Return true if this node is so simple that we should just print it inline
895 /// if it appears as an operand.
896 static bool shouldPrintInline(const SDNode &Node, const SelectionDAG *G) {
897  // Avoid lots of cluttering when inline printing nodes with associated
898  // DbgValues in verbose mode.
899  if (VerboseDAGDumping && G && !G->GetDbgValues(&Node).empty())
900  return false;
901  if (Node.getOpcode() == ISD::EntryToken)
902  return false;
903  return Node.getNumOperands() == 0;
904 }
905 
906 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
907 static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) {
908  for (const SDValue &Op : N->op_values()) {
909  if (shouldPrintInline(*Op.getNode(), G))
910  continue;
911  if (Op.getNode()->hasOneUse())
912  DumpNodes(Op.getNode(), indent+2, G);
913  }
914 
915  dbgs().indent(indent);
916  N->dump(G);
917 }
918 
919 LLVM_DUMP_METHOD void SelectionDAG::dump() const {
920  dbgs() << "SelectionDAG has " << AllNodes.size() << " nodes:\n";
921 
922  for (const SDNode &N : allnodes()) {
923  if (!N.hasOneUse() && &N != getRoot().getNode() &&
924  (!shouldPrintInline(N, this) || N.use_empty()))
925  DumpNodes(&N, 2, this);
926  }
927 
928  if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this);
929  dbgs() << "\n";
930 
931  if (VerboseDAGDumping) {
932  if (DbgBegin() != DbgEnd())
933  dbgs() << "SDDbgValues:\n";
934  for (auto *Dbg : make_range(DbgBegin(), DbgEnd()))
935  Dbg->dump();
936  if (ByvalParmDbgBegin() != ByvalParmDbgEnd())
937  dbgs() << "Byval SDDbgValues:\n";
938  for (auto *Dbg : make_range(ByvalParmDbgBegin(), ByvalParmDbgEnd()))
939  Dbg->dump();
940  }
941  dbgs() << "\n";
942 }
943 #endif
944 
945 void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const {
946  OS << PrintNodeId(*this) << ": ";
947  print_types(OS, G);
948  OS << " = " << getOperationName(G);
949  print_details(OS, G);
950 }
951 
952 static bool printOperand(raw_ostream &OS, const SelectionDAG *G,
953  const SDValue Value) {
954  if (!Value.getNode()) {
955  OS << "<null>";
956  return false;
957  }
958 
959  if (shouldPrintInline(*Value.getNode(), G)) {
960  OS << Value->getOperationName(G) << ':';
961  Value->print_types(OS, G);
962  Value->print_details(OS, G);
963  return true;
964  }
965 
966  OS << PrintNodeId(*Value.getNode());
967  if (unsigned RN = Value.getResNo())
968  OS << ':' << RN;
969  return false;
970 }
971 
972 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
973 using VisitedSDNodeSet = SmallPtrSet<const SDNode *, 32>;
974 
975 static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent,
976  const SelectionDAG *G, VisitedSDNodeSet &once) {
977  if (!once.insert(N).second) // If we've been here before, return now.
978  return;
979 
980  // Dump the current SDNode, but don't end the line yet.
981  OS.indent(indent);
982  N->printr(OS, G);
983 
984  // Having printed this SDNode, walk the children:
985  for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
986  if (i) OS << ",";
987  OS << " ";
988 
989  const SDValue Op = N->getOperand(i);
990  bool printedInline = printOperand(OS, G, Op);
991  if (printedInline)
992  once.insert(Op.getNode());
993  }
994 
995  OS << "\n";
996 
997  // Dump children that have grandchildren on their own line(s).
998  for (const SDValue &Op : N->op_values())
999  DumpNodesr(OS, Op.getNode(), indent+2, G, once);
1000 }
1001 
1002 LLVM_DUMP_METHOD void SDNode::dumpr() const {
1003  VisitedSDNodeSet once;
1004  DumpNodesr(dbgs(), this, 0, nullptr, once);
1005 }
1006 
1007 LLVM_DUMP_METHOD void SDNode::dumpr(const SelectionDAG *G) const {
1008  VisitedSDNodeSet once;
1009  DumpNodesr(dbgs(), this, 0, G, once);
1010 }
1011 #endif
1012 
1013 static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N,
1014  const SelectionDAG *G, unsigned depth,
1015  unsigned indent) {
1016  if (depth == 0)
1017  return;
1018 
1019  OS.indent(indent);
1020 
1021  N->print(OS, G);
1022 
1023  for (const SDValue &Op : N->op_values()) {
1024  // Don't follow chain operands.
1025  if (Op.getValueType() == MVT::Other)
1026  continue;
1027  OS << '\n';
1028  printrWithDepthHelper(OS, Op.getNode(), G, depth - 1, indent + 2);
1029  }
1030 }
1031 
1032 void SDNode::printrWithDepth(raw_ostream &OS, const SelectionDAG *G,
1033  unsigned depth) const {
1034  printrWithDepthHelper(OS, this, G, depth, 0);
1035 }
1036 
1037 void SDNode::printrFull(raw_ostream &OS, const SelectionDAG *G) const {
1038  // Don't print impossibly deep things.
1039  printrWithDepth(OS, G, 10);
1040 }
1041 
1042 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
1043 LLVM_DUMP_METHOD
1044 void SDNode::dumprWithDepth(const SelectionDAG *G, unsigned depth) const {
1045  printrWithDepth(dbgs(), G, depth);
1046 }
1047 
1048 LLVM_DUMP_METHOD void SDNode::dumprFull(const SelectionDAG *G) const {
1049  // Don't print impossibly deep things.
1050  dumprWithDepth(G, 10);
1051 }
1052 #endif
1053 
1054 void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const {
1055  printr(OS, G);
1056  for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
1057  if (i) OS << ", "; else OS << " ";
1058  printOperand(OS, G, getOperand(i));
1059  }
1060  if (DebugLoc DL = getDebugLoc()) {
1061  OS << ", ";
1062  DL.print(OS);
1063  }
1064 }
llvm::ISD::SUB
@ SUB
Definition: ISDOpcodes.h:240
llvm::Intrinsic::getBaseName
StringRef getBaseName(ID id)
Return the LLVM name for an intrinsic, without encoded types for overloading, such as "llvm....
Definition: Function.cpp:874
llvm::ISD::FPOWI
@ FPOWI
Definition: ISDOpcodes.h:910
llvm::ISD::FROUNDEVEN
@ FROUNDEVEN
Definition: ISDOpcodes.h:922
i
i
Definition: README.txt:29
llvm::ISD::ExternalSymbol
@ ExternalSymbol
Definition: ISDOpcodes.h:83
llvm::ISD::STRICT_FP_ROUND
@ STRICT_FP_ROUND
X = STRICT_FP_ROUND(Y, TRUNC) - Rounding 'Y' from a larger floating point type down to the precision ...
Definition: ISDOpcodes.h:464
llvm::ISD::SETUGE
@ SETUGE
Definition: ISDOpcodes.h:1417
ValueTypes.h
llvm::ConstantSDNode
Definition: SelectionDAGNodes.h:1564
llvm::ISD::SETCCCARRY
@ SETCCCARRY
Like SetCC, ops #0 and #1 are the LHS and RHS operands to compare, but op #2 is a boolean indicating ...
Definition: ISDOpcodes.h:744
llvm::ISD::SETTRUE
@ SETTRUE
Definition: ISDOpcodes.h:1421
llvm::ISD::STRICT_FSETCC
@ STRICT_FSETCC
STRICT_FSETCC/STRICT_FSETCCS - Constrained versions of SETCC, used for floating-point operands only.
Definition: ISDOpcodes.h:475
llvm::ISD::VECTOR_SHUFFLE
@ VECTOR_SHUFFLE
VECTOR_SHUFFLE(VEC1, VEC2) - Returns a vector, of the same type as VEC1/VEC2.
Definition: ISDOpcodes.h:586
llvm::ISD::SETLE
@ SETLE
Definition: ISDOpcodes.h:1428
llvm::ISD::INTRINSIC_VOID
@ INTRINSIC_VOID
OUTCHAIN = INTRINSIC_VOID(INCHAIN, INTRINSICID, arg1, arg2, ...) This node represents a target intrin...
Definition: ISDOpcodes.h:199
llvm::ISD::SETO
@ SETO
Definition: ISDOpcodes.h:1413
llvm::ISD::MemIndexedMode
MemIndexedMode
MemIndexedMode enum - This enum defines the load / store indexed addressing modes.
Definition: ISDOpcodes.h:1353
LLVM_DUMP_METHOD
#define LLVM_DUMP_METHOD
Mark debug helper function definitions like dump() that should not be stripped from debug builds.
Definition: Compiler.h:494
llvm::ISD::UMULO
@ UMULO
Definition: ISDOpcodes.h:332
llvm::ISD::STRICT_FSQRT
@ STRICT_FSQRT
Constrained versions of libm-equivalent floating point intrinsics.
Definition: ISDOpcodes.h:411
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:17
llvm::ISD::JumpTable
@ JumpTable
Definition: ISDOpcodes.h:81
M
We currently emits eax Perhaps this is what we really should generate is Is imull three or four cycles eax eax The current instruction priority is based on pattern complexity The former is more complex because it folds a load so the latter will not be emitted Perhaps we should use AddedComplexity to give LEA32r a higher priority We should always try to match LEA first since the LEA matching code does some estimate to determine whether the match is profitable if we care more about code then imull is better It s two bytes shorter than movl leal On a Pentium M
Definition: README.txt:252
llvm::SDNode::getValueType
EVT getValueType(unsigned ResNo) const
Return the type of a specified result.
Definition: SelectionDAGNodes.h:970
llvm::ISD::VECTOR_REVERSE
@ VECTOR_REVERSE
VECTOR_REVERSE(VECTOR) - Returns a vector, of the same type as VECTOR, whose elements are shuffled us...
Definition: ISDOpcodes.h:577
llvm::ISD::STRICT_FSIN
@ STRICT_FSIN
Definition: ISDOpcodes.h:414
llvm::ISD::OR
@ OR
Definition: ISDOpcodes.h:667
llvm::ISD::FLT_ROUNDS_
@ FLT_ROUNDS_
Returns current rounding mode: -1 Undefined 0 Round to 0 1 Round to nearest, ties to even 2 Round to ...
Definition: ISDOpcodes.h:863
llvm::ISD::SETGT
@ SETGT
Definition: ISDOpcodes.h:1425
llvm::ISD::BITCAST
@ BITCAST
BITCAST - This operator converts between integer, vector and FP values, as if the value was stored to...
Definition: ISDOpcodes.h:886
llvm::ISD::LIFETIME_END
@ LIFETIME_END
Definition: ISDOpcodes.h:1216
llvm::ISD::SETNE
@ SETNE
Definition: ISDOpcodes.h:1429
llvm::ISD::BR_JT
@ BR_JT
BR_JT - Jumptable branch.
Definition: ISDOpcodes.h:984
llvm::APFloatBase::IEEEsingle
static const fltSemantics & IEEEsingle() LLVM_READNONE
Definition: APFloat.cpp:170
DebugInfoMetadata.h
llvm::ISD::FMINNUM
@ FMINNUM
FMINNUM/FMAXNUM - Perform floating-point minimum or maximum on two values.
Definition: ISDOpcodes.h:936
llvm::ISD::AssertSext
@ AssertSext
AssertSext, AssertZext - These nodes record if a register contains a value that has already been zero...
Definition: ISDOpcodes.h:61
llvm::ISD::UDIVFIXSAT
@ UDIVFIXSAT
Definition: ISDOpcodes.h:387
llvm::ISD::STRICT_FMAXNUM
@ STRICT_FMAXNUM
Definition: ISDOpcodes.h:423
llvm::ISD::ATOMIC_LOAD_UMAX
@ ATOMIC_LOAD_UMAX
Definition: ISDOpcodes.h:1188
Printable.h
llvm::ISD::ConstantFP
@ ConstantFP
Definition: ISDOpcodes.h:77
llvm::ISD::CONCAT_VECTORS
@ CONCAT_VECTORS
CONCAT_VECTORS(VECTOR0, VECTOR1, ...) - Given a number of values of vector type with the same length ...
Definition: ISDOpcodes.h:542
llvm::ISD::LIFETIME_START
@ LIFETIME_START
This corresponds to the llvm.lifetime.
Definition: ISDOpcodes.h:1215
llvm::ISD::PRE_DEC
@ PRE_DEC
Definition: ISDOpcodes.h:1353
llvm::MachineMemOperand::print
void print(raw_ostream &OS, ModuleSlotTracker &MST, SmallVectorImpl< StringRef > &SSNs, const LLVMContext &Context, const MachineFrameInfo *MFI, const TargetInstrInfo *TII) const
Support for operator<<.
Definition: MachineOperand.cpp:1091
llvm::ISD::BSWAP
@ BSWAP
Byte Swap and Counting operators.
Definition: ISDOpcodes.h:700
llvm::ISD::UDIV
@ UDIV
Definition: ISDOpcodes.h:243
llvm::ISD::STRICT_UINT_TO_FP
@ STRICT_UINT_TO_FP
Definition: ISDOpcodes.h:449
llvm::ISD::UADDO
@ UADDO
Definition: ISDOpcodes.h:324
llvm::ISD::STRICT_FMINNUM
@ STRICT_FMINNUM
Definition: ISDOpcodes.h:424
llvm::ISD::DYNAMIC_STACKALLOC
@ DYNAMIC_STACKALLOC
DYNAMIC_STACKALLOC - Allocate some number of bytes on the stack aligned to a specified boundary.
Definition: ISDOpcodes.h:969
llvm::ISD::ATOMIC_LOAD_CLR
@ ATOMIC_LOAD_CLR
Definition: ISDOpcodes.h:1181
llvm::ISD::CTTZ_ZERO_UNDEF
@ CTTZ_ZERO_UNDEF
Bit counting operators with an undefined result for zero inputs.
Definition: ISDOpcodes.h:708
llvm::ISD::ADDC
@ ADDC
Carry-setting nodes for multiple precision addition and subtraction.
Definition: ISDOpcodes.h:269
llvm::ISD::INIT_TRAMPOLINE
@ INIT_TRAMPOLINE
INIT_TRAMPOLINE - This corresponds to the init_trampoline intrinsic.
Definition: ISDOpcodes.h:1117
llvm::ISD::MLOAD
@ MLOAD
Definition: ISDOpcodes.h:1198
llvm::ISD::FSHL
@ FSHL
Definition: ISDOpcodes.h:696
llvm::SmallVector
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
Definition: SmallVector.h:1185
llvm::ISD::FP_TO_UINT_SAT
@ FP_TO_UINT_SAT
Definition: ISDOpcodes.h:839
llvm::ISD::SETEQ
@ SETEQ
Definition: ISDOpcodes.h:1424
llvm::ISD::STACKRESTORE
@ STACKRESTORE
STACKRESTORE has two operands, an input chain and a pointer to restore to it returns an output chain.
Definition: ISDOpcodes.h:1050
llvm::ISD::CONDCODE
@ CONDCODE
Definition: ISDOpcodes.h:73
llvm::ISD::TargetIndex
@ TargetIndex
TargetIndex - Like a constant pool entry, but with completely target-dependent semantics.
Definition: ISDOpcodes.h:177
llvm::MachineSDNode
An SDNode that represents everything that will be needed to construct a MachineInstr.
Definition: SelectionDAGNodes.h:2867
ErrorHandling.h
llvm::ISD::SDIVFIX
@ SDIVFIX
RESULT = [US]DIVFIX(LHS, RHS, SCALE) - Perform fixed point division on 2 integers with the same width...
Definition: ISDOpcodes.h:380
llvm::ISD::MGATHER
@ MGATHER
Definition: ISDOpcodes.h:1210
llvm::ISD::STEP_VECTOR
@ STEP_VECTOR
STEP_VECTOR(IMM) - Returns a scalable vector whose lanes are comprised of a linear sequence of unsign...
Definition: ISDOpcodes.h:632
llvm::ISD::EH_LABEL
@ EH_LABEL
EH_LABEL - Represents a label in mid basic block used to track locations needed for debug and excepti...
Definition: ISDOpcodes.h:1026
llvm::ISD::FLOG2
@ FLOG2
Definition: ISDOpcodes.h:913
llvm::ISD::ANY_EXTEND
@ ANY_EXTEND
ANY_EXTEND - Used for integer types. The high bits are undefined.
Definition: ISDOpcodes.h:766
llvm::ISD::USUBSAT
@ USUBSAT
Definition: ISDOpcodes.h:350
llvm::SDNode
Represents one node in the SelectionDAG.
Definition: SelectionDAGNodes.h:454
MachineBasicBlock.h
llvm::ISD::FMA
@ FMA
FMA - Perform a * b + c with no intermediate rounding step.
Definition: ISDOpcodes.h:482
llvm::ISD::FP_TO_SINT
@ FP_TO_SINT
FP_TO_[US]INT - Convert a floating point value to a signed or unsigned integer.
Definition: ISDOpcodes.h:819
llvm::cl::Hidden
@ Hidden
Definition: CommandLine.h:139
APInt.h
llvm::ISD::STRICT_FMAXIMUM
@ STRICT_FMAXIMUM
Definition: ISDOpcodes.h:434
llvm::ISD::USHLSAT
@ USHLSAT
Definition: ISDOpcodes.h:360
llvm::ISD::SETULE
@ SETULE
Definition: ISDOpcodes.h:1419
llvm::ISD::PREALLOCATED_SETUP
@ PREALLOCATED_SETUP
Definition: ISDOpcodes.h:1084
llvm::ISD::SHL_PARTS
@ SHL_PARTS
SHL_PARTS/SRA_PARTS/SRL_PARTS - These operators are used for expanded integer shift operations.
Definition: ISDOpcodes.h:749
TargetInstrInfo.h
llvm::MachineMemOperand
A description of a memory reference used in the backend.
Definition: MachineMemOperand.h:126
llvm::ISD::SETCC
@ SETCC
SetCC operator - This evaluates to a true value iff the condition is true.
Definition: ISDOpcodes.h:736
llvm::ISD::STRICT_FPOW
@ STRICT_FPOW
Definition: ISDOpcodes.h:412
llvm::ISD::CALLSEQ_START
@ CALLSEQ_START
CALLSEQ_START/CALLSEQ_END - These operators mark the beginning and end of a call sequence,...
Definition: ISDOpcodes.h:1064
llvm::ISD::SPLAT_VECTOR_PARTS
@ SPLAT_VECTOR_PARTS
SPLAT_VECTOR_PARTS(SCALAR1, SCALAR2, ...) - Returns a vector with the scalar values joined together a...
Definition: ISDOpcodes.h:622
llvm::ISD::VECREDUCE_FMAX
@ VECREDUCE_FMAX
FMIN/FMAX nodes can have flags, for NaN/NoNaN variants.
Definition: ISDOpcodes.h:1266
llvm::ISD::FMAXNUM_IEEE
@ FMAXNUM_IEEE
Definition: ISDOpcodes.h:944
llvm::ISD::MERGE_VALUES
@ MERGE_VALUES
MERGE_VALUES - This node takes multiple discrete operands and returns them all as its individual resu...
Definition: ISDOpcodes.h:236
llvm::ModuleSlotTracker::incorporateFunction
void incorporateFunction(const Function &F)
Incorporate the given function.
Definition: AsmWriter.cpp:854
llvm::ISD::SIGN_EXTEND_VECTOR_INREG
@ SIGN_EXTEND_VECTOR_INREG
SIGN_EXTEND_VECTOR_INREG(Vector) - This operator represents an in-register sign-extension of the low ...
Definition: ISDOpcodes.h:803
llvm::ISD::VAEND
@ VAEND
VAEND, VASTART - VAEND and VASTART have three operands: an input chain, pointer, and a SRCVALUE.
Definition: ISDOpcodes.h:1079
llvm::ISD::VECREDUCE_SEQ_FADD
@ VECREDUCE_SEQ_FADD
Generic reduction nodes.
Definition: ISDOpcodes.h:1250
SDNodeDbgValue.h
llvm::ISD::SETOEQ
@ SETOEQ
Definition: ISDOpcodes.h:1407
SelectionDAG.h
llvm::ISD::FREEZE
@ FREEZE
Definition: ISDOpcodes.h:216
llvm::ModuleSlotTracker
Manage lifetime of a slot tracker for printing IR.
Definition: ModuleSlotTracker.h:44
llvm::ISD::GC_TRANSITION_END
@ GC_TRANSITION_END
Definition: ISDOpcodes.h:1225
llvm::ISD::STRICT_FLOG
@ STRICT_FLOG
Definition: ISDOpcodes.h:418
llvm::ISD::CALLSEQ_END
@ CALLSEQ_END
Definition: ISDOpcodes.h:1065
llvm::ISD::STRICT_FP_TO_UINT
@ STRICT_FP_TO_UINT
Definition: ISDOpcodes.h:442
llvm::ISD::SETUEQ
@ SETUEQ
Definition: ISDOpcodes.h:1415
llvm::ISD::SMAX
@ SMAX
Definition: ISDOpcodes.h:661
llvm::ISD::ATOMIC_LOAD_OR
@ ATOMIC_LOAD_OR
Definition: ISDOpcodes.h:1182
llvm::ISD::FABS
@ FABS
Definition: ISDOpcodes.h:905
llvm::ISD::ADDCARRY
@ ADDCARRY
Carry-using nodes for multiple precision addition and subtraction.
Definition: ISDOpcodes.h:303
llvm::ISD::BRCOND
@ BRCOND
BRCOND - Conditional branch.
Definition: ISDOpcodes.h:994
llvm::ISD::EH_SJLJ_SETJMP
@ EH_SJLJ_SETJMP
RESULT, OUTCHAIN = EH_SJLJ_SETJMP(INCHAIN, buffer) This corresponds to the eh.sjlj....
Definition: ISDOpcodes.h:141
llvm::ShuffleVectorSDNode
This SDNode is used to implement the code generator support for the llvm IR shufflevector instruction...
Definition: SelectionDAGNodes.h:1506
llvm::ISD::INLINEASM
@ INLINEASM
INLINEASM - Represents an inline asm block.
Definition: ISDOpcodes.h:1018
llvm::ISD::PSEUDO_PROBE
@ PSEUDO_PROBE
Pseudo probe for AutoFDO, as a place holder in a basic block to improve the sample counts quality.
Definition: ISDOpcodes.h:1235
llvm::TargetIntrinsicInfo
TargetIntrinsicInfo - Interface to description of machine instruction set.
Definition: TargetIntrinsicInfo.h:29
llvm::ISD::STRICT_FLOG2
@ STRICT_FLOG2
Definition: ISDOpcodes.h:420
llvm::ISD::STRICT_FROUND
@ STRICT_FROUND
Definition: ISDOpcodes.h:427
MachineValueType.h
llvm::ISD::BRIND
@ BRIND
BRIND - Indirect branch.
Definition: ISDOpcodes.h:980
llvm::ISD::ROTL
@ ROTL
Definition: ISDOpcodes.h:694
llvm::ISD::AVGFLOORU
@ AVGFLOORU
Definition: ISDOpcodes.h:644
llvm::dbgs
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition: Debug.cpp:163
llvm::ISD::EH_SJLJ_LONGJMP
@ EH_SJLJ_LONGJMP
OUTCHAIN = EH_SJLJ_LONGJMP(INCHAIN, buffer) This corresponds to the eh.sjlj.longjmp intrinsic.
Definition: ISDOpcodes.h:147
llvm::ISD::VECREDUCE_UMAX
@ VECREDUCE_UMAX
Definition: ISDOpcodes.h:1278
llvm::ISD::GC_TRANSITION_START
@ GC_TRANSITION_START
GC_TRANSITION_START/GC_TRANSITION_END - These operators mark the beginning and end of GC transition s...
Definition: ISDOpcodes.h:1224
llvm::ISD::FFLOOR
@ FFLOOR
Definition: ISDOpcodes.h:923
CommandLine.h
llvm::ISD::STRICT_FDIV
@ STRICT_FDIV
Definition: ISDOpcodes.h:403
llvm::ISD::BR_CC
@ BR_CC
BR_CC - Conditional branch.
Definition: ISDOpcodes.h:1001
TargetLowering.h
llvm::ISD::FSHR
@ FSHR
Definition: ISDOpcodes.h:697
llvm::SDNode::getOpcode
unsigned getOpcode() const
Return the SelectionDAG opcode value for this node.
Definition: SelectionDAGNodes.h:632
llvm::ISD::EH_SJLJ_SETUP_DISPATCH
@ EH_SJLJ_SETUP_DISPATCH
OUTCHAIN = EH_SJLJ_SETUP_DISPATCH(INCHAIN) The target initializes the dispatch table here.
Definition: ISDOpcodes.h:151
llvm::ISD::STRICT_FP_TO_SINT
@ STRICT_FP_TO_SINT
STRICT_FP_TO_[US]INT - Convert a floating point value to a signed or unsigned integer.
Definition: ISDOpcodes.h:441
llvm::ISD::GlobalAddress
@ GlobalAddress
Definition: ISDOpcodes.h:78
llvm::ISD::SELECT_CC
@ SELECT_CC
Select with condition operator - This selects between a true value and a false value (ops #2 and #3) ...
Definition: ISDOpcodes.h:728
llvm::TargetInstrInfo
TargetInstrInfo - Interface to description of machine instruction set.
Definition: TargetInstrInfo.h:97
hasNoUnsignedWrap
static bool hasNoUnsignedWrap(BinaryOperator &I)
Definition: InstructionCombining.cpp:298
TargetMachine.h
llvm::ISD::CTLZ
@ CTLZ
Definition: ISDOpcodes.h:702
llvm::SelectionDAG
This is used to represent a portion of an LLVM function in a low-level Data Dependence DAG representa...
Definition: SelectionDAG.h:220
SelectionDAGNodes.h
llvm::ISD::SELECT
@ SELECT
Select(COND, TRUEVAL, FALSEVAL).
Definition: ISDOpcodes.h:713
llvm::ISD::SMULFIXSAT
@ SMULFIXSAT
Same as the corresponding unsaturated fixed point instructions, but the result is clamped between the...
Definition: ISDOpcodes.h:373
Constants.h
llvm::ISD::STRICT_FRINT
@ STRICT_FRINT
Definition: ISDOpcodes.h:421
llvm::ISD::Constant
@ Constant
Definition: ISDOpcodes.h:76
llvm::ISD::ZERO_EXTEND
@ ZERO_EXTEND
ZERO_EXTEND - Used for integer types, zeroing the new bits.
Definition: ISDOpcodes.h:763
llvm::ISD::ABS
@ ABS
ABS - Determine the unsigned absolute value of a signed integer value of the same bitwidth.
Definition: ISDOpcodes.h:674
llvm::ISD::SETGE
@ SETGE
Definition: ISDOpcodes.h:1426
llvm::ISD::SMULFIX
@ SMULFIX
RESULT = [US]MULFIX(LHS, RHS, SCALE) - Perform fixed point multiplication on 2 integers with the same...
Definition: ISDOpcodes.h:367
llvm::ISD::CATCHRET
@ CATCHRET
CATCHRET - Represents a return from a catch block funclet.
Definition: ISDOpcodes.h:1037
llvm::ISD::SIGN_EXTEND_INREG
@ SIGN_EXTEND_INREG
SIGN_EXTEND_INREG - This operator atomically performs a SHL/SRA pair to sign extend a small value in ...
Definition: ISDOpcodes.h:781
llvm::ISD::CopyToReg
@ CopyToReg
CopyToReg - This node has three operands: a chain, a register number to set to this value,...
Definition: ISDOpcodes.h:203
llvm::ISD::STRICT_FNEARBYINT
@ STRICT_FNEARBYINT
Definition: ISDOpcodes.h:422
llvm::ISD::ANY_EXTEND_VECTOR_INREG
@ ANY_EXTEND_VECTOR_INREG
ANY_EXTEND_VECTOR_INREG(Vector) - This operator represents an in-register any-extension of the low la...
Definition: ISDOpcodes.h:792
Intrinsics.h
llvm::TargetLowering
This class defines information used to lower LLVM code to legal SelectionDAG operators that the targe...
Definition: TargetLowering.h:3362
llvm::ISD::STRICT_FP16_TO_FP
@ STRICT_FP16_TO_FP
Definition: ISDOpcodes.h:898
llvm::ISD::FROUND
@ FROUND
Definition: ISDOpcodes.h:921
llvm::ISD::TRUNCATE
@ TRUNCATE
TRUNCATE - Completely drop the high bits.
Definition: ISDOpcodes.h:769
llvm::ISD::SRA
@ SRA
Definition: ISDOpcodes.h:692
llvm::ISD::STRICT_FLOG10
@ STRICT_FLOG10
Definition: ISDOpcodes.h:419
llvm::ISD::LLROUND
@ LLROUND
Definition: ISDOpcodes.h:925
llvm::ISD::FMINNUM_IEEE
@ FMINNUM_IEEE
FMINNUM_IEEE/FMAXNUM_IEEE - Perform floating-point minimum or maximum on two values,...
Definition: ISDOpcodes.h:943
llvm::ISD::GLOBAL_OFFSET_TABLE
@ GLOBAL_OFFSET_TABLE
The address of the GOT.
Definition: ISDOpcodes.h:87
llvm::ISD::UDIVREM
@ UDIVREM
Definition: ISDOpcodes.h:256
TII
const HexagonInstrInfo * TII
Definition: HexagonCopyToCombine.cpp:127
llvm::ISD::DELETED_NODE
@ DELETED_NODE
DELETED_NODE - This is an illegal value that is used to catch errors.
Definition: ISDOpcodes.h:44
llvm::ISD::ADDRSPACECAST
@ ADDRSPACECAST
ADDRSPACECAST - This operator converts between pointers of different address spaces.
Definition: ISDOpcodes.h:890
llvm::ISD::ATOMIC_LOAD_AND
@ ATOMIC_LOAD_AND
Definition: ISDOpcodes.h:1180
llvm::ISD::MDNODE_SDNODE
@ MDNODE_SDNODE
MDNODE_SDNODE - This is a node that holdes an MDNode*, which is used to reference metadata in the IR.
Definition: ISDOpcodes.h:1095
llvm::ISD::ATOMIC_LOAD_UMIN
@ ATOMIC_LOAD_UMIN
Definition: ISDOpcodes.h:1187
llvm::ISD::SINT_TO_FP
@ SINT_TO_FP
[SU]INT_TO_FP - These operators convert integers (whose interpreted sign depends on the first letter)...
Definition: ISDOpcodes.h:773
llvm::raw_ostream
This class implements an extremely fast bulk output stream that can only output to a stream.
Definition: raw_ostream.h:54
APFloat.h
llvm::ISD::FNEARBYINT
@ FNEARBYINT
Definition: ISDOpcodes.h:920
llvm::ISD::FP16_TO_FP
@ FP16_TO_FP
FP16_TO_FP, FP_TO_FP16 - These operators are used to perform promotions and truncation for half-preci...
Definition: ISDOpcodes.h:896
llvm::ISD::FRINT
@ FRINT
Definition: ISDOpcodes.h:919
llvm::ISD::ATOMIC_STORE
@ ATOMIC_STORE
OUTCHAIN = ATOMIC_STORE(INCHAIN, ptr, val) This corresponds to "store atomic" instruction.
Definition: ISDOpcodes.h:1156
llvm::ISD::AssertAlign
@ AssertAlign
AssertAlign - These nodes record if a register contains a value that has a known alignment and the tr...
Definition: ISDOpcodes.h:68
DebugLoc.h
SmallPtrSet.h
llvm::ISD::AND
@ AND
Bitwise operators - logical and, logical or, logical xor.
Definition: ISDOpcodes.h:666
llvm::ISD::SMULO
@ SMULO
Same for multiplication.
Definition: ISDOpcodes.h:331
llvm::ISD::SETOLT
@ SETOLT
Definition: ISDOpcodes.h:1410
llvm::ISD::ABDS
@ ABDS
Definition: ISDOpcodes.h:655
llvm::ISD::TargetGlobalAddress
@ TargetGlobalAddress
TargetGlobalAddress - Like GlobalAddress, but the DAG does no folding or anything else with this node...
Definition: ISDOpcodes.h:164
llvm::ISD::SPLAT_VECTOR
@ SPLAT_VECTOR
SPLAT_VECTOR(VAL) - Returns a vector with the scalar value VAL duplicated in all lanes.
Definition: ISDOpcodes.h:613
llvm::ISD::EntryToken
@ EntryToken
EntryToken - This is the marker used to indicate the start of a region.
Definition: ISDOpcodes.h:47
llvm::ISD::FSINCOS
@ FSINCOS
FSINCOS - Compute both fsin and fcos as a single operation.
Definition: ISDOpcodes.h:953
llvm::StringRef::str
LLVM_NODISCARD std::string str() const
str - Get the contents as an std::string.
Definition: StringRef.h:245
llvm::ISD::CopyFromReg
@ CopyFromReg
CopyFromReg - This node indicates that the input value is a virtual or physical register that is defi...
Definition: ISDOpcodes.h:208
llvm::ISD::USUBO
@ USUBO
Definition: ISDOpcodes.h:328
llvm::ISD::FCBRT
@ FCBRT
Definition: ISDOpcodes.h:907
llvm::ISD::SETOLE
@ SETOLE
Definition: ISDOpcodes.h:1411
llvm::ISD::SETUGT
@ SETUGT
Definition: ISDOpcodes.h:1416
llvm::ISD::VALUETYPE
@ VALUETYPE
Definition: ISDOpcodes.h:72
llvm::ISD::VECREDUCE_FMUL
@ VECREDUCE_FMUL
Definition: ISDOpcodes.h:1264
llvm::ISD::ATOMIC_LOAD_FADD
@ ATOMIC_LOAD_FADD
Definition: ISDOpcodes.h:1189
llvm::ISD::POST_INC
@ POST_INC
Definition: ISDOpcodes.h:1353
llvm::ISD::TargetConstantFP
@ TargetConstantFP
Definition: ISDOpcodes.h:159
llvm::ISD::FPOW
@ FPOW
Definition: ISDOpcodes.h:911
llvm::ISD::FADD
@ FADD
Simple binary floating point operators.
Definition: ISDOpcodes.h:390
llvm::ISD::BlockAddress
@ BlockAddress
Definition: ISDOpcodes.h:84
llvm::ISD::AVGCEILU
@ AVGCEILU
Definition: ISDOpcodes.h:649
llvm::ISD::SETUNE
@ SETUNE
Definition: ISDOpcodes.h:1420
G
const DataFlowGraph & G
Definition: RDFGraph.cpp:200
llvm::ISD::STRICT_FSETCCS
@ STRICT_FSETCCS
Definition: ISDOpcodes.h:476
llvm::ISD::STRICT_FMINIMUM
@ STRICT_FMINIMUM
Definition: ISDOpcodes.h:435
llvm::ISD::SMIN
@ SMIN
[US]{MIN/MAX} - Binary minimum or maximum of signed or unsigned integers.
Definition: ISDOpcodes.h:660
llvm::ISD::WRITE_REGISTER
@ WRITE_REGISTER
Definition: ISDOpcodes.h:119
llvm::ISD::FMINIMUM
@ FMINIMUM
FMINIMUM/FMAXIMUM - NaN-propagating minimum/maximum that also treat -0.0 as less than 0....
Definition: ISDOpcodes.h:949
BasicBlock.h
llvm::cl::opt< bool >
llvm::ISD::AVGCEILS
@ AVGCEILS
AVGCEILS/AVGCEILU - Rounding averaging add - Add two integers using an integer of type i[N+2],...
Definition: ISDOpcodes.h:648
llvm::ISD::Register
@ Register
Definition: ISDOpcodes.h:74
llvm::ISD::GET_DYNAMIC_AREA_OFFSET
@ GET_DYNAMIC_AREA_OFFSET
GET_DYNAMIC_AREA_OFFSET - get offset from native SP to the address of the most recent dynamic alloca.
Definition: ISDOpcodes.h:1231
llvm::ISD::SADDO
@ SADDO
RESULT, BOOL = [SU]ADDO(LHS, RHS) - Overflow-aware nodes for addition.
Definition: ISDOpcodes.h:323
llvm::ISD::FLOG10
@ FLOG10
Definition: ISDOpcodes.h:914
llvm::ISD::VECREDUCE_FMIN
@ VECREDUCE_FMIN
Definition: ISDOpcodes.h:1267
llvm::ISD::FMAD
@ FMAD
FMAD - Perform a * b + c, while getting the same result as the separately rounded operations.
Definition: ISDOpcodes.h:486
llvm::ISD::LOCAL_RECOVER
@ LOCAL_RECOVER
LOCAL_RECOVER - Represents the llvm.localrecover intrinsic.
Definition: ISDOpcodes.h:114
llvm::ISD::ATOMIC_FENCE
@ ATOMIC_FENCE
OUTCHAIN = ATOMIC_FENCE(INCHAIN, ordering, scope) This corresponds to the fence instruction.
Definition: ISDOpcodes.h:1148
llvm::ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS
@ ATOMIC_CMP_SWAP_WITH_SUCCESS
Val, Success, OUTCHAIN = ATOMIC_CMP_SWAP_WITH_SUCCESS(INCHAIN, ptr, cmp, swap) N.b.
Definition: ISDOpcodes.h:1169
llvm::ISD::ATOMIC_LOAD_MIN
@ ATOMIC_LOAD_MIN
Definition: ISDOpcodes.h:1185
llvm::ISD::FP_TO_UINT
@ FP_TO_UINT
Definition: ISDOpcodes.h:820
llvm::ConstantFPSDNode
Definition: SelectionDAGNodes.h:1613
llvm::GlobalValue::getParent
Module * getParent()
Get the module that this global value is contained inside of...
Definition: GlobalValue.h:577
llvm::ISD::VECREDUCE_ADD
@ VECREDUCE_ADD
Integer reductions may have a result type larger than the vector element type.
Definition: ISDOpcodes.h:1271
llvm::ISD::LOAD
@ LOAD
LOAD and STORE have token chains as their first operand, then the same operands as an LLVM load/store...
Definition: ISDOpcodes.h:959
llvm::ISD::VECREDUCE_SMAX
@ VECREDUCE_SMAX
Definition: ISDOpcodes.h:1276
llvm::ISD::AssertZext
@ AssertZext
Definition: ISDOpcodes.h:62
llvm::SDNode::print_details
void print_details(raw_ostream &OS, const SelectionDAG *G) const
Definition: SelectionDAGDumper.cpp:561
llvm::ISD::SRCVALUE
@ SRCVALUE
SRCVALUE - This is a node type that holds a Value* that is used to make reference to a value in the L...
Definition: ISDOpcodes.h:1091
llvm::ISD::STRICT_LRINT
@ STRICT_LRINT
Definition: ISDOpcodes.h:432
llvm::ISD::TRAP
@ TRAP
TRAP - Trapping instruction.
Definition: ISDOpcodes.h:1126
llvm::LLVMContext
This is an important class for using LLVM in a threaded context.
Definition: LLVMContext.h:68
llvm::numbers::e
constexpr double e
Definition: MathExtras.h:57
llvm::ISD::SPONENTRY
@ SPONENTRY
SPONENTRY - Represents the llvm.sponentry intrinsic.
Definition: ISDOpcodes.h:106
llvm::ISD::SSUBO_CARRY
@ SSUBO_CARRY
Definition: ISDOpcodes.h:314
llvm::nodes
iterator_range< typename GraphTraits< GraphType >::nodes_iterator > nodes(const GraphType &G)
Definition: GraphTraits.h:110
llvm::ISD::EXTRACT_VECTOR_ELT
@ EXTRACT_VECTOR_ELT
EXTRACT_VECTOR_ELT(VECTOR, IDX) - Returns a single element from VECTOR identified by the (potentially...
Definition: ISDOpcodes.h:534
llvm::ISD::VECREDUCE_FADD
@ VECREDUCE_FADD
These reductions have relaxed evaluation order semantics, and have a single vector operand.
Definition: ISDOpcodes.h:1263
llvm::ISD::CLEANUPRET
@ CLEANUPRET
CLEANUPRET - Represents a return from a cleanup block funclet.
Definition: ISDOpcodes.h:1041
llvm::ISD::CTLZ_ZERO_UNDEF
@ CTLZ_ZERO_UNDEF
Definition: ISDOpcodes.h:709
llvm::ISD::ATOMIC_LOAD_NAND
@ ATOMIC_LOAD_NAND
Definition: ISDOpcodes.h:1184
llvm::SDNode::getOperand
const SDValue & getOperand(unsigned Num) const
Definition: SelectionDAGNodes.h:908
PrintNodeId
static Printable PrintNodeId(const SDNode &Node)
Definition: SelectionDAGDumper.cpp:506
llvm::ISD::VECREDUCE_SEQ_FMUL
@ VECREDUCE_SEQ_FMUL
Definition: ISDOpcodes.h:1251
llvm::ISD::LRINT
@ LRINT
Definition: ISDOpcodes.h:926
StringExtras.h
llvm::ISD::FP_TO_FP16
@ FP_TO_FP16
Definition: ISDOpcodes.h:897
llvm::ISD::ATOMIC_CMP_SWAP
@ ATOMIC_CMP_SWAP
Val, OUTCHAIN = ATOMIC_CMP_SWAP(INCHAIN, ptr, cmp, swap) For double-word atomic operations: ValLo,...
Definition: ISDOpcodes.h:1163
llvm::ISD::UADDSAT
@ UADDSAT
Definition: ISDOpcodes.h:341
llvm::ISD::ATOMIC_LOAD_ADD
@ ATOMIC_LOAD_ADD
Definition: ISDOpcodes.h:1178
MachineConstantPool.h
llvm::ISD::SSUBSAT
@ SSUBSAT
RESULT = [US]SUBSAT(LHS, RHS) - Perform saturation subtraction on 2 integers with the same bit width ...
Definition: ISDOpcodes.h:349
llvm::ISD::FCOPYSIGN
@ FCOPYSIGN
FCOPYSIGN(X, Y) - Return the value of X with the sign of Y.
Definition: ISDOpcodes.h:492
llvm::SDNode::dump
void dump() const
Dump this node, for debugging.
Definition: SelectionDAGDumper.cpp:543
llvm::MachineSDNode::mmo_iterator
ArrayRef< MachineMemOperand * >::const_iterator mmo_iterator
Definition: SelectionDAGNodes.h:2897
printMemOperand
static void printMemOperand(raw_ostream &OS, const MachineMemOperand &MMO, const MachineFunction *MF, const Module *M, const MachineFrameInfo *MFI, const TargetInstrInfo *TII, LLVMContext &Ctx)
Definition: SelectionDAGDumper.cpp:517
llvm::ISD::MSTORE
@ MSTORE
Definition: ISDOpcodes.h:1199
llvm::ISD::STRICT_LROUND
@ STRICT_LROUND
Definition: ISDOpcodes.h:430
llvm::ISD::SETOGT
@ SETOGT
Definition: ISDOpcodes.h:1408
llvm::ISD::ADJUST_TRAMPOLINE
@ ADJUST_TRAMPOLINE
ADJUST_TRAMPOLINE - This corresponds to the adjust_trampoline intrinsic.
Definition: ISDOpcodes.h:1123
llvm::ISD::MULHS
@ MULHS
Definition: ISDOpcodes.h:638
llvm::MVT::Other
@ Other
Definition: MachineValueType.h:42
llvm::MachineFunction::getFrameInfo
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
Definition: MachineFunction.h:656
llvm::ISD::SETULT
@ SETULT
Definition: ISDOpcodes.h:1418
llvm::ISD::DEBUGTRAP
@ DEBUGTRAP
DEBUGTRAP - Trap intended to get the attention of a debugger.
Definition: ISDOpcodes.h:1129
llvm::SDNode::print
void print(raw_ostream &OS, const SelectionDAG *G=nullptr) const
Definition: SelectionDAGDumper.cpp:1054
llvm::ISD::EH_DWARF_CFA
@ EH_DWARF_CFA
EH_DWARF_CFA - This node represents the pointer to the DWARF Canonical Frame Address (CFA),...
Definition: ISDOpcodes.h:129
llvm::ISD::BasicBlock
@ BasicBlock
Various leaf nodes.
Definition: ISDOpcodes.h:71
llvm::ISD::SDIVFIXSAT
@ SDIVFIXSAT
Same as the corresponding unsaturated fixed point instructions, but the result is clamped between the...
Definition: ISDOpcodes.h:386
llvm::ISD::VECREDUCE_AND
@ VECREDUCE_AND
Definition: ISDOpcodes.h:1273
llvm::ISD::TargetGlobalTLSAddress
@ TargetGlobalTLSAddress
Definition: ISDOpcodes.h:165
llvm::ISD::RETURNADDR
@ RETURNADDR
Definition: ISDOpcodes.h:95
llvm::ISD::SUBCARRY
@ SUBCARRY
Definition: ISDOpcodes.h:304
llvm::Module
A Module instance is used to store all the information related to an LLVM module.
Definition: Module.h:65
llvm::TargetLowering::getTargetNodeName
virtual const char * getTargetNodeName(unsigned Opcode) const
This method returns the name of a target specific DAG node.
Definition: TargetLowering.cpp:41
llvm::ISD::POST_DEC
@ POST_DEC
Definition: ISDOpcodes.h:1353
llvm::ISD::STRICT_LLRINT
@ STRICT_LLRINT
Definition: ISDOpcodes.h:433
llvm::ISD::SRA_PARTS
@ SRA_PARTS
Definition: ISDOpcodes.h:750
llvm::ISD::VASTART
@ VASTART
Definition: ISDOpcodes.h:1080
llvm::SDNode::isMachineOpcode
bool isMachineOpcode() const
Test if this node has a post-isel opcode, directly corresponding to a MachineInstr opcode.
Definition: SelectionDAGNodes.h:687
llvm::ISD::TargetBlockAddress
@ TargetBlockAddress
Definition: ISDOpcodes.h:170
llvm::MachineFunction
Definition: MachineFunction.h:241
llvm::ISD::ANNOTATION_LABEL
@ ANNOTATION_LABEL
ANNOTATION_LABEL - Represents a mid basic block label used by annotations.
Definition: ISDOpcodes.h:1032
llvm::ISD::VSCALE
@ VSCALE
VSCALE(IMM) - Returns the runtime scaling factor used to calculate the number of elements within a sc...
Definition: ISDOpcodes.h:1240
llvm::ISD::STRICT_FROUNDEVEN
@ STRICT_FROUNDEVEN
Definition: ISDOpcodes.h:428
llvm::ISD::HANDLENODE
@ HANDLENODE
HANDLENODE node - Used as a handle for various purposes.
Definition: ISDOpcodes.h:1109
llvm::ISD::STRICT_FEXP
@ STRICT_FEXP
Definition: ISDOpcodes.h:416
llvm::ISD::ConstantPool
@ ConstantPool
Definition: ISDOpcodes.h:82
llvm::ISD::FMAXIMUM
@ FMAXIMUM
Definition: ISDOpcodes.h:950
llvm::ISD::GlobalTLSAddress
@ GlobalTLSAddress
Definition: ISDOpcodes.h:79
llvm::ISD::UBSANTRAP
@ UBSANTRAP
UBSANTRAP - Trap with an immediate describing the kind of sanitizer failure.
Definition: ISDOpcodes.h:1133
llvm::ISD::TargetConstantPool
@ TargetConstantPool
Definition: ISDOpcodes.h:168
llvm::SDNode::print_types
void print_types(raw_ostream &OS, const SelectionDAG *G) const
Definition: SelectionDAGDumper.cpp:551
llvm::ISD::STRICT_FCOS
@ STRICT_FCOS
Definition: ISDOpcodes.h:415
llvm::ISD::UMAX
@ UMAX
Definition: ISDOpcodes.h:663
llvm::ISD::PRE_INC
@ PRE_INC
Definition: ISDOpcodes.h:1353
llvm::ISD::SETTRUE2
@ SETTRUE2
Definition: ISDOpcodes.h:1430
llvm::ISD::STRICT_FTRUNC
@ STRICT_FTRUNC
Definition: ISDOpcodes.h:429
llvm::APFloatBase::IEEEdouble
static const fltSemantics & IEEEdouble() LLVM_READNONE
Definition: APFloat.cpp:173
llvm::ISD::ABDU
@ ABDU
Definition: ISDOpcodes.h:656
llvm::ISD::STRICT_SINT_TO_FP
@ STRICT_SINT_TO_FP
STRICT_[US]INT_TO_FP - Convert a signed or unsigned integer to a floating point value.
Definition: ISDOpcodes.h:448
llvm_unreachable
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
Definition: ErrorHandling.h:143
llvm::ISD::SREM
@ SREM
Definition: ISDOpcodes.h:244
llvm::ISD::LLRINT
@ LLRINT
Definition: ISDOpcodes.h:927
llvm::ISD::UMUL_LOHI
@ UMUL_LOHI
Definition: ISDOpcodes.h:251
llvm::ISD::ATOMIC_LOAD_SUB
@ ATOMIC_LOAD_SUB
Definition: ISDOpcodes.h:1179
llvm::ISD::STRICT_FSUB
@ STRICT_FSUB
Definition: ISDOpcodes.h:401
Compiler.h
TargetSubtargetInfo.h
llvm::SDNode::getIndexedModeName
static const char * getIndexedModeName(ISD::MemIndexedMode AM)
Definition: SelectionDAGDumper.cpp:496
llvm::ISD::FEXP
@ FEXP
Definition: ISDOpcodes.h:915
llvm::ISD::UNDEF
@ UNDEF
UNDEF - An undefined node.
Definition: ISDOpcodes.h:211
llvm::ISD::SMUL_LOHI
@ SMUL_LOHI
SMUL_LOHI/UMUL_LOHI - Multiply two integers of type iN, producing a signed/unsigned value of type i[2...
Definition: ISDOpcodes.h:250
llvm::ISD::BUILTIN_OP_END
@ BUILTIN_OP_END
BUILTIN_OP_END - This must be the last enum value in this list.
Definition: ISDOpcodes.h:1287
llvm::ISD::UMULFIX
@ UMULFIX
Definition: ISDOpcodes.h:368
llvm::ISD::SETFALSE
@ SETFALSE
Definition: ISDOpcodes.h:1406
llvm::ISD::FEXP2
@ FEXP2
Definition: ISDOpcodes.h:916
llvm::ISD::STRICT_FP_EXTEND
@ STRICT_FP_EXTEND
X = STRICT_FP_EXTEND(Y) - Extend a smaller FP type into a larger FP type.
Definition: ISDOpcodes.h:469
llvm::ISD::VECREDUCE_XOR
@ VECREDUCE_XOR
Definition: ISDOpcodes.h:1275
llvm::ISD::FMUL
@ FMUL
Definition: ISDOpcodes.h:392
llvm::ISD::ATOMIC_SWAP
@ ATOMIC_SWAP
Val, OUTCHAIN = ATOMIC_SWAP(INCHAIN, ptr, amt) Val, OUTCHAIN = ATOMIC_LOAD_[OpName](INCHAIN,...
Definition: ISDOpcodes.h:1177
llvm::ISD::VECTOR_SPLICE
@ VECTOR_SPLICE
VECTOR_SPLICE(VEC1, VEC2, IMM) - Returns a subvector of the same type as VEC1/VEC2 from CONCAT_VECTOR...
Definition: ISDOpcodes.h:598
llvm::ISD::CARRY_FALSE
@ CARRY_FALSE
CARRY_FALSE - This node is used when folding other nodes, like ADDC/SUBC, which indicate the carry re...
Definition: ISDOpcodes.h:260
llvm::ISD::SSHLSAT
@ SSHLSAT
RESULT = [US]SHLSAT(LHS, RHS) - Perform saturation left shift.
Definition: ISDOpcodes.h:359
llvm::ISD::PCMARKER
@ PCMARKER
PCMARKER - This corresponds to the pcmarker intrinsic.
Definition: ISDOpcodes.h:1098
llvm::ISD::INTRINSIC_WO_CHAIN
@ INTRINSIC_WO_CHAIN
RESULT = INTRINSIC_WO_CHAIN(INTRINSICID, arg1, arg2, ...) This node represents a target intrinsic fun...
Definition: ISDOpcodes.h:184
llvm::ISD::XOR
@ XOR
Definition: ISDOpcodes.h:668
llvm::SDNode::getOperationName
std::string getOperationName(const SelectionDAG *G=nullptr) const
Return the opcode of this operation for printing.
Definition: SelectionDAGDumper.cpp:58
llvm::ISD::FRAMEADDR
@ FRAMEADDR
FRAMEADDR, RETURNADDR - These nodes represent llvm.frameaddress and llvm.returnaddress on the DAG.
Definition: ISDOpcodes.h:94
llvm::ISD::FrameIndex
@ FrameIndex
Definition: ISDOpcodes.h:80
llvm::ISD::FSQRT
@ FSQRT
Definition: ISDOpcodes.h:906
llvm::EVT::getEVTString
std::string getEVTString() const
This function returns value type as a string, e.g. "i32".
Definition: ValueTypes.cpp:152
llvm::ISD::INSERT_SUBVECTOR
@ INSERT_SUBVECTOR
INSERT_SUBVECTOR(VECTOR1, VECTOR2, IDX) - Returns a vector with VECTOR2 inserted into VECTOR1.
Definition: ISDOpcodes.h:558
llvm::ISD::READ_REGISTER
@ READ_REGISTER
READ_REGISTER, WRITE_REGISTER - This node represents llvm.register on the DAG, which implements the n...
Definition: ISDOpcodes.h:118
llvm::ISD::SETLT
@ SETLT
Definition: ISDOpcodes.h:1427
llvm::ISD::STRICT_FMUL
@ STRICT_FMUL
Definition: ISDOpcodes.h:402
llvm::ISD::STRICT_FMA
@ STRICT_FMA
Definition: ISDOpcodes.h:405
llvm::ISD::FMAXNUM
@ FMAXNUM
Definition: ISDOpcodes.h:937
llvm::GraphProgram::Name
Name
Definition: GraphWriter.h:50
llvm::GlobalAddressSDNode
Definition: SelectionDAGNodes.h:1734
llvm::MachineFunction::getFunction
Function & getFunction()
Return the LLVM function that this machine code represents.
Definition: MachineFunction.h:606
llvm::ISD::EXTRACT_SUBVECTOR
@ EXTRACT_SUBVECTOR
EXTRACT_SUBVECTOR(VECTOR, IDX) - Returns a subvector from VECTOR.
Definition: ISDOpcodes.h:572
llvm::ISD::FP_TO_SINT_SAT
@ FP_TO_SINT_SAT
FP_TO_[US]INT_SAT - Convert floating point value in operand 0 to a signed or unsigned scalar integer ...
Definition: ISDOpcodes.h:838
llvm::ISD::SADDO_CARRY
@ SADDO_CARRY
Carry-using overflow-aware nodes for multiple precision addition and subtraction.
Definition: ISDOpcodes.h:313
get
Should compile to something r4 addze r3 instead we get
Definition: README.txt:24
llvm::ISD::VECREDUCE_MUL
@ VECREDUCE_MUL
Definition: ISDOpcodes.h:1272
llvm::ISD::UMULFIXSAT
@ UMULFIXSAT
Definition: ISDOpcodes.h:374
llvm::ISD::STRICT_FP_TO_FP16
@ STRICT_FP_TO_FP16
Definition: ISDOpcodes.h:899
llvm::ISD::BR
@ BR
Control flow instructions. These all have token chains.
Definition: ISDOpcodes.h:975
llvm::ISD::TargetExternalSymbol
@ TargetExternalSymbol
Definition: ISDOpcodes.h:169
llvm::ISD::FCOS
@ FCOS
Definition: ISDOpcodes.h:909
llvm::ISD::FCEIL
@ FCEIL
Definition: ISDOpcodes.h:917
llvm::ISD::FSIN
@ FSIN
Definition: ISDOpcodes.h:908
ISDOpcodes.h
llvm::ISD::INLINEASM_BR
@ INLINEASM_BR
INLINEASM_BR - Branching version of inline asm. Used by asm-goto.
Definition: ISDOpcodes.h:1021
llvm::ISD::BUILD_VECTOR
@ BUILD_VECTOR
BUILD_VECTOR(ELT0, ELT1, ELT2, ELT3,...) - Return a fixed-width vector with the specified,...
Definition: ISDOpcodes.h:514
Casting.h
llvm::ISD::STRICT_FCEIL
@ STRICT_FCEIL
Definition: ISDOpcodes.h:425
llvm::ISD::FRAME_TO_ARGS_OFFSET
@ FRAME_TO_ARGS_OFFSET
FRAME_TO_ARGS_OFFSET - This node represents offset from frame pointer to first (possible) on-stack ar...
Definition: ISDOpcodes.h:124
Function.h
llvm::ISD::SUBC
@ SUBC
Definition: ISDOpcodes.h:270
llvm::ISD::VECREDUCE_OR
@ VECREDUCE_OR
Definition: ISDOpcodes.h:1274
llvm::ISD::SETUO
@ SETUO
Definition: ISDOpcodes.h:1414
llvm::ISD::SDIV
@ SDIV
Definition: ISDOpcodes.h:242
llvm::ISD::TargetConstant
@ TargetConstant
TargetConstant* - Like Constant*, but the DAG does not do any folding, simplification,...
Definition: ISDOpcodes.h:158
llvm::ISD::PREALLOCATED_ARG
@ PREALLOCATED_ARG
Definition: ISDOpcodes.h:1087
llvm::SDNode::getNumValues
unsigned getNumValues() const
Return the number of values defined/returned by this operator.
Definition: SelectionDAGNodes.h:967
llvm::ISD::EH_RETURN
@ EH_RETURN
OUTCHAIN = EH_RETURN(INCHAIN, OFFSET, HANDLER) - This node represents 'eh_return' gcc dwarf builtin,...
Definition: ISDOpcodes.h:135
hasNoSignedWrap
static bool hasNoSignedWrap(BinaryOperator &I)
Definition: InstructionCombining.cpp:303
llvm::ISD::STORE
@ STORE
Definition: ISDOpcodes.h:960
llvm::ISD::VACOPY
@ VACOPY
VACOPY - VACOPY has 5 operands: an input chain, a destination pointer, a source pointer,...
Definition: ISDOpcodes.h:1075
llvm::ISD::SRL_PARTS
@ SRL_PARTS
Definition: ISDOpcodes.h:751
llvm::ISD::UINT_TO_FP
@ UINT_TO_FP
Definition: ISDOpcodes.h:774
llvm::ISD::ADD
@ ADD
Simple integer binary arithmetic operators.
Definition: ISDOpcodes.h:239
llvm::ISD::SSUBO
@ SSUBO
Same for subtraction.
Definition: ISDOpcodes.h:327
llvm::SDNode::getMachineOpcode
unsigned getMachineOpcode() const
This may only be called if isMachineOpcode returns true.
Definition: SelectionDAGNodes.h:692
llvm::ISD::STRICT_FFLOOR
@ STRICT_FFLOOR
Definition: ISDOpcodes.h:426
llvm::ISD::IS_FPCLASS
@ IS_FPCLASS
Performs a check of floating point class property, defined by IEEE-754.
Definition: ISDOpcodes.h:506
llvm::ISD::SETOGE
@ SETOGE
Definition: ISDOpcodes.h:1409
llvm::ISD::FP_EXTEND
@ FP_EXTEND
X = FP_EXTEND(Y) - Extend a smaller FP type into a larger FP type.
Definition: ISDOpcodes.h:871
llvm::MachineFrameInfo
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted.
Definition: MachineFrameInfo.h:105
llvm::ISD::FGETSIGN
@ FGETSIGN
INT = FGETSIGN(FP) - Return the sign bit of the specified floating point value as an integer 0/1 valu...
Definition: ISDOpcodes.h:496
llvm::ISD::RegisterMask
@ RegisterMask
Definition: ISDOpcodes.h:75
llvm::ISD::FSUB
@ FSUB
Definition: ISDOpcodes.h:391
llvm::ISD::PREFETCH
@ PREFETCH
PREFETCH - This corresponds to a prefetch intrinsic.
Definition: ISDOpcodes.h:1139
llvm::ISD::SHL
@ SHL
Shift and rotation operations.
Definition: ISDOpcodes.h:691
llvm::ISD::READCYCLECOUNTER
@ READCYCLECOUNTER
READCYCLECOUNTER - This corresponds to the readcyclecounter intrinsic.
Definition: ISDOpcodes.h:1106
llvm::ISD::FREM
@ FREM
Definition: ISDOpcodes.h:394
llvm::Printable
Simple wrapper around std::function<void(raw_ostream&)>.
Definition: Printable.h:38
llvm::ISD::MUL
@ MUL
Definition: ISDOpcodes.h:241
llvm::ISD::UREM
@ UREM
Definition: ISDOpcodes.h:245
TargetIntrinsicInfo.h
llvm::ISD::ZERO_EXTEND_VECTOR_INREG
@ ZERO_EXTEND_VECTOR_INREG
ZERO_EXTEND_VECTOR_INREG(Vector) - This operator represents an in-register zero-extension of the low ...
Definition: ISDOpcodes.h:814
llvm::ISD::BITREVERSE
@ BITREVERSE
Definition: ISDOpcodes.h:704
llvm::ISD::SUBE
@ SUBE
Definition: ISDOpcodes.h:280
llvm::ISD::SRL
@ SRL
Definition: ISDOpcodes.h:693
llvm::ISD::ADDROFRETURNADDR
@ ADDROFRETURNADDR
ADDROFRETURNADDR - Represents the llvm.addressofreturnaddress intrinsic.
Definition: ISDOpcodes.h:101
llvm::ISD::CTTZ
@ CTTZ
Definition: ISDOpcodes.h:701
llvm::ISD::TargetJumpTable
@ TargetJumpTable
Definition: ISDOpcodes.h:167
llvm::ISD::STRICT_FADD
@ STRICT_FADD
Constrained versions of the binary floating point operators.
Definition: ISDOpcodes.h:400
llvm::ISD::PARITY
@ PARITY
Definition: ISDOpcodes.h:705
llvm::ISD::STRICT_LLROUND
@ STRICT_LLROUND
Definition: ISDOpcodes.h:431
llvm::ISD::UMIN
@ UMIN
Definition: ISDOpcodes.h:662
ModuleSlotTracker.h
MachineMemOperand.h
llvm::ISD::SETFALSE2
@ SETFALSE2
Definition: ISDOpcodes.h:1423
llvm::ISD::MULHU
@ MULHU
MULHU/MULHS - Multiply high - Multiply two integers of type iN, producing an unsigned/signed value of...
Definition: ISDOpcodes.h:637
llvm::ISD::LROUND
@ LROUND
Definition: ISDOpcodes.h:924
llvm::ISD::STRICT_FREM
@ STRICT_FREM
Definition: ISDOpcodes.h:404
llvm::ISD::SETONE
@ SETONE
Definition: ISDOpcodes.h:1412
llvm::ISD::INTRINSIC_W_CHAIN
@ INTRINSIC_W_CHAIN
RESULT,OUTCHAIN = INTRINSIC_W_CHAIN(INCHAIN, INTRINSICID, arg1, ...) This node represents a target in...
Definition: ISDOpcodes.h:192
llvm::ISD::FNEG
@ FNEG
Perform various unary floating-point operations inspired by libm.
Definition: ISDOpcodes.h:904
llvm::ISD::STRICT_FEXP2
@ STRICT_FEXP2
Definition: ISDOpcodes.h:417
llvm::ISD::BUILD_PAIR
@ BUILD_PAIR
BUILD_PAIR - This is the opposite of EXTRACT_ELEMENT in some ways.
Definition: ISDOpcodes.h:229
llvm::ISD::VAARG
@ VAARG
VAARG - VAARG has four operands: an input chain, a pointer, a SRCVALUE, and the alignment.
Definition: ISDOpcodes.h:1070
llvm::ISD::UDIVFIX
@ UDIVFIX
Definition: ISDOpcodes.h:381
llvm::ISD::SDIVREM
@ SDIVREM
SDIVREM/UDIVREM - Divide two integers and produce both a quotient and remainder result.
Definition: ISDOpcodes.h:255
llvm::ISD::STRICT_FPOWI
@ STRICT_FPOWI
Definition: ISDOpcodes.h:413
llvm::cl::desc
Definition: CommandLine.h:405
llvm::ISD::ATOMIC_LOAD_XOR
@ ATOMIC_LOAD_XOR
Definition: ISDOpcodes.h:1183
hasNoInfs
static bool hasNoInfs(const TargetOptions &Options, SDValue N)
Definition: DAGCombiner.cpp:13799
llvm::ISD::TargetFrameIndex
@ TargetFrameIndex
Definition: ISDOpcodes.h:166
llvm::ISD::VECREDUCE_SMIN
@ VECREDUCE_SMIN
Definition: ISDOpcodes.h:1277
llvm::ISD::SIGN_EXTEND
@ SIGN_EXTEND
Conversion operators.
Definition: ISDOpcodes.h:760
raw_ostream.h
llvm::ISD::VECREDUCE_UMIN
@ VECREDUCE_UMIN
Definition: ISDOpcodes.h:1279
n
The same transformation can work with an even modulo with the addition of a and shrink the compare RHS by the same amount Unless the target supports that transformation probably isn t worthwhile The transformation can also easily be made to work with non zero equality for n
Definition: README.txt:685
llvm::ISD::FTRUNC
@ FTRUNC
Definition: ISDOpcodes.h:918
llvm::SDNode::getFlags
SDNodeFlags getFlags() const
Definition: SelectionDAGNodes.h:959
Value.h
llvm::ISD::INSERT_VECTOR_ELT
@ INSERT_VECTOR_ELT
INSERT_VECTOR_ELT(VECTOR, VAL, IDX) - Returns VECTOR with the element at IDX replaced with VAL.
Definition: ISDOpcodes.h:523
llvm::ISD::FCANONICALIZE
@ FCANONICALIZE
Returns platform specific canonical encoding of a floating point number.
Definition: ISDOpcodes.h:499
llvm::ISD::STACKSAVE
@ STACKSAVE
STACKSAVE - STACKSAVE has one operand, an input chain.
Definition: ISDOpcodes.h:1046
llvm::ISD::FLOG
@ FLOG
Definition: ISDOpcodes.h:912
llvm::ISD::ADDE
@ ADDE
Carry-using nodes for multiple precision addition and subtraction.
Definition: ISDOpcodes.h:279
llvm::ISD::FP_ROUND
@ FP_ROUND
X = FP_ROUND(Y, TRUNC) - Rounding 'Y' from a larger floating point type down to the precision of the ...
Definition: ISDOpcodes.h:852
llvm::ISD::ROTR
@ ROTR
Definition: ISDOpcodes.h:695
TargetRegisterInfo.h
llvm::ISD::AVGFLOORS
@ AVGFLOORS
AVGFLOORS/AVGFLOORU - Averaging add - Add two integers using an integer of type i[N+1],...
Definition: ISDOpcodes.h:643
Debug.h
llvm::ISD::SET_ROUNDING
@ SET_ROUNDING
Set rounding mode.
Definition: ISDOpcodes.h:868
llvm::ISD::ATOMIC_LOAD
@ ATOMIC_LOAD
Val, OUTCHAIN = ATOMIC_LOAD(INCHAIN, ptr) This corresponds to "load atomic" instruction.
Definition: ISDOpcodes.h:1152
llvm::ISD::SCALAR_TO_VECTOR
@ SCALAR_TO_VECTOR
SCALAR_TO_VECTOR(VAL) - This represents the operation of loading a scalar value into element 0 of the...
Definition: ISDOpcodes.h:606
llvm::ISD::CTPOP
@ CTPOP
Definition: ISDOpcodes.h:703
llvm::ISD::MCSymbol
@ MCSymbol
Definition: ISDOpcodes.h:172
llvm::ISD::SADDSAT
@ SADDSAT
RESULT = [US]ADDSAT(LHS, RHS) - Perform saturation addition on 2 integers with the same bit width (W)...
Definition: ISDOpcodes.h:340
llvm::ISD::ATOMIC_LOAD_MAX
@ ATOMIC_LOAD_MAX
Definition: ISDOpcodes.h:1186
llvm::ISD::TokenFactor
@ TokenFactor
TokenFactor - This node takes multiple tokens as input and produces a single token result.
Definition: ISDOpcodes.h:52
llvm::ISD::EXTRACT_ELEMENT
@ EXTRACT_ELEMENT
EXTRACT_ELEMENT - This is used to get the lower or upper (determined by a Constant,...
Definition: ISDOpcodes.h:222
llvm::ISD::MSCATTER
@ MSCATTER
Definition: ISDOpcodes.h:1211
llvm::Intrinsic::ID
unsigned ID
Definition: TargetTransformInfo.h:37
llvm::ISD::VSELECT
@ VSELECT
Select with a vector condition (op #0) and two vector operands (ops #1 and #2), returning a vector re...
Definition: ISDOpcodes.h:722
VerboseDAGDumping
static cl::opt< bool > VerboseDAGDumping("dag-dump-verbose", cl::Hidden, cl::desc("Display more information when dumping selection " "DAG nodes."))
llvm::ISD::FDIV
@ FDIV
Definition: ISDOpcodes.h:393