LLVM 19.0.0git
SelectionDAGDumper.cpp
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1//===- SelectionDAGDumper.cpp - Implement SelectionDAG::dump() ------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This implements the SelectionDAG::dump method and friends.
10//
11//===----------------------------------------------------------------------===//
12
13#include "SDNodeDbgValue.h"
14#include "llvm/ADT/APFloat.h"
15#include "llvm/ADT/APInt.h"
30#include "llvm/Config/llvm-config.h"
31#include "llvm/IR/BasicBlock.h"
32#include "llvm/IR/Constants.h"
34#include "llvm/IR/DebugLoc.h"
35#include "llvm/IR/Function.h"
36#include "llvm/IR/Intrinsics.h"
38#include "llvm/IR/Value.h"
42#include "llvm/Support/Debug.h"
48#include <cstdint>
49#include <iterator>
50
51using namespace llvm;
52
53static cl::opt<bool>
54VerboseDAGDumping("dag-dump-verbose", cl::Hidden,
55 cl::desc("Display more information when dumping selection "
56 "DAG nodes."));
57
58std::string SDNode::getOperationName(const SelectionDAG *G) const {
59 switch (getOpcode()) {
60 default:
62 return "<<Unknown DAG Node>>";
63 if (isMachineOpcode()) {
64 if (G)
65 if (const TargetInstrInfo *TII = G->getSubtarget().getInstrInfo())
66 if (getMachineOpcode() < TII->getNumOpcodes())
67 return std::string(TII->getName(getMachineOpcode()));
68 return "<<Unknown Machine Node #" + utostr(getOpcode()) + ">>";
69 }
70 if (G) {
71 const TargetLowering &TLI = G->getTargetLoweringInfo();
72 const char *Name = TLI.getTargetNodeName(getOpcode());
73 if (Name) return Name;
74 return "<<Unknown Target Node #" + utostr(getOpcode()) + ">>";
75 }
76 return "<<Unknown Node #" + utostr(getOpcode()) + ">>";
77
78#ifndef NDEBUG
79 case ISD::DELETED_NODE: return "<<Deleted Node!>>";
80#endif
81 case ISD::PREFETCH: return "Prefetch";
82 case ISD::MEMBARRIER: return "MemBarrier";
83 case ISD::ATOMIC_FENCE: return "AtomicFence";
84 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap";
85 case ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS: return "AtomicCmpSwapWithSuccess";
86 case ISD::ATOMIC_SWAP: return "AtomicSwap";
87 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd";
88 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub";
89 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd";
90 case ISD::ATOMIC_LOAD_CLR: return "AtomicLoadClr";
91 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr";
92 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor";
93 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand";
94 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin";
95 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax";
96 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin";
97 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax";
98 case ISD::ATOMIC_LOAD_FADD: return "AtomicLoadFAdd";
100 return "AtomicLoadUIncWrap";
102 return "AtomicLoadUDecWrap";
103 case ISD::ATOMIC_LOAD: return "AtomicLoad";
104 case ISD::ATOMIC_STORE: return "AtomicStore";
105 case ISD::PCMARKER: return "PCMarker";
106 case ISD::READCYCLECOUNTER: return "ReadCycleCounter";
107 case ISD::READSTEADYCOUNTER: return "ReadSteadyCounter";
108 case ISD::SRCVALUE: return "SrcValue";
109 case ISD::MDNODE_SDNODE: return "MDNode";
110 case ISD::EntryToken: return "EntryToken";
111 case ISD::TokenFactor: return "TokenFactor";
112 case ISD::AssertSext: return "AssertSext";
113 case ISD::AssertZext: return "AssertZext";
114 case ISD::AssertAlign: return "AssertAlign";
115
116 case ISD::BasicBlock: return "BasicBlock";
117 case ISD::VALUETYPE: return "ValueType";
118 case ISD::Register: return "Register";
119 case ISD::RegisterMask: return "RegisterMask";
120 case ISD::Constant:
121 if (cast<ConstantSDNode>(this)->isOpaque())
122 return "OpaqueConstant";
123 return "Constant";
124 case ISD::ConstantFP: return "ConstantFP";
125 case ISD::GlobalAddress: return "GlobalAddress";
126 case ISD::GlobalTLSAddress: return "GlobalTLSAddress";
127 case ISD::FrameIndex: return "FrameIndex";
128 case ISD::JumpTable: return "JumpTable";
130 return "JUMP_TABLE_DEBUG_INFO";
131 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE";
132 case ISD::RETURNADDR: return "RETURNADDR";
133 case ISD::ADDROFRETURNADDR: return "ADDROFRETURNADDR";
134 case ISD::FRAMEADDR: return "FRAMEADDR";
135 case ISD::SPONENTRY: return "SPONENTRY";
136 case ISD::LOCAL_RECOVER: return "LOCAL_RECOVER";
137 case ISD::READ_REGISTER: return "READ_REGISTER";
138 case ISD::WRITE_REGISTER: return "WRITE_REGISTER";
139 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET";
140 case ISD::EH_DWARF_CFA: return "EH_DWARF_CFA";
141 case ISD::EH_RETURN: return "EH_RETURN";
142 case ISD::EH_SJLJ_SETJMP: return "EH_SJLJ_SETJMP";
143 case ISD::EH_SJLJ_LONGJMP: return "EH_SJLJ_LONGJMP";
144 case ISD::EH_SJLJ_SETUP_DISPATCH: return "EH_SJLJ_SETUP_DISPATCH";
145 case ISD::ConstantPool: return "ConstantPool";
146 case ISD::TargetIndex: return "TargetIndex";
147 case ISD::ExternalSymbol: return "ExternalSymbol";
148 case ISD::BlockAddress: return "BlockAddress";
152 unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1;
153 unsigned IID = getOperand(OpNo)->getAsZExtVal();
154 if (IID < Intrinsic::num_intrinsics)
156 if (!G)
157 return "Unknown intrinsic";
158 if (const TargetIntrinsicInfo *TII = G->getTarget().getIntrinsicInfo())
159 return TII->getName(IID);
160 llvm_unreachable("Invalid intrinsic ID");
161 }
162
163 case ISD::BUILD_VECTOR: return "BUILD_VECTOR";
165 if (cast<ConstantSDNode>(this)->isOpaque())
166 return "OpaqueTargetConstant";
167 return "TargetConstant";
168
169 // clang-format off
170
171 case ISD::TargetConstantFP: return "TargetConstantFP";
172 case ISD::TargetGlobalAddress: return "TargetGlobalAddress";
173 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress";
174 case ISD::TargetFrameIndex: return "TargetFrameIndex";
175 case ISD::TargetJumpTable: return "TargetJumpTable";
176 case ISD::TargetConstantPool: return "TargetConstantPool";
177 case ISD::TargetExternalSymbol: return "TargetExternalSymbol";
178 case ISD::MCSymbol: return "MCSymbol";
179 case ISD::TargetBlockAddress: return "TargetBlockAddress";
180
181 case ISD::CopyToReg: return "CopyToReg";
182 case ISD::CopyFromReg: return "CopyFromReg";
183 case ISD::UNDEF: return "undef";
184 case ISD::VSCALE: return "vscale";
185 case ISD::MERGE_VALUES: return "merge_values";
186 case ISD::INLINEASM: return "inlineasm";
187 case ISD::INLINEASM_BR: return "inlineasm_br";
188 case ISD::EH_LABEL: return "eh_label";
189 case ISD::ANNOTATION_LABEL: return "annotation_label";
190 case ISD::HANDLENODE: return "handlenode";
191
192 // Unary operators
193 case ISD::FABS: return "fabs";
194 case ISD::FMINNUM: return "fminnum";
195 case ISD::STRICT_FMINNUM: return "strict_fminnum";
196 case ISD::FMAXNUM: return "fmaxnum";
197 case ISD::STRICT_FMAXNUM: return "strict_fmaxnum";
198 case ISD::FMINNUM_IEEE: return "fminnum_ieee";
199 case ISD::FMAXNUM_IEEE: return "fmaxnum_ieee";
200 case ISD::FMINIMUM: return "fminimum";
201 case ISD::STRICT_FMINIMUM: return "strict_fminimum";
202 case ISD::FMAXIMUM: return "fmaximum";
203 case ISD::STRICT_FMAXIMUM: return "strict_fmaximum";
204 case ISD::FNEG: return "fneg";
205 case ISD::FSQRT: return "fsqrt";
206 case ISD::STRICT_FSQRT: return "strict_fsqrt";
207 case ISD::FCBRT: return "fcbrt";
208 case ISD::FSIN: return "fsin";
209 case ISD::STRICT_FSIN: return "strict_fsin";
210 case ISD::FCOS: return "fcos";
211 case ISD::STRICT_FCOS: return "strict_fcos";
212 case ISD::FSINCOS: return "fsincos";
213 case ISD::FTRUNC: return "ftrunc";
214 case ISD::STRICT_FTRUNC: return "strict_ftrunc";
215 case ISD::FFLOOR: return "ffloor";
216 case ISD::STRICT_FFLOOR: return "strict_ffloor";
217 case ISD::FCEIL: return "fceil";
218 case ISD::STRICT_FCEIL: return "strict_fceil";
219 case ISD::FRINT: return "frint";
220 case ISD::STRICT_FRINT: return "strict_frint";
221 case ISD::FNEARBYINT: return "fnearbyint";
222 case ISD::STRICT_FNEARBYINT: return "strict_fnearbyint";
223 case ISD::FROUND: return "fround";
224 case ISD::STRICT_FROUND: return "strict_fround";
225 case ISD::FROUNDEVEN: return "froundeven";
226 case ISD::STRICT_FROUNDEVEN: return "strict_froundeven";
227 case ISD::FEXP: return "fexp";
228 case ISD::STRICT_FEXP: return "strict_fexp";
229 case ISD::FEXP2: return "fexp2";
230 case ISD::STRICT_FEXP2: return "strict_fexp2";
231 case ISD::FEXP10: return "fexp10";
232 case ISD::FLOG: return "flog";
233 case ISD::STRICT_FLOG: return "strict_flog";
234 case ISD::FLOG2: return "flog2";
235 case ISD::STRICT_FLOG2: return "strict_flog2";
236 case ISD::FLOG10: return "flog10";
237 case ISD::STRICT_FLOG10: return "strict_flog10";
238
239 // Binary operators
240 case ISD::ADD: return "add";
241 case ISD::SUB: return "sub";
242 case ISD::MUL: return "mul";
243 case ISD::MULHU: return "mulhu";
244 case ISD::MULHS: return "mulhs";
245 case ISD::AVGFLOORU: return "avgflooru";
246 case ISD::AVGFLOORS: return "avgfloors";
247 case ISD::AVGCEILU: return "avgceilu";
248 case ISD::AVGCEILS: return "avgceils";
249 case ISD::ABDS: return "abds";
250 case ISD::ABDU: return "abdu";
251 case ISD::SDIV: return "sdiv";
252 case ISD::UDIV: return "udiv";
253 case ISD::SREM: return "srem";
254 case ISD::UREM: return "urem";
255 case ISD::SMUL_LOHI: return "smul_lohi";
256 case ISD::UMUL_LOHI: return "umul_lohi";
257 case ISD::SDIVREM: return "sdivrem";
258 case ISD::UDIVREM: return "udivrem";
259 case ISD::AND: return "and";
260 case ISD::OR: return "or";
261 case ISD::XOR: return "xor";
262 case ISD::SHL: return "shl";
263 case ISD::SRA: return "sra";
264 case ISD::SRL: return "srl";
265 case ISD::ROTL: return "rotl";
266 case ISD::ROTR: return "rotr";
267 case ISD::FSHL: return "fshl";
268 case ISD::FSHR: return "fshr";
269 case ISD::FADD: return "fadd";
270 case ISD::STRICT_FADD: return "strict_fadd";
271 case ISD::FSUB: return "fsub";
272 case ISD::STRICT_FSUB: return "strict_fsub";
273 case ISD::FMUL: return "fmul";
274 case ISD::STRICT_FMUL: return "strict_fmul";
275 case ISD::FDIV: return "fdiv";
276 case ISD::STRICT_FDIV: return "strict_fdiv";
277 case ISD::FMA: return "fma";
278 case ISD::STRICT_FMA: return "strict_fma";
279 case ISD::FMAD: return "fmad";
280 case ISD::FREM: return "frem";
281 case ISD::STRICT_FREM: return "strict_frem";
282 case ISD::FCOPYSIGN: return "fcopysign";
283 case ISD::FGETSIGN: return "fgetsign";
284 case ISD::FCANONICALIZE: return "fcanonicalize";
285 case ISD::IS_FPCLASS: return "is_fpclass";
286 case ISD::FPOW: return "fpow";
287 case ISD::STRICT_FPOW: return "strict_fpow";
288 case ISD::SMIN: return "smin";
289 case ISD::SMAX: return "smax";
290 case ISD::UMIN: return "umin";
291 case ISD::UMAX: return "umax";
292
293 case ISD::FLDEXP: return "fldexp";
294 case ISD::STRICT_FLDEXP: return "strict_fldexp";
295 case ISD::FFREXP: return "ffrexp";
296 case ISD::FPOWI: return "fpowi";
297 case ISD::STRICT_FPOWI: return "strict_fpowi";
298 case ISD::SETCC: return "setcc";
299 case ISD::SETCCCARRY: return "setcccarry";
300 case ISD::STRICT_FSETCC: return "strict_fsetcc";
301 case ISD::STRICT_FSETCCS: return "strict_fsetccs";
302 case ISD::FPTRUNC_ROUND: return "fptrunc_round";
303 case ISD::SELECT: return "select";
304 case ISD::VSELECT: return "vselect";
305 case ISD::SELECT_CC: return "select_cc";
306 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt";
307 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt";
308 case ISD::CONCAT_VECTORS: return "concat_vectors";
309 case ISD::INSERT_SUBVECTOR: return "insert_subvector";
310 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector";
311 case ISD::VECTOR_DEINTERLEAVE: return "vector_deinterleave";
312 case ISD::VECTOR_INTERLEAVE: return "vector_interleave";
313 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector";
314 case ISD::VECTOR_SHUFFLE: return "vector_shuffle";
315 case ISD::VECTOR_SPLICE: return "vector_splice";
316 case ISD::SPLAT_VECTOR: return "splat_vector";
317 case ISD::SPLAT_VECTOR_PARTS: return "splat_vector_parts";
318 case ISD::VECTOR_REVERSE: return "vector_reverse";
319 case ISD::STEP_VECTOR: return "step_vector";
320 case ISD::CARRY_FALSE: return "carry_false";
321 case ISD::ADDC: return "addc";
322 case ISD::ADDE: return "adde";
323 case ISD::UADDO_CARRY: return "uaddo_carry";
324 case ISD::SADDO_CARRY: return "saddo_carry";
325 case ISD::SADDO: return "saddo";
326 case ISD::UADDO: return "uaddo";
327 case ISD::SSUBO: return "ssubo";
328 case ISD::USUBO: return "usubo";
329 case ISD::SMULO: return "smulo";
330 case ISD::UMULO: return "umulo";
331 case ISD::SUBC: return "subc";
332 case ISD::SUBE: return "sube";
333 case ISD::USUBO_CARRY: return "usubo_carry";
334 case ISD::SSUBO_CARRY: return "ssubo_carry";
335 case ISD::SHL_PARTS: return "shl_parts";
336 case ISD::SRA_PARTS: return "sra_parts";
337 case ISD::SRL_PARTS: return "srl_parts";
338
339 case ISD::SADDSAT: return "saddsat";
340 case ISD::UADDSAT: return "uaddsat";
341 case ISD::SSUBSAT: return "ssubsat";
342 case ISD::USUBSAT: return "usubsat";
343 case ISD::SSHLSAT: return "sshlsat";
344 case ISD::USHLSAT: return "ushlsat";
345
346 case ISD::SMULFIX: return "smulfix";
347 case ISD::SMULFIXSAT: return "smulfixsat";
348 case ISD::UMULFIX: return "umulfix";
349 case ISD::UMULFIXSAT: return "umulfixsat";
350
351 case ISD::SDIVFIX: return "sdivfix";
352 case ISD::SDIVFIXSAT: return "sdivfixsat";
353 case ISD::UDIVFIX: return "udivfix";
354 case ISD::UDIVFIXSAT: return "udivfixsat";
355
356 // Conversion operators.
357 case ISD::SIGN_EXTEND: return "sign_extend";
358 case ISD::ZERO_EXTEND: return "zero_extend";
359 case ISD::ANY_EXTEND: return "any_extend";
360 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg";
361 case ISD::ANY_EXTEND_VECTOR_INREG: return "any_extend_vector_inreg";
362 case ISD::SIGN_EXTEND_VECTOR_INREG: return "sign_extend_vector_inreg";
363 case ISD::ZERO_EXTEND_VECTOR_INREG: return "zero_extend_vector_inreg";
364 case ISD::TRUNCATE: return "truncate";
365 case ISD::FP_ROUND: return "fp_round";
366 case ISD::STRICT_FP_ROUND: return "strict_fp_round";
367 case ISD::FP_EXTEND: return "fp_extend";
368 case ISD::STRICT_FP_EXTEND: return "strict_fp_extend";
369
370 case ISD::SINT_TO_FP: return "sint_to_fp";
371 case ISD::STRICT_SINT_TO_FP: return "strict_sint_to_fp";
372 case ISD::UINT_TO_FP: return "uint_to_fp";
373 case ISD::STRICT_UINT_TO_FP: return "strict_uint_to_fp";
374 case ISD::FP_TO_SINT: return "fp_to_sint";
375 case ISD::STRICT_FP_TO_SINT: return "strict_fp_to_sint";
376 case ISD::FP_TO_UINT: return "fp_to_uint";
377 case ISD::STRICT_FP_TO_UINT: return "strict_fp_to_uint";
378 case ISD::FP_TO_SINT_SAT: return "fp_to_sint_sat";
379 case ISD::FP_TO_UINT_SAT: return "fp_to_uint_sat";
380 case ISD::BITCAST: return "bitcast";
381 case ISD::ADDRSPACECAST: return "addrspacecast";
382 case ISD::FP16_TO_FP: return "fp16_to_fp";
383 case ISD::STRICT_FP16_TO_FP: return "strict_fp16_to_fp";
384 case ISD::FP_TO_FP16: return "fp_to_fp16";
385 case ISD::STRICT_FP_TO_FP16: return "strict_fp_to_fp16";
386 case ISD::BF16_TO_FP: return "bf16_to_fp";
387 case ISD::STRICT_BF16_TO_FP: return "strict_bf16_to_fp";
388 case ISD::FP_TO_BF16: return "fp_to_bf16";
389 case ISD::STRICT_FP_TO_BF16: return "strict_fp_to_bf16";
390 case ISD::LROUND: return "lround";
391 case ISD::STRICT_LROUND: return "strict_lround";
392 case ISD::LLROUND: return "llround";
393 case ISD::STRICT_LLROUND: return "strict_llround";
394 case ISD::LRINT: return "lrint";
395 case ISD::STRICT_LRINT: return "strict_lrint";
396 case ISD::LLRINT: return "llrint";
397 case ISD::STRICT_LLRINT: return "strict_llrint";
398
399 // Control flow instructions
400 case ISD::BR: return "br";
401 case ISD::BRIND: return "brind";
402 case ISD::BR_JT: return "br_jt";
403 case ISD::BRCOND: return "brcond";
404 case ISD::BR_CC: return "br_cc";
405 case ISD::CALLSEQ_START: return "callseq_start";
406 case ISD::CALLSEQ_END: return "callseq_end";
407
408 // EH instructions
409 case ISD::CATCHRET: return "catchret";
410 case ISD::CLEANUPRET: return "cleanupret";
411
412 // Other operators
413 case ISD::LOAD: return "load";
414 case ISD::STORE: return "store";
415 case ISD::MLOAD: return "masked_load";
416 case ISD::MSTORE: return "masked_store";
417 case ISD::MGATHER: return "masked_gather";
418 case ISD::MSCATTER: return "masked_scatter";
419 case ISD::VAARG: return "vaarg";
420 case ISD::VACOPY: return "vacopy";
421 case ISD::VAEND: return "vaend";
422 case ISD::VASTART: return "vastart";
423 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc";
424 case ISD::EXTRACT_ELEMENT: return "extract_element";
425 case ISD::BUILD_PAIR: return "build_pair";
426 case ISD::STACKSAVE: return "stacksave";
427 case ISD::STACKRESTORE: return "stackrestore";
428 case ISD::TRAP: return "trap";
429 case ISD::DEBUGTRAP: return "debugtrap";
430 case ISD::UBSANTRAP: return "ubsantrap";
431 case ISD::LIFETIME_START: return "lifetime.start";
432 case ISD::LIFETIME_END: return "lifetime.end";
434 return "pseudoprobe";
435 case ISD::GC_TRANSITION_START: return "gc_transition.start";
436 case ISD::GC_TRANSITION_END: return "gc_transition.end";
437 case ISD::GET_DYNAMIC_AREA_OFFSET: return "get.dynamic.area.offset";
438 case ISD::FREEZE: return "freeze";
440 return "call_setup";
442 return "call_alloc";
443
444 // Floating point environment manipulation
445 case ISD::GET_ROUNDING: return "get_rounding";
446 case ISD::SET_ROUNDING: return "set_rounding";
447 case ISD::GET_FPENV: return "get_fpenv";
448 case ISD::SET_FPENV: return "set_fpenv";
449 case ISD::RESET_FPENV: return "reset_fpenv";
450 case ISD::GET_FPENV_MEM: return "get_fpenv_mem";
451 case ISD::SET_FPENV_MEM: return "set_fpenv_mem";
452 case ISD::GET_FPMODE: return "get_fpmode";
453 case ISD::SET_FPMODE: return "set_fpmode";
454 case ISD::RESET_FPMODE: return "reset_fpmode";
455
456 // Convergence control instructions
457 case ISD::CONVERGENCECTRL_ANCHOR: return "convergencectrl_anchor";
458 case ISD::CONVERGENCECTRL_ENTRY: return "convergencectrl_entry";
459 case ISD::CONVERGENCECTRL_LOOP: return "convergencectrl_loop";
460 case ISD::CONVERGENCECTRL_GLUE: return "convergencectrl_glue";
461
462 // Bit manipulation
463 case ISD::ABS: return "abs";
464 case ISD::BITREVERSE: return "bitreverse";
465 case ISD::BSWAP: return "bswap";
466 case ISD::CTPOP: return "ctpop";
467 case ISD::CTTZ: return "cttz";
468 case ISD::CTTZ_ZERO_UNDEF: return "cttz_zero_undef";
469 case ISD::CTLZ: return "ctlz";
470 case ISD::CTLZ_ZERO_UNDEF: return "ctlz_zero_undef";
471 case ISD::PARITY: return "parity";
472
473 // Trampolines
474 case ISD::INIT_TRAMPOLINE: return "init_trampoline";
475 case ISD::ADJUST_TRAMPOLINE: return "adjust_trampoline";
476
477 // clang-format on
478
479 case ISD::CONDCODE:
480 switch (cast<CondCodeSDNode>(this)->get()) {
481 default: llvm_unreachable("Unknown setcc condition!");
482 case ISD::SETOEQ: return "setoeq";
483 case ISD::SETOGT: return "setogt";
484 case ISD::SETOGE: return "setoge";
485 case ISD::SETOLT: return "setolt";
486 case ISD::SETOLE: return "setole";
487 case ISD::SETONE: return "setone";
488
489 case ISD::SETO: return "seto";
490 case ISD::SETUO: return "setuo";
491 case ISD::SETUEQ: return "setueq";
492 case ISD::SETUGT: return "setugt";
493 case ISD::SETUGE: return "setuge";
494 case ISD::SETULT: return "setult";
495 case ISD::SETULE: return "setule";
496 case ISD::SETUNE: return "setune";
497
498 case ISD::SETEQ: return "seteq";
499 case ISD::SETGT: return "setgt";
500 case ISD::SETGE: return "setge";
501 case ISD::SETLT: return "setlt";
502 case ISD::SETLE: return "setle";
503 case ISD::SETNE: return "setne";
504
505 case ISD::SETTRUE: return "settrue";
506 case ISD::SETTRUE2: return "settrue2";
507 case ISD::SETFALSE: return "setfalse";
508 case ISD::SETFALSE2: return "setfalse2";
509 }
510 case ISD::VECREDUCE_FADD: return "vecreduce_fadd";
511 case ISD::VECREDUCE_SEQ_FADD: return "vecreduce_seq_fadd";
512 case ISD::VECREDUCE_FMUL: return "vecreduce_fmul";
513 case ISD::VECREDUCE_SEQ_FMUL: return "vecreduce_seq_fmul";
514 case ISD::VECREDUCE_ADD: return "vecreduce_add";
515 case ISD::VECREDUCE_MUL: return "vecreduce_mul";
516 case ISD::VECREDUCE_AND: return "vecreduce_and";
517 case ISD::VECREDUCE_OR: return "vecreduce_or";
518 case ISD::VECREDUCE_XOR: return "vecreduce_xor";
519 case ISD::VECREDUCE_SMAX: return "vecreduce_smax";
520 case ISD::VECREDUCE_SMIN: return "vecreduce_smin";
521 case ISD::VECREDUCE_UMAX: return "vecreduce_umax";
522 case ISD::VECREDUCE_UMIN: return "vecreduce_umin";
523 case ISD::VECREDUCE_FMAX: return "vecreduce_fmax";
524 case ISD::VECREDUCE_FMIN: return "vecreduce_fmin";
525 case ISD::VECREDUCE_FMAXIMUM: return "vecreduce_fmaximum";
526 case ISD::VECREDUCE_FMINIMUM: return "vecreduce_fminimum";
527 case ISD::STACKMAP:
528 return "stackmap";
529 case ISD::PATCHPOINT:
530 return "patchpoint";
531
533 return "histogram";
534
535 // Vector Predication
536#define BEGIN_REGISTER_VP_SDNODE(SDID, LEGALARG, NAME, ...) \
537 case ISD::SDID: \
538 return #NAME;
539#include "llvm/IR/VPIntrinsics.def"
540 }
541}
542
544 switch (AM) {
545 default: return "";
546 case ISD::PRE_INC: return "<pre-inc>";
547 case ISD::PRE_DEC: return "<pre-dec>";
548 case ISD::POST_INC: return "<post-inc>";
549 case ISD::POST_DEC: return "<post-dec>";
550 }
551}
552
554 return Printable([&Node](raw_ostream &OS) {
555#ifndef NDEBUG
556 OS << 't' << Node.PersistentId;
557#else
558 OS << (const void*)&Node;
559#endif
560 });
561}
562
563// Print the MMO with more information from the SelectionDAG.
565 const MachineFunction *MF, const Module *M,
566 const MachineFrameInfo *MFI,
567 const TargetInstrInfo *TII, LLVMContext &Ctx) {
568 ModuleSlotTracker MST(M);
569 if (MF)
572 MMO.print(OS, MST, SSNs, Ctx, MFI, TII);
573}
574
576 const SelectionDAG *G) {
577 if (G) {
578 const MachineFunction *MF = &G->getMachineFunction();
579 return printMemOperand(OS, MMO, MF, MF->getFunction().getParent(),
580 &MF->getFrameInfo(),
581 G->getSubtarget().getInstrInfo(), *G->getContext());
582 }
583
584 LLVMContext Ctx;
585 return printMemOperand(OS, MMO, /*MF=*/nullptr, /*M=*/nullptr,
586 /*MFI=*/nullptr, /*TII=*/nullptr, Ctx);
587}
588
589#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
590LLVM_DUMP_METHOD void SDNode::dump() const { dump(nullptr); }
591
593 print(dbgs(), G);
594 dbgs() << '\n';
595}
596#endif
597
599 for (unsigned i = 0, e = getNumValues(); i != e; ++i) {
600 if (i) OS << ",";
601 if (getValueType(i) == MVT::Other)
602 OS << "ch";
603 else
605 }
606}
607
610 OS << " nuw";
611
613 OS << " nsw";
614
615 if (getFlags().hasExact())
616 OS << " exact";
617
618 if (getFlags().hasDisjoint())
619 OS << " disjoint";
620
621 if (getFlags().hasNonNeg())
622 OS << " nneg";
623
624 if (getFlags().hasNoNaNs())
625 OS << " nnan";
626
627 if (getFlags().hasNoInfs())
628 OS << " ninf";
629
630 if (getFlags().hasNoSignedZeros())
631 OS << " nsz";
632
633 if (getFlags().hasAllowReciprocal())
634 OS << " arcp";
635
636 if (getFlags().hasAllowContract())
637 OS << " contract";
638
639 if (getFlags().hasApproximateFuncs())
640 OS << " afn";
641
642 if (getFlags().hasAllowReassociation())
643 OS << " reassoc";
644
645 if (getFlags().hasNoFPExcept())
646 OS << " nofpexcept";
647
648 if (const MachineSDNode *MN = dyn_cast<MachineSDNode>(this)) {
649 if (!MN->memoperands_empty()) {
650 OS << "<";
651 OS << "Mem:";
652 for (MachineSDNode::mmo_iterator i = MN->memoperands_begin(),
653 e = MN->memoperands_end(); i != e; ++i) {
654 printMemOperand(OS, **i, G);
655 if (std::next(i) != e)
656 OS << " ";
657 }
658 OS << ">";
659 }
660 } else if (const ShuffleVectorSDNode *SVN =
661 dyn_cast<ShuffleVectorSDNode>(this)) {
662 OS << "<";
663 for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) {
664 int Idx = SVN->getMaskElt(i);
665 if (i) OS << ",";
666 if (Idx < 0)
667 OS << "u";
668 else
669 OS << Idx;
670 }
671 OS << ">";
672 } else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) {
673 OS << '<' << CSDN->getAPIntValue() << '>';
674 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) {
675 if (&CSDN->getValueAPF().getSemantics() == &APFloat::IEEEsingle())
676 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>';
677 else if (&CSDN->getValueAPF().getSemantics() == &APFloat::IEEEdouble())
678 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>';
679 else {
680 OS << "<APFloat(";
681 CSDN->getValueAPF().bitcastToAPInt().print(OS, false);
682 OS << ")>";
683 }
684 } else if (const GlobalAddressSDNode *GADN =
685 dyn_cast<GlobalAddressSDNode>(this)) {
686 int64_t offset = GADN->getOffset();
687 OS << '<';
688 GADN->getGlobal()->printAsOperand(OS);
689 OS << '>';
690 if (offset > 0)
691 OS << " + " << offset;
692 else
693 OS << " " << offset;
694 if (unsigned int TF = GADN->getTargetFlags())
695 OS << " [TF=" << TF << ']';
696 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) {
697 OS << "<" << FIDN->getIndex() << ">";
698 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) {
699 OS << "<" << JTDN->getIndex() << ">";
700 if (unsigned int TF = JTDN->getTargetFlags())
701 OS << " [TF=" << TF << ']';
702 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){
703 int offset = CP->getOffset();
704 if (CP->isMachineConstantPoolEntry())
705 OS << "<" << *CP->getMachineCPVal() << ">";
706 else
707 OS << "<" << *CP->getConstVal() << ">";
708 if (offset > 0)
709 OS << " + " << offset;
710 else
711 OS << " " << offset;
712 if (unsigned int TF = CP->getTargetFlags())
713 OS << " [TF=" << TF << ']';
714 } else if (const TargetIndexSDNode *TI = dyn_cast<TargetIndexSDNode>(this)) {
715 OS << "<" << TI->getIndex() << '+' << TI->getOffset() << ">";
716 if (unsigned TF = TI->getTargetFlags())
717 OS << " [TF=" << TF << ']';
718 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) {
719 OS << "<";
720 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock();
721 if (LBB)
722 OS << LBB->getName() << " ";
723 OS << (const void*)BBDN->getBasicBlock() << ">";
724 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) {
725 OS << ' ' << printReg(R->getReg(),
726 G ? G->getSubtarget().getRegisterInfo() : nullptr);
727 } else if (const ExternalSymbolSDNode *ES =
728 dyn_cast<ExternalSymbolSDNode>(this)) {
729 OS << "'" << ES->getSymbol() << "'";
730 if (unsigned int TF = ES->getTargetFlags())
731 OS << " [TF=" << TF << ']';
732 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) {
733 if (M->getValue())
734 OS << "<" << M->getValue() << ">";
735 else
736 OS << "<null>";
737 } else if (const MDNodeSDNode *MD = dyn_cast<MDNodeSDNode>(this)) {
738 if (MD->getMD())
739 OS << "<" << MD->getMD() << ">";
740 else
741 OS << "<null>";
742 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) {
743 OS << ":" << N->getVT();
744 }
745 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) {
746 OS << "<";
747
748 printMemOperand(OS, *LD->getMemOperand(), G);
749
750 bool doExt = true;
751 switch (LD->getExtensionType()) {
752 default: doExt = false; break;
753 case ISD::EXTLOAD: OS << ", anyext"; break;
754 case ISD::SEXTLOAD: OS << ", sext"; break;
755 case ISD::ZEXTLOAD: OS << ", zext"; break;
756 }
757 if (doExt)
758 OS << " from " << LD->getMemoryVT();
759
760 const char *AM = getIndexedModeName(LD->getAddressingMode());
761 if (*AM)
762 OS << ", " << AM;
763
764 OS << ">";
765 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) {
766 OS << "<";
767 printMemOperand(OS, *ST->getMemOperand(), G);
768
769 if (ST->isTruncatingStore())
770 OS << ", trunc to " << ST->getMemoryVT();
771
772 const char *AM = getIndexedModeName(ST->getAddressingMode());
773 if (*AM)
774 OS << ", " << AM;
775
776 OS << ">";
777 } else if (const MaskedLoadSDNode *MLd = dyn_cast<MaskedLoadSDNode>(this)) {
778 OS << "<";
779
780 printMemOperand(OS, *MLd->getMemOperand(), G);
781
782 bool doExt = true;
783 switch (MLd->getExtensionType()) {
784 default: doExt = false; break;
785 case ISD::EXTLOAD: OS << ", anyext"; break;
786 case ISD::SEXTLOAD: OS << ", sext"; break;
787 case ISD::ZEXTLOAD: OS << ", zext"; break;
788 }
789 if (doExt)
790 OS << " from " << MLd->getMemoryVT();
791
792 const char *AM = getIndexedModeName(MLd->getAddressingMode());
793 if (*AM)
794 OS << ", " << AM;
795
796 if (MLd->isExpandingLoad())
797 OS << ", expanding";
798
799 OS << ">";
800 } else if (const MaskedStoreSDNode *MSt = dyn_cast<MaskedStoreSDNode>(this)) {
801 OS << "<";
802 printMemOperand(OS, *MSt->getMemOperand(), G);
803
804 if (MSt->isTruncatingStore())
805 OS << ", trunc to " << MSt->getMemoryVT();
806
807 const char *AM = getIndexedModeName(MSt->getAddressingMode());
808 if (*AM)
809 OS << ", " << AM;
810
811 if (MSt->isCompressingStore())
812 OS << ", compressing";
813
814 OS << ">";
815 } else if (const auto *MGather = dyn_cast<MaskedGatherSDNode>(this)) {
816 OS << "<";
817 printMemOperand(OS, *MGather->getMemOperand(), G);
818
819 bool doExt = true;
820 switch (MGather->getExtensionType()) {
821 default: doExt = false; break;
822 case ISD::EXTLOAD: OS << ", anyext"; break;
823 case ISD::SEXTLOAD: OS << ", sext"; break;
824 case ISD::ZEXTLOAD: OS << ", zext"; break;
825 }
826 if (doExt)
827 OS << " from " << MGather->getMemoryVT();
828
829 auto Signed = MGather->isIndexSigned() ? "signed" : "unsigned";
830 auto Scaled = MGather->isIndexScaled() ? "scaled" : "unscaled";
831 OS << ", " << Signed << " " << Scaled << " offset";
832
833 OS << ">";
834 } else if (const auto *MScatter = dyn_cast<MaskedScatterSDNode>(this)) {
835 OS << "<";
836 printMemOperand(OS, *MScatter->getMemOperand(), G);
837
838 if (MScatter->isTruncatingStore())
839 OS << ", trunc to " << MScatter->getMemoryVT();
840
841 auto Signed = MScatter->isIndexSigned() ? "signed" : "unsigned";
842 auto Scaled = MScatter->isIndexScaled() ? "scaled" : "unscaled";
843 OS << ", " << Signed << " " << Scaled << " offset";
844
845 OS << ">";
846 } else if (const MemSDNode *M = dyn_cast<MemSDNode>(this)) {
847 OS << "<";
848 printMemOperand(OS, *M->getMemOperand(), G);
849 if (auto *A = dyn_cast<AtomicSDNode>(M))
850 if (A->getOpcode() == ISD::ATOMIC_LOAD) {
851 bool doExt = true;
852 switch (A->getExtensionType()) {
853 default: doExt = false; break;
854 case ISD::EXTLOAD: OS << ", anyext"; break;
855 case ISD::SEXTLOAD: OS << ", sext"; break;
856 case ISD::ZEXTLOAD: OS << ", zext"; break;
857 }
858 if (doExt)
859 OS << " from " << A->getMemoryVT();
860 }
861 OS << ">";
862 } else if (const BlockAddressSDNode *BA =
863 dyn_cast<BlockAddressSDNode>(this)) {
864 int64_t offset = BA->getOffset();
865 OS << "<";
866 BA->getBlockAddress()->getFunction()->printAsOperand(OS, false);
867 OS << ", ";
868 BA->getBlockAddress()->getBasicBlock()->printAsOperand(OS, false);
869 OS << ">";
870 if (offset > 0)
871 OS << " + " << offset;
872 else
873 OS << " " << offset;
874 if (unsigned int TF = BA->getTargetFlags())
875 OS << " [TF=" << TF << ']';
876 } else if (const AddrSpaceCastSDNode *ASC =
877 dyn_cast<AddrSpaceCastSDNode>(this)) {
878 OS << '['
879 << ASC->getSrcAddressSpace()
880 << " -> "
881 << ASC->getDestAddressSpace()
882 << ']';
883 } else if (const LifetimeSDNode *LN = dyn_cast<LifetimeSDNode>(this)) {
884 if (LN->hasOffset())
885 OS << "<" << LN->getOffset() << " to " << LN->getOffset() + LN->getSize() << ">";
886 } else if (const auto *AA = dyn_cast<AssertAlignSDNode>(this)) {
887 OS << '<' << AA->getAlign().value() << '>';
888 }
889
890 if (VerboseDAGDumping) {
891 if (unsigned Order = getIROrder())
892 OS << " [ORD=" << Order << ']';
893
894 if (getNodeId() != -1)
895 OS << " [ID=" << getNodeId() << ']';
896 if (!(isa<ConstantSDNode>(this) || (isa<ConstantFPSDNode>(this))))
897 OS << " # D:" << isDivergent();
898
899 if (G && !G->GetDbgValues(this).empty()) {
900 OS << " [NoOfDbgValues=" << G->GetDbgValues(this).size() << ']';
901 for (SDDbgValue *Dbg : G->GetDbgValues(this))
902 if (!Dbg->isInvalidated())
903 Dbg->print(OS);
904 } else if (getHasDebugValue())
905 OS << " [NoOfDbgValues>0]";
906
907 if (const auto *MD = G ? G->getPCSections(this) : nullptr) {
908 OS << " [pcsections ";
909 MD->printAsOperand(OS, G->getMachineFunction().getFunction().getParent());
910 OS << ']';
911 }
912
913 if (MDNode *MMRA = G ? G->getMMRAMetadata(this) : nullptr) {
914 OS << " [mmra ";
915 MMRA->printAsOperand(OS,
916 G->getMachineFunction().getFunction().getParent());
917 OS << ']';
918 }
919 }
920}
921
923 OS << " DbgVal(Order=" << getOrder() << ')';
924 if (isInvalidated())
925 OS << "(Invalidated)";
926 if (isEmitted())
927 OS << "(Emitted)";
928 OS << "(";
929 bool Comma = false;
930 for (const SDDbgOperand &Op : getLocationOps()) {
931 if (Comma)
932 OS << ", ";
933 switch (Op.getKind()) {
935 if (Op.getSDNode())
936 OS << "SDNODE=" << PrintNodeId(*Op.getSDNode()) << ':' << Op.getResNo();
937 else
938 OS << "SDNODE";
939 break;
941 OS << "CONST";
942 break;
944 OS << "FRAMEIX=" << Op.getFrameIx();
945 break;
947 OS << "VREG=" << Op.getVReg();
948 break;
949 }
950 Comma = true;
951 }
952 OS << ")";
953 if (isIndirect()) OS << "(Indirect)";
954 if (isVariadic())
955 OS << "(Variadic)";
956 OS << ":\"" << Var->getName() << '"';
957#ifndef NDEBUG
958 if (Expr->getNumElements())
959 Expr->dump();
960#endif
961}
962
963#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
965 if (isInvalidated())
966 return;
967 print(dbgs());
968 dbgs() << "\n";
969}
970#endif
971
972/// Return true if this node is so simple that we should just print it inline
973/// if it appears as an operand.
974static bool shouldPrintInline(const SDNode &Node, const SelectionDAG *G) {
975 // Avoid lots of cluttering when inline printing nodes with associated
976 // DbgValues in verbose mode.
977 if (VerboseDAGDumping && G && !G->GetDbgValues(&Node).empty())
978 return false;
979 if (Node.getOpcode() == ISD::EntryToken)
980 return false;
981 return Node.getNumOperands() == 0;
982}
983
984#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
985static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) {
986 for (const SDValue &Op : N->op_values()) {
987 if (shouldPrintInline(*Op.getNode(), G))
988 continue;
989 if (Op.getNode()->hasOneUse())
990 DumpNodes(Op.getNode(), indent+2, G);
991 }
992
993 dbgs().indent(indent);
994 N->dump(G);
995}
996
998 dbgs() << "SelectionDAG has " << AllNodes.size() << " nodes:\n";
999
1000 for (const SDNode &N : allnodes()) {
1001 if (!N.hasOneUse() && &N != getRoot().getNode() &&
1002 (!shouldPrintInline(N, this) || N.use_empty()))
1003 DumpNodes(&N, 2, this);
1004 }
1005
1006 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this);
1007 dbgs() << "\n";
1008
1009 if (VerboseDAGDumping) {
1010 if (DbgBegin() != DbgEnd())
1011 dbgs() << "SDDbgValues:\n";
1012 for (auto *Dbg : make_range(DbgBegin(), DbgEnd()))
1013 Dbg->dump();
1015 dbgs() << "Byval SDDbgValues:\n";
1016 for (auto *Dbg : make_range(ByvalParmDbgBegin(), ByvalParmDbgEnd()))
1017 Dbg->dump();
1018 }
1019 dbgs() << "\n";
1020}
1021#endif
1022
1024 OS << PrintNodeId(*this) << ": ";
1025 print_types(OS, G);
1026 OS << " = " << getOperationName(G);
1027 print_details(OS, G);
1028}
1029
1031 const SDValue Value) {
1032 if (!Value.getNode()) {
1033 OS << "<null>";
1034 return false;
1035 }
1036
1037 if (shouldPrintInline(*Value.getNode(), G)) {
1038 OS << Value->getOperationName(G) << ':';
1039 Value->print_types(OS, G);
1040 Value->print_details(OS, G);
1041 return true;
1042 }
1043
1044 OS << PrintNodeId(*Value.getNode());
1045 if (unsigned RN = Value.getResNo())
1046 OS << ':' << RN;
1047 return false;
1048}
1049
1050#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
1052
1053static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent,
1054 const SelectionDAG *G, VisitedSDNodeSet &once) {
1055 if (!once.insert(N).second) // If we've been here before, return now.
1056 return;
1057
1058 // Dump the current SDNode, but don't end the line yet.
1059 OS.indent(indent);
1060 N->printr(OS, G);
1061
1062 // Having printed this SDNode, walk the children:
1063 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
1064 if (i) OS << ",";
1065 OS << " ";
1066
1067 const SDValue Op = N->getOperand(i);
1068 bool printedInline = printOperand(OS, G, Op);
1069 if (printedInline)
1070 once.insert(Op.getNode());
1071 }
1072
1073 OS << "\n";
1074
1075 // Dump children that have grandchildren on their own line(s).
1076 for (const SDValue &Op : N->op_values())
1077 DumpNodesr(OS, Op.getNode(), indent+2, G, once);
1078}
1079
1081 VisitedSDNodeSet once;
1082 DumpNodesr(dbgs(), this, 0, nullptr, once);
1083}
1084
1086 VisitedSDNodeSet once;
1087 DumpNodesr(dbgs(), this, 0, G, once);
1088}
1089#endif
1090
1092 const SelectionDAG *G, unsigned depth,
1093 unsigned indent) {
1094 if (depth == 0)
1095 return;
1096
1097 OS.indent(indent);
1098
1099 N->print(OS, G);
1100
1101 for (const SDValue &Op : N->op_values()) {
1102 // Don't follow chain operands.
1103 if (Op.getValueType() == MVT::Other)
1104 continue;
1105 OS << '\n';
1106 printrWithDepthHelper(OS, Op.getNode(), G, depth - 1, indent + 2);
1107 }
1108}
1109
1111 unsigned depth) const {
1112 printrWithDepthHelper(OS, this, G, depth, 0);
1113}
1114
1116 // Don't print impossibly deep things.
1117 printrWithDepth(OS, G, 10);
1118}
1119
1120#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
1122void SDNode::dumprWithDepth(const SelectionDAG *G, unsigned depth) const {
1123 printrWithDepth(dbgs(), G, depth);
1124}
1125
1127 // Don't print impossibly deep things.
1128 dumprWithDepth(G, 10);
1129}
1130#endif
1131
1133 printr(OS, G);
1134 // Under VerboseDAGDumping divergence will be printed always.
1136 OS << " # D:1";
1137 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
1138 if (i) OS << ", "; else OS << " ";
1140 }
1141 if (DebugLoc DL = getDebugLoc()) {
1142 OS << ", ";
1143 DL.print(OS);
1144 }
1145}
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
This file declares a class to represent arbitrary precision floating point values and provide a varie...
This file implements a class to represent arbitrary precision integral constant values and operations...
@ Scaled
static GCRegistry::Add< ErlangGC > A("erlang", "erlang-compatible garbage collector")
#define LLVM_DUMP_METHOD
Mark debug helper function definitions like dump() that should not be stripped from debug builds.
Definition: Compiler.h:537
This file contains the declarations for the subclasses of Constant, which represent the different fla...
static bool hasNoInfs(const TargetOptions &Options, SDValue N)
Returns the sub type a function will return at a given Idx Should correspond to the result type of an ExtractValue instruction executed with just that one unsigned Idx
std::string Name
const HexagonInstrInfo * TII
static bool hasNoSignedWrap(BinaryOperator &I)
static bool hasNoUnsignedWrap(BinaryOperator &I)
#define G(x, y, z)
Definition: MD5.cpp:56
This file declares the MachineConstantPool class which is an abstract constant pool to keep track of ...
raw_pwrite_stream & OS
static Printable PrintNodeId(const SDNode &Node)
static cl::opt< bool > VerboseDAGDumping("dag-dump-verbose", cl::Hidden, cl::desc("Display more information when dumping selection " "DAG nodes."))
static bool printOperand(raw_ostream &OS, const SelectionDAG *G, const SDValue Value)
static bool shouldPrintInline(const SDNode &Node, const SelectionDAG *G)
Return true if this node is so simple that we should just print it inline if it appears as an operand...
static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent, const SelectionDAG *G, VisitedSDNodeSet &once)
static void printMemOperand(raw_ostream &OS, const MachineMemOperand &MMO, const MachineFunction *MF, const Module *M, const MachineFrameInfo *MFI, const TargetInstrInfo *TII, LLVMContext &Ctx)
static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G)
static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N, const SelectionDAG *G, unsigned depth, unsigned indent)
This file defines the SmallPtrSet class.
This file contains some functions that are useful when dealing with strings.
This file describes how to lower LLVM code to machine code.
unsigned getNumElements() const
StringRef getName() const
This class represents an Operation in the Expression.
A debug info location.
Definition: DebugLoc.h:33
Module * getParent()
Get the module that this global value is contained inside of...
Definition: GlobalValue.h:655
This is an important class for using LLVM in a threaded context.
Definition: LLVMContext.h:67
This SDNode is used for LIFETIME_START/LIFETIME_END values, which indicate the offet and size that ar...
This class is used to represent ISD::LOAD nodes.
Metadata node.
Definition: Metadata.h:1067
void print(raw_ostream &OS, const SlotIndexes *=nullptr, bool IsStandalone=true) const
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted.
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
Function & getFunction()
Return the LLVM function that this machine code represents.
A description of a memory reference used in the backend.
void print(raw_ostream &OS, ModuleSlotTracker &MST, SmallVectorImpl< StringRef > &SSNs, const LLVMContext &Context, const MachineFrameInfo *MFI, const TargetInstrInfo *TII) const
Support for operator<<.
An SDNode that represents everything that will be needed to construct a MachineInstr.
This class is used to represent an MLOAD node.
This class is used to represent an MSTORE node.
This is an abstract virtual class for memory operations.
void dump() const
User-friendly dump.
Definition: AsmWriter.cpp:5276
Manage lifetime of a slot tracker for printing IR.
void incorporateFunction(const Function &F)
Incorporate the given function.
Definition: AsmWriter.cpp:899
A Module instance is used to store all the information related to an LLVM module.
Definition: Module.h:65
Simple wrapper around std::function<void(raw_ostream&)>.
Definition: Printable.h:38
Holds the information for a single machine location through SDISel; either an SDNode,...
@ VREG
Value is a virtual register.
@ FRAMEIX
Value is contents of a stack location.
@ SDNODE
Value is the result of an expression.
@ CONST
Value is a constant.
Holds the information from a dbg_value node through SDISel.
bool isEmitted() const
LLVM_DUMP_METHOD void print(raw_ostream &OS) const
unsigned getOrder() const
Returns the SDNodeOrder.
LLVM_DUMP_METHOD void dump() const
bool isInvalidated() const
ArrayRef< SDDbgOperand > getLocationOps() const
bool isIndirect() const
Returns whether this is an indirect value.
bool isVariadic() const
Represents one node in the SelectionDAG.
bool isMachineOpcode() const
Test if this node has a post-isel opcode, directly corresponding to a MachineInstr opcode.
void dumprFull(const SelectionDAG *G=nullptr) const
printrFull to dbgs().
int getNodeId() const
Return the unique node id.
void dump() const
Dump this node, for debugging.
unsigned getOpcode() const
Return the SelectionDAG opcode value for this node.
bool isDivergent() const
static const char * getIndexedModeName(ISD::MemIndexedMode AM)
unsigned getIROrder() const
Return the node ordering.
bool getHasDebugValue() const
void dumpr() const
Dump (recursively) this node and its use-def subgraph.
SDNodeFlags getFlags() const
std::string getOperationName(const SelectionDAG *G=nullptr) const
Return the opcode of this operation for printing.
void printrFull(raw_ostream &O, const SelectionDAG *G=nullptr) const
Print a SelectionDAG node and all children down to the leaves.
void printr(raw_ostream &OS, const SelectionDAG *G=nullptr) const
uint64_t getAsZExtVal() const
Helper method returns the zero-extended integer value of a ConstantSDNode.
unsigned getNumValues() const
Return the number of values defined/returned by this operator.
unsigned getNumOperands() const
Return the number of values used by this operation.
unsigned getMachineOpcode() const
This may only be called if isMachineOpcode returns true.
const SDValue & getOperand(unsigned Num) const
void print(raw_ostream &OS, const SelectionDAG *G=nullptr) const
const DebugLoc & getDebugLoc() const
Return the source location info.
void printrWithDepth(raw_ostream &O, const SelectionDAG *G=nullptr, unsigned depth=100) const
Print a SelectionDAG node and children up to depth "depth." The given SelectionDAG allows target-spec...
void dumprWithDepth(const SelectionDAG *G=nullptr, unsigned depth=100) const
printrWithDepth to dbgs().
EVT getValueType(unsigned ResNo) const
Return the type of a specified result.
void print_details(raw_ostream &OS, const SelectionDAG *G) const
void print_types(raw_ostream &OS, const SelectionDAG *G) const
Unlike LLVM values, Selection DAG nodes may return multiple values as the result of a computation.
This is used to represent a portion of an LLVM function in a low-level Data Dependence DAG representa...
Definition: SelectionDAG.h:225
const SDValue & getRoot() const
Return the root tag of the SelectionDAG.
Definition: SelectionDAG.h:552
SDDbgInfo::DbgIterator ByvalParmDbgEnd() const
SDDbgInfo::DbgIterator ByvalParmDbgBegin() const
SDDbgInfo::DbgIterator DbgEnd() const
SDDbgInfo::DbgIterator DbgBegin() const
iterator_range< allnodes_iterator > allnodes()
Definition: SelectionDAG.h:544
SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, ArrayRef< SDUse > Ops)
Gets or creates the specified node.
This SDNode is used to implement the code generator support for the llvm IR shufflevector instruction...
std::pair< iterator, bool > insert(PtrType Ptr)
Inserts Ptr if and only if there is no element in the container equal to Ptr.
Definition: SmallPtrSet.h:342
SmallPtrSet - This class implements a set which is optimized for holding SmallSize or less elements.
Definition: SmallPtrSet.h:427
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
Definition: SmallVector.h:1209
An SDNode that holds an arbitrary LLVM IR Value.
This class is used to represent ISD::STORE nodes.
std::string str() const
str - Get the contents as an std::string.
Definition: StringRef.h:223
Completely target-dependent object reference.
TargetInstrInfo - Interface to description of machine instruction set.
TargetIntrinsicInfo - Interface to description of machine instruction set.
This class defines information used to lower LLVM code to legal SelectionDAG operators that the targe...
virtual const char * getTargetNodeName(unsigned Opcode) const
This method returns the name of a target specific DAG node.
This class is used to represent EVT's, which are used to parameterize some operations.
LLVM Value Representation.
Definition: Value.h:74
StringRef getName() const
Return a constant reference to the value's name.
Definition: Value.cpp:309
This class implements an extremely fast bulk output stream that can only output to a stream.
Definition: raw_ostream.h:52
raw_ostream & indent(unsigned NumSpaces)
indent - Insert 'NumSpaces' spaces.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
@ SETCC
SetCC operator - This evaluates to a true value iff the condition is true.
Definition: ISDOpcodes.h:751
@ MERGE_VALUES
MERGE_VALUES - This node takes multiple discrete operands and returns them all as its individual resu...
Definition: ISDOpcodes.h:237
@ STACKRESTORE
STACKRESTORE has two operands, an input chain and a pointer to restore to it returns an output chain.
Definition: ISDOpcodes.h:1133
@ STACKSAVE
STACKSAVE - STACKSAVE has one operand, an input chain.
Definition: ISDOpcodes.h:1129
@ CTLZ_ZERO_UNDEF
Definition: ISDOpcodes.h:724
@ TargetConstantPool
Definition: ISDOpcodes.h:168
@ CONVERGENCECTRL_ANCHOR
Definition: ISDOpcodes.h:1397
@ MDNODE_SDNODE
MDNODE_SDNODE - This is a node that holdes an MDNode*, which is used to reference metadata in the IR.
Definition: ISDOpcodes.h:1178
@ STRICT_FSETCC
STRICT_FSETCC/STRICT_FSETCCS - Constrained versions of SETCC, used for floating-point operands only.
Definition: ISDOpcodes.h:477
@ DELETED_NODE
DELETED_NODE - This is an illegal value that is used to catch errors.
Definition: ISDOpcodes.h:44
@ SET_FPENV
Sets the current floating-point environment.
Definition: ISDOpcodes.h:1005
@ VECREDUCE_SEQ_FADD
Generic reduction nodes.
Definition: ISDOpcodes.h:1346
@ VECREDUCE_SMIN
Definition: ISDOpcodes.h:1377
@ EH_SJLJ_LONGJMP
OUTCHAIN = EH_SJLJ_LONGJMP(INCHAIN, buffer) This corresponds to the eh.sjlj.longjmp intrinsic.
Definition: ISDOpcodes.h:147
@ FGETSIGN
INT = FGETSIGN(FP) - Return the sign bit of the specified floating point value as an integer 0/1 valu...
Definition: ISDOpcodes.h:498
@ SMUL_LOHI
SMUL_LOHI/UMUL_LOHI - Multiply two integers of type iN, producing a signed/unsigned value of type i[2...
Definition: ISDOpcodes.h:251
@ ATOMIC_LOAD_NAND
Definition: ISDOpcodes.h:1276
@ INSERT_SUBVECTOR
INSERT_SUBVECTOR(VECTOR1, VECTOR2, IDX) - Returns a vector with VECTOR2 inserted into VECTOR1.
Definition: ISDOpcodes.h:560
@ JUMP_TABLE_DEBUG_INFO
JUMP_TABLE_DEBUG_INFO - Jumptable debug info.
Definition: ISDOpcodes.h:1067
@ BSWAP
Byte Swap and Counting operators.
Definition: ISDOpcodes.h:715
@ SMULFIX
RESULT = [US]MULFIX(LHS, RHS, SCALE) - Perform fixed point multiplication on 2 integers with the same...
Definition: ISDOpcodes.h:368
@ VAEND
VAEND, VASTART - VAEND and VASTART have three operands: an input chain, pointer, and a SRCVALUE.
Definition: ISDOpcodes.h:1162
@ TargetBlockAddress
Definition: ISDOpcodes.h:170
@ ConstantFP
Definition: ISDOpcodes.h:77
@ ATOMIC_LOAD_MAX
Definition: ISDOpcodes.h:1278
@ ATOMIC_STORE
OUTCHAIN = ATOMIC_STORE(INCHAIN, ptr, val) This corresponds to "store atomic" instruction.
Definition: ISDOpcodes.h:1248
@ STRICT_FCEIL
Definition: ISDOpcodes.h:427
@ ATOMIC_LOAD_UMIN
Definition: ISDOpcodes.h:1279
@ ADDC
Carry-setting nodes for multiple precision addition and subtraction.
Definition: ISDOpcodes.h:270
@ FRAME_TO_ARGS_OFFSET
FRAME_TO_ARGS_OFFSET - This node represents offset from frame pointer to first (possible) on-stack ar...
Definition: ISDOpcodes.h:124
@ RESET_FPENV
Set floating-point environment to default state.
Definition: ISDOpcodes.h:1009
@ FMAD
FMAD - Perform a * b + c, while getting the same result as the separately rounded operations.
Definition: ISDOpcodes.h:488
@ FMAXNUM_IEEE
Definition: ISDOpcodes.h:986
@ ADD
Simple integer binary arithmetic operators.
Definition: ISDOpcodes.h:240
@ LOAD
LOAD and STORE have token chains as their first operand, then the same operands as an LLVM load/store...
Definition: ISDOpcodes.h:1038
@ SMULFIXSAT
Same as the corresponding unsaturated fixed point instructions, but the result is clamped between the...
Definition: ISDOpcodes.h:374
@ SET_FPMODE
Sets the current dynamic floating-point control modes.
Definition: ISDOpcodes.h:1028
@ ANY_EXTEND
ANY_EXTEND - Used for integer types. The high bits are undefined.
Definition: ISDOpcodes.h:784
@ FMA
FMA - Perform a * b + c with no intermediate rounding step.
Definition: ISDOpcodes.h:484
@ INTRINSIC_VOID
OUTCHAIN = INTRINSIC_VOID(INCHAIN, INTRINSICID, arg1, arg2, ...) This node represents a target intrin...
Definition: ISDOpcodes.h:199
@ RETURNADDR
Definition: ISDOpcodes.h:95
@ EH_SJLJ_SETUP_DISPATCH
OUTCHAIN = EH_SJLJ_SETUP_DISPATCH(INCHAIN) The target initializes the dispatch table here.
Definition: ISDOpcodes.h:151
@ GlobalAddress
Definition: ISDOpcodes.h:78
@ ATOMIC_CMP_SWAP_WITH_SUCCESS
Val, Success, OUTCHAIN = ATOMIC_CMP_SWAP_WITH_SUCCESS(INCHAIN, ptr, cmp, swap) N.b.
Definition: ISDOpcodes.h:1261
@ STRICT_FMINIMUM
Definition: ISDOpcodes.h:437
@ SINT_TO_FP
[SU]INT_TO_FP - These operators convert integers (whose interpreted sign depends on the first letter)...
Definition: ISDOpcodes.h:791
@ CONCAT_VECTORS
CONCAT_VECTORS(VECTOR0, VECTOR1, ...) - Given a number of values of vector type with the same length ...
Definition: ISDOpcodes.h:544
@ VECREDUCE_FMAX
FMIN/FMAX nodes can have flags, for NaN/NoNaN variants.
Definition: ISDOpcodes.h:1362
@ FADD
Simple binary floating point operators.
Definition: ISDOpcodes.h:391
@ VECREDUCE_FMAXIMUM
FMINIMUM/FMAXIMUM nodes propatate NaNs and signed zeroes using the llvm.minimum and llvm....
Definition: ISDOpcodes.h:1366
@ ABS
ABS - Determine the unsigned absolute value of a signed integer value of the same bitwidth.
Definition: ISDOpcodes.h:689
@ MEMBARRIER
MEMBARRIER - Compiler barrier only; generate a no-op.
Definition: ISDOpcodes.h:1235
@ ATOMIC_FENCE
OUTCHAIN = ATOMIC_FENCE(INCHAIN, ordering, scope) This corresponds to the fence instruction.
Definition: ISDOpcodes.h:1240
@ RESET_FPMODE
Sets default dynamic floating-point control modes.
Definition: ISDOpcodes.h:1032
@ SIGN_EXTEND_VECTOR_INREG
SIGN_EXTEND_VECTOR_INREG(Vector) - This operator represents an in-register sign-extension of the low ...
Definition: ISDOpcodes.h:821
@ SDIVREM
SDIVREM/UDIVREM - Divide two integers and produce both a quotient and remainder result.
Definition: ISDOpcodes.h:256
@ VECREDUCE_SMAX
Definition: ISDOpcodes.h:1376
@ STRICT_FSETCCS
Definition: ISDOpcodes.h:478
@ FP16_TO_FP
FP16_TO_FP, FP_TO_FP16 - These operators are used to perform promotions and truncation for half-preci...
Definition: ISDOpcodes.h:914
@ STRICT_FLOG2
Definition: ISDOpcodes.h:422
@ FPTRUNC_ROUND
Definition: ISDOpcodes.h:481
@ ATOMIC_LOAD_OR
Definition: ISDOpcodes.h:1274
@ BITCAST
BITCAST - This operator converts between integer, vector and FP values, as if the value was stored to...
Definition: ISDOpcodes.h:904
@ BUILD_PAIR
BUILD_PAIR - This is the opposite of EXTRACT_ELEMENT in some ways.
Definition: ISDOpcodes.h:230
@ ATOMIC_LOAD_XOR
Definition: ISDOpcodes.h:1275
@ INIT_TRAMPOLINE
INIT_TRAMPOLINE - This corresponds to the init_trampoline intrinsic.
Definition: ISDOpcodes.h:1206
@ FLDEXP
FLDEXP - ldexp, inspired by libm (op0 * 2**op1).
Definition: ISDOpcodes.h:940
@ SDIVFIX
RESULT = [US]DIVFIX(LHS, RHS, SCALE) - Perform fixed point division on 2 integers with the same width...
Definition: ISDOpcodes.h:381
@ STRICT_FSQRT
Constrained versions of libm-equivalent floating point intrinsics.
Definition: ISDOpcodes.h:412
@ BUILTIN_OP_END
BUILTIN_OP_END - This must be the last enum value in this list.
Definition: ISDOpcodes.h:1412
@ ATOMIC_LOAD_FADD
Definition: ISDOpcodes.h:1281
@ GlobalTLSAddress
Definition: ISDOpcodes.h:79
@ SRCVALUE
SRCVALUE - This is a node type that holds a Value* that is used to make reference to a value in the L...
Definition: ISDOpcodes.h:1174
@ FrameIndex
Definition: ISDOpcodes.h:80
@ EH_LABEL
EH_LABEL - Represents a label in mid basic block used to track locations needed for debug and excepti...
Definition: ISDOpcodes.h:1109
@ EH_RETURN
OUTCHAIN = EH_RETURN(INCHAIN, OFFSET, HANDLER) - This node represents 'eh_return' gcc dwarf builtin,...
Definition: ISDOpcodes.h:135
@ ANNOTATION_LABEL
ANNOTATION_LABEL - Represents a mid basic block label used by annotations.
Definition: ISDOpcodes.h:1115
@ SET_ROUNDING
Set rounding mode.
Definition: ISDOpcodes.h:886
@ CONVERGENCECTRL_GLUE
Definition: ISDOpcodes.h:1403
@ SIGN_EXTEND
Conversion operators.
Definition: ISDOpcodes.h:775
@ AVGCEILS
AVGCEILS/AVGCEILU - Rounding averaging add - Add two integers using an integer of type i[N+2],...
Definition: ISDOpcodes.h:663
@ STRICT_UINT_TO_FP
Definition: ISDOpcodes.h:451
@ SCALAR_TO_VECTOR
SCALAR_TO_VECTOR(VAL) - This represents the operation of loading a scalar value into element 0 of the...
Definition: ISDOpcodes.h:621
@ PREALLOCATED_SETUP
Definition: ISDOpcodes.h:1167
@ READSTEADYCOUNTER
READSTEADYCOUNTER - This corresponds to the readfixedcounter intrinsic.
Definition: ISDOpcodes.h:1195
@ ADDROFRETURNADDR
ADDROFRETURNADDR - Represents the llvm.addressofreturnaddress intrinsic.
Definition: ISDOpcodes.h:101
@ TargetExternalSymbol
Definition: ISDOpcodes.h:169
@ CONVERGENCECTRL_ENTRY
Definition: ISDOpcodes.h:1398
@ BR
Control flow instructions. These all have token chains.
Definition: ISDOpcodes.h:1054
@ VECREDUCE_FADD
These reductions have relaxed evaluation order semantics, and have a single vector operand.
Definition: ISDOpcodes.h:1359
@ CTTZ_ZERO_UNDEF
Bit counting operators with an undefined result for zero inputs.
Definition: ISDOpcodes.h:723
@ TargetJumpTable
Definition: ISDOpcodes.h:167
@ TargetIndex
TargetIndex - Like a constant pool entry, but with completely target-dependent semantics.
Definition: ISDOpcodes.h:177
@ WRITE_REGISTER
Definition: ISDOpcodes.h:119
@ PREFETCH
PREFETCH - This corresponds to a prefetch intrinsic.
Definition: ISDOpcodes.h:1228
@ VECREDUCE_FMIN
Definition: ISDOpcodes.h:1363
@ FSINCOS
FSINCOS - Compute both fsin and fcos as a single operation.
Definition: ISDOpcodes.h:995
@ SETCCCARRY
Like SetCC, ops #0 and #1 are the LHS and RHS operands to compare, but op #2 is a boolean indicating ...
Definition: ISDOpcodes.h:759
@ STRICT_LROUND
Definition: ISDOpcodes.h:432
@ FNEG
Perform various unary floating-point operations inspired by libm.
Definition: ISDOpcodes.h:931
@ BR_CC
BR_CC - Conditional branch.
Definition: ISDOpcodes.h:1084
@ SSUBO
Same for subtraction.
Definition: ISDOpcodes.h:328
@ ATOMIC_LOAD_MIN
Definition: ISDOpcodes.h:1277
@ PREALLOCATED_ARG
Definition: ISDOpcodes.h:1170
@ BRIND
BRIND - Indirect branch.
Definition: ISDOpcodes.h:1059
@ BR_JT
BR_JT - Jumptable branch.
Definition: ISDOpcodes.h:1063
@ GC_TRANSITION_START
GC_TRANSITION_START/GC_TRANSITION_END - These operators mark the beginning and end of GC transition s...
Definition: ISDOpcodes.h:1320
@ VECTOR_INTERLEAVE
VECTOR_INTERLEAVE(VEC1, VEC2) - Returns two vectors with all input and output vectors having the same...
Definition: ISDOpcodes.h:587
@ STEP_VECTOR
STEP_VECTOR(IMM) - Returns a scalable vector whose lanes are comprised of a linear sequence of unsign...
Definition: ISDOpcodes.h:647
@ FCANONICALIZE
Returns platform specific canonical encoding of a floating point number.
Definition: ISDOpcodes.h:501
@ IS_FPCLASS
Performs a check of floating point class property, defined by IEEE-754.
Definition: ISDOpcodes.h:508
@ SSUBSAT
RESULT = [US]SUBSAT(LHS, RHS) - Perform saturation subtraction on 2 integers with the same bit width ...
Definition: ISDOpcodes.h:350
@ SELECT
Select(COND, TRUEVAL, FALSEVAL).
Definition: ISDOpcodes.h:728
@ STRICT_FPOWI
Definition: ISDOpcodes.h:414
@ ATOMIC_LOAD
Val, OUTCHAIN = ATOMIC_LOAD(INCHAIN, ptr) This corresponds to "load atomic" instruction.
Definition: ISDOpcodes.h:1244
@ UNDEF
UNDEF - An undefined node.
Definition: ISDOpcodes.h:212
@ VECREDUCE_UMAX
Definition: ISDOpcodes.h:1378
@ RegisterMask
Definition: ISDOpcodes.h:75
@ EXTRACT_ELEMENT
EXTRACT_ELEMENT - This is used to get the lower or upper (determined by a Constant,...
Definition: ISDOpcodes.h:223
@ SPLAT_VECTOR
SPLAT_VECTOR(VAL) - Returns a vector with the scalar value VAL duplicated in all lanes.
Definition: ISDOpcodes.h:628
@ AssertAlign
AssertAlign - These nodes record if a register contains a value that has a known alignment and the tr...
Definition: ISDOpcodes.h:68
@ VACOPY
VACOPY - VACOPY has 5 operands: an input chain, a destination pointer, a source pointer,...
Definition: ISDOpcodes.h:1158
@ BasicBlock
Various leaf nodes.
Definition: ISDOpcodes.h:71
@ CopyFromReg
CopyFromReg - This node indicates that the input value is a virtual or physical register that is defi...
Definition: ISDOpcodes.h:209
@ SADDO
RESULT, BOOL = [SU]ADDO(LHS, RHS) - Overflow-aware nodes for addition.
Definition: ISDOpcodes.h:324
@ TargetGlobalAddress
TargetGlobalAddress - Like GlobalAddress, but the DAG does no folding or anything else with this node...
Definition: ISDOpcodes.h:164
@ STRICT_FTRUNC
Definition: ISDOpcodes.h:431
@ VECREDUCE_ADD
Integer reductions may have a result type larger than the vector element type.
Definition: ISDOpcodes.h:1371
@ GET_ROUNDING
Returns current rounding mode: -1 Undefined 0 Round to 0 1 Round to nearest, ties to even 2 Round to ...
Definition: ISDOpcodes.h:881
@ STRICT_FP_TO_FP16
Definition: ISDOpcodes.h:917
@ MULHU
MULHU/MULHS - Multiply high - Multiply two integers of type iN, producing an unsigned/signed value of...
Definition: ISDOpcodes.h:652
@ CLEANUPRET
CLEANUPRET - Represents a return from a cleanup block funclet.
Definition: ISDOpcodes.h:1124
@ GET_FPMODE
Reads the current dynamic floating-point control modes.
Definition: ISDOpcodes.h:1023
@ STRICT_FP16_TO_FP
Definition: ISDOpcodes.h:916
@ GET_FPENV
Gets the current floating-point environment.
Definition: ISDOpcodes.h:1000
@ SHL
Shift and rotation operations.
Definition: ISDOpcodes.h:706
@ ATOMIC_LOAD_CLR
Definition: ISDOpcodes.h:1273
@ VECTOR_SHUFFLE
VECTOR_SHUFFLE(VEC1, VEC2) - Returns a vector, of the same type as VEC1/VEC2.
Definition: ISDOpcodes.h:601
@ ATOMIC_LOAD_AND
Definition: ISDOpcodes.h:1272
@ EXTRACT_SUBVECTOR
EXTRACT_SUBVECTOR(VECTOR, IDX) - Returns a subvector from VECTOR.
Definition: ISDOpcodes.h:574
@ FMINNUM_IEEE
FMINNUM_IEEE/FMAXNUM_IEEE - Perform floating-point minimumNumber or maximumNumber on two values,...
Definition: ISDOpcodes.h:985
@ STRICT_FMAXIMUM
Definition: ISDOpcodes.h:436
@ EntryToken
EntryToken - This is the marker used to indicate the start of a region.
Definition: ISDOpcodes.h:47
@ STRICT_FMAXNUM
Definition: ISDOpcodes.h:425
@ READ_REGISTER
READ_REGISTER, WRITE_REGISTER - This node represents llvm.register on the DAG, which implements the n...
Definition: ISDOpcodes.h:118
@ EXTRACT_VECTOR_ELT
EXTRACT_VECTOR_ELT(VECTOR, IDX) - Returns a single element from VECTOR identified by the (potentially...
Definition: ISDOpcodes.h:536
@ CopyToReg
CopyToReg - This node has three operands: a chain, a register number to set to this value,...
Definition: ISDOpcodes.h:203
@ ZERO_EXTEND
ZERO_EXTEND - Used for integer types, zeroing the new bits.
Definition: ISDOpcodes.h:781
@ TargetConstantFP
Definition: ISDOpcodes.h:159
@ DEBUGTRAP
DEBUGTRAP - Trap intended to get the attention of a debugger.
Definition: ISDOpcodes.h:1218
@ FP_TO_UINT_SAT
Definition: ISDOpcodes.h:857
@ STRICT_FMINNUM
Definition: ISDOpcodes.h:426
@ SELECT_CC
Select with condition operator - This selects between a true value and a false value (ops #2 and #3) ...
Definition: ISDOpcodes.h:743
@ VSCALE
VSCALE(IMM) - Returns the runtime scaling factor used to calculate the number of elements within a sc...
Definition: ISDOpcodes.h:1336
@ ATOMIC_CMP_SWAP
Val, OUTCHAIN = ATOMIC_CMP_SWAP(INCHAIN, ptr, cmp, swap) For double-word atomic operations: ValLo,...
Definition: ISDOpcodes.h:1255
@ ATOMIC_LOAD_UMAX
Definition: ISDOpcodes.h:1280
@ LOCAL_RECOVER
LOCAL_RECOVER - Represents the llvm.localrecover intrinsic.
Definition: ISDOpcodes.h:114
@ FMINNUM
FMINNUM/FMAXNUM - Perform floating-point minimum or maximum on two values.
Definition: ISDOpcodes.h:972
@ UBSANTRAP
UBSANTRAP - Trap with an immediate describing the kind of sanitizer failure.
Definition: ISDOpcodes.h:1222
@ SSHLSAT
RESULT = [US]SHLSAT(LHS, RHS) - Perform saturation left shift.
Definition: ISDOpcodes.h:360
@ SMULO
Same for multiplication.
Definition: ISDOpcodes.h:332
@ DYNAMIC_STACKALLOC
DYNAMIC_STACKALLOC - Allocate some number of bytes on the stack aligned to a specified boundary.
Definition: ISDOpcodes.h:1048
@ STRICT_LRINT
Definition: ISDOpcodes.h:434
@ TargetFrameIndex
Definition: ISDOpcodes.h:166
@ ConstantPool
Definition: ISDOpcodes.h:82
@ ANY_EXTEND_VECTOR_INREG
ANY_EXTEND_VECTOR_INREG(Vector) - This operator represents an in-register any-extension of the low la...
Definition: ISDOpcodes.h:810
@ SIGN_EXTEND_INREG
SIGN_EXTEND_INREG - This operator atomically performs a SHL/SRA pair to sign extend a small value in ...
Definition: ISDOpcodes.h:799
@ SMIN
[US]{MIN/MAX} - Binary minimum or maximum of signed or unsigned integers.
Definition: ISDOpcodes.h:675
@ VECTOR_REVERSE
VECTOR_REVERSE(VECTOR) - Returns a vector, of the same type as VECTOR, whose elements are shuffled us...
Definition: ISDOpcodes.h:592
@ LIFETIME_START
This corresponds to the llvm.lifetime.
Definition: ISDOpcodes.h:1311
@ SDIVFIXSAT
Same as the corresponding unsaturated fixed point instructions, but the result is clamped between the...
Definition: ISDOpcodes.h:387
@ FP_EXTEND
X = FP_EXTEND(Y) - Extend a smaller FP type into a larger FP type.
Definition: ISDOpcodes.h:889
@ GLOBAL_OFFSET_TABLE
The address of the GOT.
Definition: ISDOpcodes.h:87
@ STRICT_FROUND
Definition: ISDOpcodes.h:429
@ VSELECT
Select with a vector condition (op #0) and two vector operands (ops #1 and #2), returning a vector re...
Definition: ISDOpcodes.h:737
@ UADDO_CARRY
Carry-using nodes for multiple precision addition and subtraction.
Definition: ISDOpcodes.h:304
@ STRICT_SINT_TO_FP
STRICT_[US]INT_TO_FP - Convert a signed or unsigned integer to a floating point value.
Definition: ISDOpcodes.h:450
@ HANDLENODE
HANDLENODE node - Used as a handle for various purposes.
Definition: ISDOpcodes.h:1198
@ STRICT_BF16_TO_FP
Definition: ISDOpcodes.h:925
@ VECREDUCE_UMIN
Definition: ISDOpcodes.h:1379
@ PCMARKER
PCMARKER - This corresponds to the pcmarker intrinsic.
Definition: ISDOpcodes.h:1181
@ STRICT_FFLOOR
Definition: ISDOpcodes.h:428
@ STRICT_FROUNDEVEN
Definition: ISDOpcodes.h:430
@ INLINEASM_BR
INLINEASM_BR - Branching version of inline asm. Used by asm-goto.
Definition: ISDOpcodes.h:1104
@ EH_DWARF_CFA
EH_DWARF_CFA - This node represents the pointer to the DWARF Canonical Frame Address (CFA),...
Definition: ISDOpcodes.h:129
@ BF16_TO_FP
BF16_TO_FP, FP_TO_BF16 - These operators are used to perform promotions and truncation for bfloat16.
Definition: ISDOpcodes.h:923
@ FRAMEADDR
FRAMEADDR, RETURNADDR - These nodes represent llvm.frameaddress and llvm.returnaddress on the DAG.
Definition: ISDOpcodes.h:94
@ ATOMIC_LOAD_UDEC_WRAP
Definition: ISDOpcodes.h:1286
@ ATOMIC_LOAD_ADD
Definition: ISDOpcodes.h:1270
@ STRICT_FP_TO_UINT
Definition: ISDOpcodes.h:444
@ STRICT_FP_ROUND
X = STRICT_FP_ROUND(Y, TRUNC) - Rounding 'Y' from a larger floating point type down to the precision ...
Definition: ISDOpcodes.h:466
@ STRICT_FP_TO_SINT
STRICT_FP_TO_[US]INT - Convert a floating point value to a signed or unsigned integer.
Definition: ISDOpcodes.h:443
@ FMINIMUM
FMINIMUM/FMAXIMUM - NaN-propagating minimum/maximum that also treat -0.0 as less than 0....
Definition: ISDOpcodes.h:991
@ ATOMIC_LOAD_SUB
Definition: ISDOpcodes.h:1271
@ FP_TO_SINT
FP_TO_[US]INT - Convert a floating point value to a signed or unsigned integer.
Definition: ISDOpcodes.h:837
@ READCYCLECOUNTER
READCYCLECOUNTER - This corresponds to the readcyclecounter intrinsic.
Definition: ISDOpcodes.h:1189
@ TargetConstant
TargetConstant* - Like Constant*, but the DAG does not do any folding, simplification,...
Definition: ISDOpcodes.h:158
@ STRICT_FP_EXTEND
X = STRICT_FP_EXTEND(Y) - Extend a smaller FP type into a larger FP type.
Definition: ISDOpcodes.h:471
@ AND
Bitwise operators - logical and, logical or, logical xor.
Definition: ISDOpcodes.h:681
@ TRAP
TRAP - Trapping instruction.
Definition: ISDOpcodes.h:1215
@ INTRINSIC_WO_CHAIN
RESULT = INTRINSIC_WO_CHAIN(INTRINSICID, arg1, arg2, ...) This node represents a target intrinsic fun...
Definition: ISDOpcodes.h:184
@ GET_FPENV_MEM
Gets the current floating-point environment.
Definition: ISDOpcodes.h:1014
@ PSEUDO_PROBE
Pseudo probe for AutoFDO, as a place holder in a basic block to improve the sample counts quality.
Definition: ISDOpcodes.h:1331
@ STRICT_FP_TO_BF16
Definition: ISDOpcodes.h:926
@ CARRY_FALSE
CARRY_FALSE - This node is used when folding other nodes, like ADDC/SUBC, which indicate the carry re...
Definition: ISDOpcodes.h:261
@ AVGFLOORS
AVGFLOORS/AVGFLOORU - Averaging add - Add two integers using an integer of type i[N+1],...
Definition: ISDOpcodes.h:658
@ VECREDUCE_FMUL
Definition: ISDOpcodes.h:1360
@ ADDE
Carry-using nodes for multiple precision addition and subtraction.
Definition: ISDOpcodes.h:280
@ STRICT_FADD
Constrained versions of the binary floating point operators.
Definition: ISDOpcodes.h:401
@ STRICT_FLOG10
Definition: ISDOpcodes.h:421
@ SPLAT_VECTOR_PARTS
SPLAT_VECTOR_PARTS(SCALAR1, SCALAR2, ...) - Returns a vector with the scalar values joined together a...
Definition: ISDOpcodes.h:637
@ INSERT_VECTOR_ELT
INSERT_VECTOR_ELT(VECTOR, VAL, IDX) - Returns VECTOR with the element at IDX replaced with VAL.
Definition: ISDOpcodes.h:525
@ TokenFactor
TokenFactor - This node takes multiple tokens as input and produces a single token result.
Definition: ISDOpcodes.h:52
@ STRICT_LLRINT
Definition: ISDOpcodes.h:435
@ VECTOR_SPLICE
VECTOR_SPLICE(VEC1, VEC2, IMM) - Returns a subvector of the same type as VEC1/VEC2 from CONCAT_VECTOR...
Definition: ISDOpcodes.h:613
@ STRICT_FEXP2
Definition: ISDOpcodes.h:419
@ ATOMIC_SWAP
Val, OUTCHAIN = ATOMIC_SWAP(INCHAIN, ptr, amt) Val, OUTCHAIN = ATOMIC_LOAD_[OpName](INCHAIN,...
Definition: ISDOpcodes.h:1269
@ ExternalSymbol
Definition: ISDOpcodes.h:83
@ FFREXP
FFREXP - frexp, extract fractional and exponent component of a floating-point value.
Definition: ISDOpcodes.h:945
@ FP_ROUND
X = FP_ROUND(Y, TRUNC) - Rounding 'Y' from a larger floating point type down to the precision of the ...
Definition: ISDOpcodes.h:870
@ SPONENTRY
SPONENTRY - Represents the llvm.sponentry intrinsic.
Definition: ISDOpcodes.h:106
@ STRICT_FLDEXP
Definition: ISDOpcodes.h:415
@ STRICT_LLROUND
Definition: ISDOpcodes.h:433
@ CONVERGENCECTRL_LOOP
Definition: ISDOpcodes.h:1399
@ ZERO_EXTEND_VECTOR_INREG
ZERO_EXTEND_VECTOR_INREG(Vector) - This operator represents an in-register zero-extension of the low ...
Definition: ISDOpcodes.h:832
@ ADDRSPACECAST
ADDRSPACECAST - This operator converts between pointers of different address spaces.
Definition: ISDOpcodes.h:908
@ EXPERIMENTAL_VECTOR_HISTOGRAM
Definition: ISDOpcodes.h:1408
@ INLINEASM
INLINEASM - Represents an inline asm block.
Definition: ISDOpcodes.h:1101
@ STRICT_FNEARBYINT
Definition: ISDOpcodes.h:424
@ FP_TO_SINT_SAT
FP_TO_[US]INT_SAT - Convert floating point value in operand 0 to a signed or unsigned scalar integer ...
Definition: ISDOpcodes.h:856
@ VECREDUCE_FMINIMUM
Definition: ISDOpcodes.h:1367
@ EH_SJLJ_SETJMP
RESULT, OUTCHAIN = EH_SJLJ_SETJMP(INCHAIN, buffer) This corresponds to the eh.sjlj....
Definition: ISDOpcodes.h:141
@ TRUNCATE
TRUNCATE - Completely drop the high bits.
Definition: ISDOpcodes.h:787
@ VAARG
VAARG - VAARG has four operands: an input chain, a pointer, a SRCVALUE, and the alignment.
Definition: ISDOpcodes.h:1153
@ BRCOND
BRCOND - Conditional branch.
Definition: ISDOpcodes.h:1077
@ BlockAddress
Definition: ISDOpcodes.h:84
@ VECREDUCE_SEQ_FMUL
Definition: ISDOpcodes.h:1347
@ SHL_PARTS
SHL_PARTS/SRA_PARTS/SRL_PARTS - These operators are used for expanded integer shift operations.
Definition: ISDOpcodes.h:764
@ CATCHRET
CATCHRET - Represents a return from a catch block funclet.
Definition: ISDOpcodes.h:1120
@ GC_TRANSITION_END
Definition: ISDOpcodes.h:1321
@ AssertSext
AssertSext, AssertZext - These nodes record if a register contains a value that has already been zero...
Definition: ISDOpcodes.h:61
@ ATOMIC_LOAD_UINC_WRAP
Definition: ISDOpcodes.h:1285
@ FCOPYSIGN
FCOPYSIGN(X, Y) - Return the value of X with the sign of Y.
Definition: ISDOpcodes.h:494
@ SADDSAT
RESULT = [US]ADDSAT(LHS, RHS) - Perform saturation addition on 2 integers with the same bit width (W)...
Definition: ISDOpcodes.h:341
@ AssertZext
Definition: ISDOpcodes.h:62
@ CALLSEQ_START
CALLSEQ_START/CALLSEQ_END - These operators mark the beginning and end of a call sequence,...
Definition: ISDOpcodes.h:1147
@ STRICT_FRINT
Definition: ISDOpcodes.h:423
@ VECTOR_DEINTERLEAVE
VECTOR_DEINTERLEAVE(VEC1, VEC2) - Returns two vectors with all input and output vectors having the sa...
Definition: ISDOpcodes.h:581
@ GET_DYNAMIC_AREA_OFFSET
GET_DYNAMIC_AREA_OFFSET - get offset from native SP to the address of the most recent dynamic alloca.
Definition: ISDOpcodes.h:1327
@ SET_FPENV_MEM
Sets the current floating point environment.
Definition: ISDOpcodes.h:1019
@ ADJUST_TRAMPOLINE
ADJUST_TRAMPOLINE - This corresponds to the adjust_trampoline intrinsic.
Definition: ISDOpcodes.h:1212
@ SADDO_CARRY
Carry-using overflow-aware nodes for multiple precision addition and subtraction.
Definition: ISDOpcodes.h:314
@ INTRINSIC_W_CHAIN
RESULT,OUTCHAIN = INTRINSIC_W_CHAIN(INCHAIN, INTRINSICID, arg1, ...) This node represents a target in...
Definition: ISDOpcodes.h:192
@ TargetGlobalTLSAddress
Definition: ISDOpcodes.h:165
@ BUILD_VECTOR
BUILD_VECTOR(ELT0, ELT1, ELT2, ELT3,...) - Return a fixed-width vector with the specified,...
Definition: ISDOpcodes.h:516
MemIndexedMode
MemIndexedMode enum - This enum defines the load / store indexed addressing modes.
Definition: ISDOpcodes.h:1484
StringRef getBaseName(ID id)
Return the LLVM name for an intrinsic, without encoded types for overloading, such as "llvm....
Definition: Function.cpp:1022
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
iterator_range< T > make_range(T x, T y)
Convenience function for iterating over sub-ranges.
decltype(auto) get(const PointerIntPair< PointerTy, IntBits, IntType, PtrTraits, Info > &Pair)
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition: Debug.cpp:163
Printable printReg(Register Reg, const TargetRegisterInfo *TRI=nullptr, unsigned SubIdx=0, const MachineRegisterInfo *MRI=nullptr)
Prints virtual and physical registers with or without a TRI instance.
#define N
static const fltSemantics & IEEEsingle() LLVM_READNONE
Definition: APFloat.cpp:249
static const fltSemantics & IEEEdouble() LLVM_READNONE
Definition: APFloat.cpp:250
std::string getEVTString() const
This function returns value type as a string, e.g. "i32".
Definition: ValueTypes.cpp:161