LLVM  17.0.0git
SelectionDAGDumper.cpp
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1 //===- SelectionDAGDumper.cpp - Implement SelectionDAG::dump() ------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This implements the SelectionDAG::dump method and friends.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #include "SDNodeDbgValue.h"
14 #include "llvm/ADT/APFloat.h"
15 #include "llvm/ADT/APInt.h"
16 #include "llvm/ADT/SmallPtrSet.h"
17 #include "llvm/ADT/StringExtras.h"
18 #include "llvm/CodeGen/ISDOpcodes.h"
19 #include "llvm/CodeGen/MachineBasicBlock.h"
20 #include "llvm/CodeGen/MachineConstantPool.h"
21 #include "llvm/CodeGen/MachineMemOperand.h"
22 #include "llvm/CodeGen/SelectionDAG.h"
23 #include "llvm/CodeGen/SelectionDAGNodes.h"
24 #include "llvm/CodeGen/TargetInstrInfo.h"
25 #include "llvm/CodeGen/TargetLowering.h"
26 #include "llvm/CodeGen/TargetRegisterInfo.h"
27 #include "llvm/CodeGen/TargetSubtargetInfo.h"
28 #include "llvm/CodeGen/ValueTypes.h"
29 #include "llvm/Config/llvm-config.h"
30 #include "llvm/IR/BasicBlock.h"
31 #include "llvm/IR/Constants.h"
32 #include "llvm/IR/DebugInfoMetadata.h"
33 #include "llvm/IR/DebugLoc.h"
34 #include "llvm/IR/Function.h"
35 #include "llvm/IR/Intrinsics.h"
36 #include "llvm/IR/ModuleSlotTracker.h"
37 #include "llvm/IR/Value.h"
38 #include "llvm/Support/Casting.h"
39 #include "llvm/Support/CommandLine.h"
40 #include "llvm/Support/Compiler.h"
41 #include "llvm/Support/Debug.h"
42 #include "llvm/Support/ErrorHandling.h"
43 #include "llvm/Support/MachineValueType.h"
44 #include "llvm/Support/Printable.h"
45 #include "llvm/Support/raw_ostream.h"
46 #include "llvm/Target/TargetIntrinsicInfo.h"
47 #include "llvm/Target/TargetMachine.h"
48 #include <cstdint>
49 #include <iterator>
50 
51 using namespace llvm;
52 
53 static cl::opt<bool>
54 VerboseDAGDumping("dag-dump-verbose", cl::Hidden,
55  cl::desc("Display more information when dumping selection "
56  "DAG nodes."));
57 
58 std::string SDNode::getOperationName(const SelectionDAG *G) const {
59  switch (getOpcode()) {
60  default:
61  if (getOpcode() < ISD::BUILTIN_OP_END)
62  return "<<Unknown DAG Node>>";
63  if (isMachineOpcode()) {
64  if (G)
65  if (const TargetInstrInfo *TII = G->getSubtarget().getInstrInfo())
66  if (getMachineOpcode() < TII->getNumOpcodes())
67  return std::string(TII->getName(getMachineOpcode()));
68  return "<<Unknown Machine Node #" + utostr(getOpcode()) + ">>";
69  }
70  if (G) {
71  const TargetLowering &TLI = G->getTargetLoweringInfo();
72  const char *Name = TLI.getTargetNodeName(getOpcode());
73  if (Name) return Name;
74  return "<<Unknown Target Node #" + utostr(getOpcode()) + ">>";
75  }
76  return "<<Unknown Node #" + utostr(getOpcode()) + ">>";
77 
78 #ifndef NDEBUG
79  case ISD::DELETED_NODE: return "<<Deleted Node!>>";
80 #endif
81  case ISD::PREFETCH: return "Prefetch";
82  case ISD::MEMBARRIER: return "MemBarrier";
83  case ISD::ATOMIC_FENCE: return "AtomicFence";
84  case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap";
85  case ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS: return "AtomicCmpSwapWithSuccess";
86  case ISD::ATOMIC_SWAP: return "AtomicSwap";
87  case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd";
88  case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub";
89  case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd";
90  case ISD::ATOMIC_LOAD_CLR: return "AtomicLoadClr";
91  case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr";
92  case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor";
93  case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand";
94  case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin";
95  case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax";
96  case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin";
97  case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax";
98  case ISD::ATOMIC_LOAD_FADD: return "AtomicLoadFAdd";
99  case ISD::ATOMIC_LOAD_UINC_WRAP:
100  return "AtomicLoadUIncWrap";
101  case ISD::ATOMIC_LOAD_UDEC_WRAP:
102  return "AtomicLoadUDecWrap";
103  case ISD::ATOMIC_LOAD: return "AtomicLoad";
104  case ISD::ATOMIC_STORE: return "AtomicStore";
105  case ISD::PCMARKER: return "PCMarker";
106  case ISD::READCYCLECOUNTER: return "ReadCycleCounter";
107  case ISD::SRCVALUE: return "SrcValue";
108  case ISD::MDNODE_SDNODE: return "MDNode";
109  case ISD::EntryToken: return "EntryToken";
110  case ISD::TokenFactor: return "TokenFactor";
111  case ISD::AssertSext: return "AssertSext";
112  case ISD::AssertZext: return "AssertZext";
113  case ISD::AssertAlign: return "AssertAlign";
114 
115  case ISD::BasicBlock: return "BasicBlock";
116  case ISD::VALUETYPE: return "ValueType";
117  case ISD::Register: return "Register";
118  case ISD::RegisterMask: return "RegisterMask";
119  case ISD::Constant:
120  if (cast<ConstantSDNode>(this)->isOpaque())
121  return "OpaqueConstant";
122  return "Constant";
123  case ISD::ConstantFP: return "ConstantFP";
124  case ISD::GlobalAddress: return "GlobalAddress";
125  case ISD::GlobalTLSAddress: return "GlobalTLSAddress";
126  case ISD::FrameIndex: return "FrameIndex";
127  case ISD::JumpTable: return "JumpTable";
128  case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE";
129  case ISD::RETURNADDR: return "RETURNADDR";
130  case ISD::ADDROFRETURNADDR: return "ADDROFRETURNADDR";
131  case ISD::FRAMEADDR: return "FRAMEADDR";
132  case ISD::SPONENTRY: return "SPONENTRY";
133  case ISD::LOCAL_RECOVER: return "LOCAL_RECOVER";
134  case ISD::READ_REGISTER: return "READ_REGISTER";
135  case ISD::WRITE_REGISTER: return "WRITE_REGISTER";
136  case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET";
137  case ISD::EH_DWARF_CFA: return "EH_DWARF_CFA";
138  case ISD::EH_RETURN: return "EH_RETURN";
139  case ISD::EH_SJLJ_SETJMP: return "EH_SJLJ_SETJMP";
140  case ISD::EH_SJLJ_LONGJMP: return "EH_SJLJ_LONGJMP";
141  case ISD::EH_SJLJ_SETUP_DISPATCH: return "EH_SJLJ_SETUP_DISPATCH";
142  case ISD::ConstantPool: return "ConstantPool";
143  case ISD::TargetIndex: return "TargetIndex";
144  case ISD::ExternalSymbol: return "ExternalSymbol";
145  case ISD::BlockAddress: return "BlockAddress";
146  case ISD::INTRINSIC_WO_CHAIN:
147  case ISD::INTRINSIC_VOID:
148  case ISD::INTRINSIC_W_CHAIN: {
149  unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1;
150  unsigned IID = cast<ConstantSDNode>(getOperand(OpNo))->getZExtValue();
151  if (IID < Intrinsic::num_intrinsics)
152  return Intrinsic::getBaseName((Intrinsic::ID)IID).str();
153  if (!G)
154  return "Unknown intrinsic";
155  if (const TargetIntrinsicInfo *TII = G->getTarget().getIntrinsicInfo())
156  return TII->getName(IID);
157  llvm_unreachable("Invalid intrinsic ID");
158  }
159 
160  case ISD::BUILD_VECTOR: return "BUILD_VECTOR";
161  case ISD::TargetConstant:
162  if (cast<ConstantSDNode>(this)->isOpaque())
163  return "OpaqueTargetConstant";
164  return "TargetConstant";
165  case ISD::TargetConstantFP: return "TargetConstantFP";
166  case ISD::TargetGlobalAddress: return "TargetGlobalAddress";
167  case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress";
168  case ISD::TargetFrameIndex: return "TargetFrameIndex";
169  case ISD::TargetJumpTable: return "TargetJumpTable";
170  case ISD::TargetConstantPool: return "TargetConstantPool";
171  case ISD::TargetExternalSymbol: return "TargetExternalSymbol";
172  case ISD::MCSymbol: return "MCSymbol";
173  case ISD::TargetBlockAddress: return "TargetBlockAddress";
174 
175  case ISD::CopyToReg: return "CopyToReg";
176  case ISD::CopyFromReg: return "CopyFromReg";
177  case ISD::UNDEF: return "undef";
178  case ISD::VSCALE: return "vscale";
179  case ISD::MERGE_VALUES: return "merge_values";
180  case ISD::INLINEASM: return "inlineasm";
181  case ISD::INLINEASM_BR: return "inlineasm_br";
182  case ISD::EH_LABEL: return "eh_label";
183  case ISD::ANNOTATION_LABEL: return "annotation_label";
184  case ISD::HANDLENODE: return "handlenode";
185 
186  // Unary operators
187  case ISD::FABS: return "fabs";
188  case ISD::FMINNUM: return "fminnum";
189  case ISD::STRICT_FMINNUM: return "strict_fminnum";
190  case ISD::FMAXNUM: return "fmaxnum";
191  case ISD::STRICT_FMAXNUM: return "strict_fmaxnum";
192  case ISD::FMINNUM_IEEE: return "fminnum_ieee";
193  case ISD::FMAXNUM_IEEE: return "fmaxnum_ieee";
194  case ISD::FMINIMUM: return "fminimum";
195  case ISD::STRICT_FMINIMUM: return "strict_fminimum";
196  case ISD::FMAXIMUM: return "fmaximum";
197  case ISD::STRICT_FMAXIMUM: return "strict_fmaximum";
198  case ISD::FNEG: return "fneg";
199  case ISD::FSQRT: return "fsqrt";
200  case ISD::STRICT_FSQRT: return "strict_fsqrt";
201  case ISD::FCBRT: return "fcbrt";
202  case ISD::FSIN: return "fsin";
203  case ISD::STRICT_FSIN: return "strict_fsin";
204  case ISD::FCOS: return "fcos";
205  case ISD::STRICT_FCOS: return "strict_fcos";
206  case ISD::FSINCOS: return "fsincos";
207  case ISD::FTRUNC: return "ftrunc";
208  case ISD::STRICT_FTRUNC: return "strict_ftrunc";
209  case ISD::FFLOOR: return "ffloor";
210  case ISD::STRICT_FFLOOR: return "strict_ffloor";
211  case ISD::FCEIL: return "fceil";
212  case ISD::STRICT_FCEIL: return "strict_fceil";
213  case ISD::FRINT: return "frint";
214  case ISD::STRICT_FRINT: return "strict_frint";
215  case ISD::FNEARBYINT: return "fnearbyint";
216  case ISD::STRICT_FNEARBYINT: return "strict_fnearbyint";
217  case ISD::FROUND: return "fround";
218  case ISD::STRICT_FROUND: return "strict_fround";
219  case ISD::FROUNDEVEN: return "froundeven";
220  case ISD::STRICT_FROUNDEVEN: return "strict_froundeven";
221  case ISD::FEXP: return "fexp";
222  case ISD::STRICT_FEXP: return "strict_fexp";
223  case ISD::FEXP2: return "fexp2";
224  case ISD::STRICT_FEXP2: return "strict_fexp2";
225  case ISD::FLOG: return "flog";
226  case ISD::STRICT_FLOG: return "strict_flog";
227  case ISD::FLOG2: return "flog2";
228  case ISD::STRICT_FLOG2: return "strict_flog2";
229  case ISD::FLOG10: return "flog10";
230  case ISD::STRICT_FLOG10: return "strict_flog10";
231 
232  // Binary operators
233  case ISD::ADD: return "add";
234  case ISD::SUB: return "sub";
235  case ISD::MUL: return "mul";
236  case ISD::MULHU: return "mulhu";
237  case ISD::MULHS: return "mulhs";
238  case ISD::AVGFLOORU: return "avgflooru";
239  case ISD::AVGFLOORS: return "avgfloors";
240  case ISD::AVGCEILU: return "avgceilu";
241  case ISD::AVGCEILS: return "avgceils";
242  case ISD::ABDS: return "abds";
243  case ISD::ABDU: return "abdu";
244  case ISD::SDIV: return "sdiv";
245  case ISD::UDIV: return "udiv";
246  case ISD::SREM: return "srem";
247  case ISD::UREM: return "urem";
248  case ISD::SMUL_LOHI: return "smul_lohi";
249  case ISD::UMUL_LOHI: return "umul_lohi";
250  case ISD::SDIVREM: return "sdivrem";
251  case ISD::UDIVREM: return "udivrem";
252  case ISD::AND: return "and";
253  case ISD::OR: return "or";
254  case ISD::XOR: return "xor";
255  case ISD::SHL: return "shl";
256  case ISD::SRA: return "sra";
257  case ISD::SRL: return "srl";
258  case ISD::ROTL: return "rotl";
259  case ISD::ROTR: return "rotr";
260  case ISD::FSHL: return "fshl";
261  case ISD::FSHR: return "fshr";
262  case ISD::FADD: return "fadd";
263  case ISD::STRICT_FADD: return "strict_fadd";
264  case ISD::FSUB: return "fsub";
265  case ISD::STRICT_FSUB: return "strict_fsub";
266  case ISD::FMUL: return "fmul";
267  case ISD::STRICT_FMUL: return "strict_fmul";
268  case ISD::FDIV: return "fdiv";
269  case ISD::STRICT_FDIV: return "strict_fdiv";
270  case ISD::FMA: return "fma";
271  case ISD::STRICT_FMA: return "strict_fma";
272  case ISD::FMAD: return "fmad";
273  case ISD::FREM: return "frem";
274  case ISD::STRICT_FREM: return "strict_frem";
275  case ISD::FCOPYSIGN: return "fcopysign";
276  case ISD::FGETSIGN: return "fgetsign";
277  case ISD::FCANONICALIZE: return "fcanonicalize";
278  case ISD::IS_FPCLASS: return "is_fpclass";
279  case ISD::FPOW: return "fpow";
280  case ISD::STRICT_FPOW: return "strict_fpow";
281  case ISD::SMIN: return "smin";
282  case ISD::SMAX: return "smax";
283  case ISD::UMIN: return "umin";
284  case ISD::UMAX: return "umax";
285 
286  case ISD::FPOWI: return "fpowi";
287  case ISD::STRICT_FPOWI: return "strict_fpowi";
288  case ISD::SETCC: return "setcc";
289  case ISD::SETCCCARRY: return "setcccarry";
290  case ISD::STRICT_FSETCC: return "strict_fsetcc";
291  case ISD::STRICT_FSETCCS: return "strict_fsetccs";
292  case ISD::SELECT: return "select";
293  case ISD::VSELECT: return "vselect";
294  case ISD::SELECT_CC: return "select_cc";
295  case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt";
296  case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt";
297  case ISD::CONCAT_VECTORS: return "concat_vectors";
298  case ISD::INSERT_SUBVECTOR: return "insert_subvector";
299  case ISD::EXTRACT_SUBVECTOR: return "extract_subvector";
300  case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector";
301  case ISD::VECTOR_SHUFFLE: return "vector_shuffle";
302  case ISD::VECTOR_SPLICE: return "vector_splice";
303  case ISD::SPLAT_VECTOR: return "splat_vector";
304  case ISD::SPLAT_VECTOR_PARTS: return "splat_vector_parts";
305  case ISD::VECTOR_REVERSE: return "vector_reverse";
306  case ISD::STEP_VECTOR: return "step_vector";
307  case ISD::CARRY_FALSE: return "carry_false";
308  case ISD::ADDC: return "addc";
309  case ISD::ADDE: return "adde";
310  case ISD::ADDCARRY: return "addcarry";
311  case ISD::SADDO_CARRY: return "saddo_carry";
312  case ISD::SADDO: return "saddo";
313  case ISD::UADDO: return "uaddo";
314  case ISD::SSUBO: return "ssubo";
315  case ISD::USUBO: return "usubo";
316  case ISD::SMULO: return "smulo";
317  case ISD::UMULO: return "umulo";
318  case ISD::SUBC: return "subc";
319  case ISD::SUBE: return "sube";
320  case ISD::SUBCARRY: return "subcarry";
321  case ISD::SSUBO_CARRY: return "ssubo_carry";
322  case ISD::SHL_PARTS: return "shl_parts";
323  case ISD::SRA_PARTS: return "sra_parts";
324  case ISD::SRL_PARTS: return "srl_parts";
325 
326  case ISD::SADDSAT: return "saddsat";
327  case ISD::UADDSAT: return "uaddsat";
328  case ISD::SSUBSAT: return "ssubsat";
329  case ISD::USUBSAT: return "usubsat";
330  case ISD::SSHLSAT: return "sshlsat";
331  case ISD::USHLSAT: return "ushlsat";
332 
333  case ISD::SMULFIX: return "smulfix";
334  case ISD::SMULFIXSAT: return "smulfixsat";
335  case ISD::UMULFIX: return "umulfix";
336  case ISD::UMULFIXSAT: return "umulfixsat";
337 
338  case ISD::SDIVFIX: return "sdivfix";
339  case ISD::SDIVFIXSAT: return "sdivfixsat";
340  case ISD::UDIVFIX: return "udivfix";
341  case ISD::UDIVFIXSAT: return "udivfixsat";
342 
343  // Conversion operators.
344  case ISD::SIGN_EXTEND: return "sign_extend";
345  case ISD::ZERO_EXTEND: return "zero_extend";
346  case ISD::ANY_EXTEND: return "any_extend";
347  case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg";
348  case ISD::ANY_EXTEND_VECTOR_INREG: return "any_extend_vector_inreg";
349  case ISD::SIGN_EXTEND_VECTOR_INREG: return "sign_extend_vector_inreg";
350  case ISD::ZERO_EXTEND_VECTOR_INREG: return "zero_extend_vector_inreg";
351  case ISD::TRUNCATE: return "truncate";
352  case ISD::FP_ROUND: return "fp_round";
353  case ISD::STRICT_FP_ROUND: return "strict_fp_round";
354  case ISD::FP_EXTEND: return "fp_extend";
355  case ISD::STRICT_FP_EXTEND: return "strict_fp_extend";
356 
357  case ISD::SINT_TO_FP: return "sint_to_fp";
358  case ISD::STRICT_SINT_TO_FP: return "strict_sint_to_fp";
359  case ISD::UINT_TO_FP: return "uint_to_fp";
360  case ISD::STRICT_UINT_TO_FP: return "strict_uint_to_fp";
361  case ISD::FP_TO_SINT: return "fp_to_sint";
362  case ISD::STRICT_FP_TO_SINT: return "strict_fp_to_sint";
363  case ISD::FP_TO_UINT: return "fp_to_uint";
364  case ISD::STRICT_FP_TO_UINT: return "strict_fp_to_uint";
365  case ISD::FP_TO_SINT_SAT: return "fp_to_sint_sat";
366  case ISD::FP_TO_UINT_SAT: return "fp_to_uint_sat";
367  case ISD::BITCAST: return "bitcast";
368  case ISD::ADDRSPACECAST: return "addrspacecast";
369  case ISD::FP16_TO_FP: return "fp16_to_fp";
370  case ISD::STRICT_FP16_TO_FP: return "strict_fp16_to_fp";
371  case ISD::FP_TO_FP16: return "fp_to_fp16";
372  case ISD::STRICT_FP_TO_FP16: return "strict_fp_to_fp16";
373  case ISD::BF16_TO_FP: return "bf16_to_fp";
374  case ISD::FP_TO_BF16: return "fp_to_bf16";
375  case ISD::LROUND: return "lround";
376  case ISD::STRICT_LROUND: return "strict_lround";
377  case ISD::LLROUND: return "llround";
378  case ISD::STRICT_LLROUND: return "strict_llround";
379  case ISD::LRINT: return "lrint";
380  case ISD::STRICT_LRINT: return "strict_lrint";
381  case ISD::LLRINT: return "llrint";
382  case ISD::STRICT_LLRINT: return "strict_llrint";
383 
384  // Control flow instructions
385  case ISD::BR: return "br";
386  case ISD::BRIND: return "brind";
387  case ISD::BR_JT: return "br_jt";
388  case ISD::BRCOND: return "brcond";
389  case ISD::BR_CC: return "br_cc";
390  case ISD::CALLSEQ_START: return "callseq_start";
391  case ISD::CALLSEQ_END: return "callseq_end";
392 
393  // EH instructions
394  case ISD::CATCHRET: return "catchret";
395  case ISD::CLEANUPRET: return "cleanupret";
396 
397  // Other operators
398  case ISD::LOAD: return "load";
399  case ISD::STORE: return "store";
400  case ISD::MLOAD: return "masked_load";
401  case ISD::MSTORE: return "masked_store";
402  case ISD::MGATHER: return "masked_gather";
403  case ISD::MSCATTER: return "masked_scatter";
404  case ISD::VAARG: return "vaarg";
405  case ISD::VACOPY: return "vacopy";
406  case ISD::VAEND: return "vaend";
407  case ISD::VASTART: return "vastart";
408  case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc";
409  case ISD::EXTRACT_ELEMENT: return "extract_element";
410  case ISD::BUILD_PAIR: return "build_pair";
411  case ISD::STACKSAVE: return "stacksave";
412  case ISD::STACKRESTORE: return "stackrestore";
413  case ISD::TRAP: return "trap";
414  case ISD::DEBUGTRAP: return "debugtrap";
415  case ISD::UBSANTRAP: return "ubsantrap";
416  case ISD::LIFETIME_START: return "lifetime.start";
417  case ISD::LIFETIME_END: return "lifetime.end";
418  case ISD::PSEUDO_PROBE:
419  return "pseudoprobe";
420  case ISD::GC_TRANSITION_START: return "gc_transition.start";
421  case ISD::GC_TRANSITION_END: return "gc_transition.end";
422  case ISD::GET_DYNAMIC_AREA_OFFSET: return "get.dynamic.area.offset";
423  case ISD::FREEZE: return "freeze";
424  case ISD::PREALLOCATED_SETUP:
425  return "call_setup";
426  case ISD::PREALLOCATED_ARG:
427  return "call_alloc";
428 
429  // Floating point environment manipulation
430  case ISD::GET_ROUNDING: return "get_rounding";
431  case ISD::SET_ROUNDING: return "set_rounding";
432 
433  // Bit manipulation
434  case ISD::ABS: return "abs";
435  case ISD::BITREVERSE: return "bitreverse";
436  case ISD::BSWAP: return "bswap";
437  case ISD::CTPOP: return "ctpop";
438  case ISD::CTTZ: return "cttz";
439  case ISD::CTTZ_ZERO_UNDEF: return "cttz_zero_undef";
440  case ISD::CTLZ: return "ctlz";
441  case ISD::CTLZ_ZERO_UNDEF: return "ctlz_zero_undef";
442  case ISD::PARITY: return "parity";
443 
444  // Trampolines
445  case ISD::INIT_TRAMPOLINE: return "init_trampoline";
446  case ISD::ADJUST_TRAMPOLINE: return "adjust_trampoline";
447 
448  case ISD::CONDCODE:
449  switch (cast<CondCodeSDNode>(this)->get()) {
450  default: llvm_unreachable("Unknown setcc condition!");
451  case ISD::SETOEQ: return "setoeq";
452  case ISD::SETOGT: return "setogt";
453  case ISD::SETOGE: return "setoge";
454  case ISD::SETOLT: return "setolt";
455  case ISD::SETOLE: return "setole";
456  case ISD::SETONE: return "setone";
457 
458  case ISD::SETO: return "seto";
459  case ISD::SETUO: return "setuo";
460  case ISD::SETUEQ: return "setueq";
461  case ISD::SETUGT: return "setugt";
462  case ISD::SETUGE: return "setuge";
463  case ISD::SETULT: return "setult";
464  case ISD::SETULE: return "setule";
465  case ISD::SETUNE: return "setune";
466 
467  case ISD::SETEQ: return "seteq";
468  case ISD::SETGT: return "setgt";
469  case ISD::SETGE: return "setge";
470  case ISD::SETLT: return "setlt";
471  case ISD::SETLE: return "setle";
472  case ISD::SETNE: return "setne";
473 
474  case ISD::SETTRUE: return "settrue";
475  case ISD::SETTRUE2: return "settrue2";
476  case ISD::SETFALSE: return "setfalse";
477  case ISD::SETFALSE2: return "setfalse2";
478  }
479  case ISD::VECREDUCE_FADD: return "vecreduce_fadd";
480  case ISD::VECREDUCE_SEQ_FADD: return "vecreduce_seq_fadd";
481  case ISD::VECREDUCE_FMUL: return "vecreduce_fmul";
482  case ISD::VECREDUCE_SEQ_FMUL: return "vecreduce_seq_fmul";
483  case ISD::VECREDUCE_ADD: return "vecreduce_add";
484  case ISD::VECREDUCE_MUL: return "vecreduce_mul";
485  case ISD::VECREDUCE_AND: return "vecreduce_and";
486  case ISD::VECREDUCE_OR: return "vecreduce_or";
487  case ISD::VECREDUCE_XOR: return "vecreduce_xor";
488  case ISD::VECREDUCE_SMAX: return "vecreduce_smax";
489  case ISD::VECREDUCE_SMIN: return "vecreduce_smin";
490  case ISD::VECREDUCE_UMAX: return "vecreduce_umax";
491  case ISD::VECREDUCE_UMIN: return "vecreduce_umin";
492  case ISD::VECREDUCE_FMAX: return "vecreduce_fmax";
493  case ISD::VECREDUCE_FMIN: return "vecreduce_fmin";
494  case ISD::STACKMAP:
495  return "stackmap";
496  case ISD::PATCHPOINT:
497  return "patchpoint";
498 
499  // Vector Predication
500 #define BEGIN_REGISTER_VP_SDNODE(SDID, LEGALARG, NAME, ...) \
501  case ISD::SDID: \
502  return #NAME;
503 #include "llvm/IR/VPIntrinsics.def"
504  }
505 }
506 
507 const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) {
508  switch (AM) {
509  default: return "";
510  case ISD::PRE_INC: return "<pre-inc>";
511  case ISD::PRE_DEC: return "<pre-dec>";
512  case ISD::POST_INC: return "<post-inc>";
513  case ISD::POST_DEC: return "<post-dec>";
514  }
515 }
516 
517 static Printable PrintNodeId(const SDNode &Node) {
518  return Printable([&Node](raw_ostream &OS) {
519 #ifndef NDEBUG
520  OS << 't' << Node.PersistentId;
521 #else
522  OS << (const void*)&Node;
523 #endif
524  });
525 }
526 
527 // Print the MMO with more information from the SelectionDAG.
528 static void printMemOperand(raw_ostream &OS, const MachineMemOperand &MMO,
529  const MachineFunction *MF, const Module *M,
530  const MachineFrameInfo *MFI,
531  const TargetInstrInfo *TII, LLVMContext &Ctx) {
532  ModuleSlotTracker MST(M);
533  if (MF)
534  MST.incorporateFunction(MF->getFunction());
535  SmallVector<StringRef, 0> SSNs;
536  MMO.print(OS, MST, SSNs, Ctx, MFI, TII);
537 }
538 
539 static void printMemOperand(raw_ostream &OS, const MachineMemOperand &MMO,
540  const SelectionDAG *G) {
541  if (G) {
542  const MachineFunction *MF = &G->getMachineFunction();
543  return printMemOperand(OS, MMO, MF, MF->getFunction().getParent(),
544  &MF->getFrameInfo(),
545  G->getSubtarget().getInstrInfo(), *G->getContext());
546  }
547 
548  LLVMContext Ctx;
549  return printMemOperand(OS, MMO, /*MF=*/nullptr, /*M=*/nullptr,
550  /*MFI=*/nullptr, /*TII=*/nullptr, Ctx);
551 }
552 
553 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
554 LLVM_DUMP_METHOD void SDNode::dump() const { dump(nullptr); }
555 
556 LLVM_DUMP_METHOD void SDNode::dump(const SelectionDAG *G) const {
557  print(dbgs(), G);
558  dbgs() << '\n';
559 }
560 #endif
561 
562 void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const {
563  for (unsigned i = 0, e = getNumValues(); i != e; ++i) {
564  if (i) OS << ",";
565  if (getValueType(i) == MVT::Other)
566  OS << "ch";
567  else
568  OS << getValueType(i).getEVTString();
569  }
570 }
571 
572 void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const {
573  if (getFlags().hasNoUnsignedWrap())
574  OS << " nuw";
575 
576  if (getFlags().hasNoSignedWrap())
577  OS << " nsw";
578 
579  if (getFlags().hasExact())
580  OS << " exact";
581 
582  if (getFlags().hasNoNaNs())
583  OS << " nnan";
584 
585  if (getFlags().hasNoInfs())
586  OS << " ninf";
587 
588  if (getFlags().hasNoSignedZeros())
589  OS << " nsz";
590 
591  if (getFlags().hasAllowReciprocal())
592  OS << " arcp";
593 
594  if (getFlags().hasAllowContract())
595  OS << " contract";
596 
597  if (getFlags().hasApproximateFuncs())
598  OS << " afn";
599 
600  if (getFlags().hasAllowReassociation())
601  OS << " reassoc";
602 
603  if (getFlags().hasNoFPExcept())
604  OS << " nofpexcept";
605 
606  if (const MachineSDNode *MN = dyn_cast<MachineSDNode>(this)) {
607  if (!MN->memoperands_empty()) {
608  OS << "<";
609  OS << "Mem:";
610  for (MachineSDNode::mmo_iterator i = MN->memoperands_begin(),
611  e = MN->memoperands_end(); i != e; ++i) {
612  printMemOperand(OS, **i, G);
613  if (std::next(i) != e)
614  OS << " ";
615  }
616  OS << ">";
617  }
618  } else if (const ShuffleVectorSDNode *SVN =
619  dyn_cast<ShuffleVectorSDNode>(this)) {
620  OS << "<";
621  for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) {
622  int Idx = SVN->getMaskElt(i);
623  if (i) OS << ",";
624  if (Idx < 0)
625  OS << "u";
626  else
627  OS << Idx;
628  }
629  OS << ">";
630  } else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) {
631  OS << '<' << CSDN->getAPIntValue() << '>';
632  } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) {
633  if (&CSDN->getValueAPF().getSemantics() == &APFloat::IEEEsingle())
634  OS << '<' << CSDN->getValueAPF().convertToFloat() << '>';
635  else if (&CSDN->getValueAPF().getSemantics() == &APFloat::IEEEdouble())
636  OS << '<' << CSDN->getValueAPF().convertToDouble() << '>';
637  else {
638  OS << "<APFloat(";
639  CSDN->getValueAPF().bitcastToAPInt().print(OS, false);
640  OS << ")>";
641  }
642  } else if (const GlobalAddressSDNode *GADN =
643  dyn_cast<GlobalAddressSDNode>(this)) {
644  int64_t offset = GADN->getOffset();
645  OS << '<';
646  GADN->getGlobal()->printAsOperand(OS);
647  OS << '>';
648  if (offset > 0)
649  OS << " + " << offset;
650  else
651  OS << " " << offset;
652  if (unsigned int TF = GADN->getTargetFlags())
653  OS << " [TF=" << TF << ']';
654  } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) {
655  OS << "<" << FIDN->getIndex() << ">";
656  } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) {
657  OS << "<" << JTDN->getIndex() << ">";
658  if (unsigned int TF = JTDN->getTargetFlags())
659  OS << " [TF=" << TF << ']';
660  } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){
661  int offset = CP->getOffset();
662  if (CP->isMachineConstantPoolEntry())
663  OS << "<" << *CP->getMachineCPVal() << ">";
664  else
665  OS << "<" << *CP->getConstVal() << ">";
666  if (offset > 0)
667  OS << " + " << offset;
668  else
669  OS << " " << offset;
670  if (unsigned int TF = CP->getTargetFlags())
671  OS << " [TF=" << TF << ']';
672  } else if (const TargetIndexSDNode *TI = dyn_cast<TargetIndexSDNode>(this)) {
673  OS << "<" << TI->getIndex() << '+' << TI->getOffset() << ">";
674  if (unsigned TF = TI->getTargetFlags())
675  OS << " [TF=" << TF << ']';
676  } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) {
677  OS << "<";
678  const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock();
679  if (LBB)
680  OS << LBB->getName() << " ";
681  OS << (const void*)BBDN->getBasicBlock() << ">";
682  } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) {
683  OS << ' ' << printReg(R->getReg(),
684  G ? G->getSubtarget().getRegisterInfo() : nullptr);
685  } else if (const ExternalSymbolSDNode *ES =
686  dyn_cast<ExternalSymbolSDNode>(this)) {
687  OS << "'" << ES->getSymbol() << "'";
688  if (unsigned int TF = ES->getTargetFlags())
689  OS << " [TF=" << TF << ']';
690  } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) {
691  if (M->getValue())
692  OS << "<" << M->getValue() << ">";
693  else
694  OS << "<null>";
695  } else if (const MDNodeSDNode *MD = dyn_cast<MDNodeSDNode>(this)) {
696  if (MD->getMD())
697  OS << "<" << MD->getMD() << ">";
698  else
699  OS << "<null>";
700  } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) {
701  OS << ":" << N->getVT().getEVTString();
702  }
703  else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) {
704  OS << "<";
705 
706  printMemOperand(OS, *LD->getMemOperand(), G);
707 
708  bool doExt = true;
709  switch (LD->getExtensionType()) {
710  default: doExt = false; break;
711  case ISD::EXTLOAD: OS << ", anyext"; break;
712  case ISD::SEXTLOAD: OS << ", sext"; break;
713  case ISD::ZEXTLOAD: OS << ", zext"; break;
714  }
715  if (doExt)
716  OS << " from " << LD->getMemoryVT().getEVTString();
717 
718  const char *AM = getIndexedModeName(LD->getAddressingMode());
719  if (*AM)
720  OS << ", " << AM;
721 
722  OS << ">";
723  } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) {
724  OS << "<";
725  printMemOperand(OS, *ST->getMemOperand(), G);
726 
727  if (ST->isTruncatingStore())
728  OS << ", trunc to " << ST->getMemoryVT().getEVTString();
729 
730  const char *AM = getIndexedModeName(ST->getAddressingMode());
731  if (*AM)
732  OS << ", " << AM;
733 
734  OS << ">";
735  } else if (const MaskedLoadSDNode *MLd = dyn_cast<MaskedLoadSDNode>(this)) {
736  OS << "<";
737 
738  printMemOperand(OS, *MLd->getMemOperand(), G);
739 
740  bool doExt = true;
741  switch (MLd->getExtensionType()) {
742  default: doExt = false; break;
743  case ISD::EXTLOAD: OS << ", anyext"; break;
744  case ISD::SEXTLOAD: OS << ", sext"; break;
745  case ISD::ZEXTLOAD: OS << ", zext"; break;
746  }
747  if (doExt)
748  OS << " from " << MLd->getMemoryVT().getEVTString();
749 
750  const char *AM = getIndexedModeName(MLd->getAddressingMode());
751  if (*AM)
752  OS << ", " << AM;
753 
754  if (MLd->isExpandingLoad())
755  OS << ", expanding";
756 
757  OS << ">";
758  } else if (const MaskedStoreSDNode *MSt = dyn_cast<MaskedStoreSDNode>(this)) {
759  OS << "<";
760  printMemOperand(OS, *MSt->getMemOperand(), G);
761 
762  if (MSt->isTruncatingStore())
763  OS << ", trunc to " << MSt->getMemoryVT().getEVTString();
764 
765  const char *AM = getIndexedModeName(MSt->getAddressingMode());
766  if (*AM)
767  OS << ", " << AM;
768 
769  if (MSt->isCompressingStore())
770  OS << ", compressing";
771 
772  OS << ">";
773  } else if (const auto *MGather = dyn_cast<MaskedGatherSDNode>(this)) {
774  OS << "<";
775  printMemOperand(OS, *MGather->getMemOperand(), G);
776 
777  bool doExt = true;
778  switch (MGather->getExtensionType()) {
779  default: doExt = false; break;
780  case ISD::EXTLOAD: OS << ", anyext"; break;
781  case ISD::SEXTLOAD: OS << ", sext"; break;
782  case ISD::ZEXTLOAD: OS << ", zext"; break;
783  }
784  if (doExt)
785  OS << " from " << MGather->getMemoryVT().getEVTString();
786 
787  auto Signed = MGather->isIndexSigned() ? "signed" : "unsigned";
788  auto Scaled = MGather->isIndexScaled() ? "scaled" : "unscaled";
789  OS << ", " << Signed << " " << Scaled << " offset";
790 
791  OS << ">";
792  } else if (const auto *MScatter = dyn_cast<MaskedScatterSDNode>(this)) {
793  OS << "<";
794  printMemOperand(OS, *MScatter->getMemOperand(), G);
795 
796  if (MScatter->isTruncatingStore())
797  OS << ", trunc to " << MScatter->getMemoryVT().getEVTString();
798 
799  auto Signed = MScatter->isIndexSigned() ? "signed" : "unsigned";
800  auto Scaled = MScatter->isIndexScaled() ? "scaled" : "unscaled";
801  OS << ", " << Signed << " " << Scaled << " offset";
802 
803  OS << ">";
804  } else if (const MemSDNode *M = dyn_cast<MemSDNode>(this)) {
805  OS << "<";
806  printMemOperand(OS, *M->getMemOperand(), G);
807  OS << ">";
808  } else if (const BlockAddressSDNode *BA =
809  dyn_cast<BlockAddressSDNode>(this)) {
810  int64_t offset = BA->getOffset();
811  OS << "<";
812  BA->getBlockAddress()->getFunction()->printAsOperand(OS, false);
813  OS << ", ";
814  BA->getBlockAddress()->getBasicBlock()->printAsOperand(OS, false);
815  OS << ">";
816  if (offset > 0)
817  OS << " + " << offset;
818  else
819  OS << " " << offset;
820  if (unsigned int TF = BA->getTargetFlags())
821  OS << " [TF=" << TF << ']';
822  } else if (const AddrSpaceCastSDNode *ASC =
823  dyn_cast<AddrSpaceCastSDNode>(this)) {
824  OS << '['
825  << ASC->getSrcAddressSpace()
826  << " -> "
827  << ASC->getDestAddressSpace()
828  << ']';
829  } else if (const LifetimeSDNode *LN = dyn_cast<LifetimeSDNode>(this)) {
830  if (LN->hasOffset())
831  OS << "<" << LN->getOffset() << " to " << LN->getOffset() + LN->getSize() << ">";
832  } else if (const auto *AA = dyn_cast<AssertAlignSDNode>(this)) {
833  OS << '<' << AA->getAlign().value() << '>';
834  }
835 
836  if (VerboseDAGDumping) {
837  if (unsigned Order = getIROrder())
838  OS << " [ORD=" << Order << ']';
839 
840  if (getNodeId() != -1)
841  OS << " [ID=" << getNodeId() << ']';
842  if (!(isa<ConstantSDNode>(this) || (isa<ConstantFPSDNode>(this))))
843  OS << " # D:" << isDivergent();
844 
845  if (G && !G->GetDbgValues(this).empty()) {
846  OS << " [NoOfDbgValues=" << G->GetDbgValues(this).size() << ']';
847  for (SDDbgValue *Dbg : G->GetDbgValues(this))
848  if (!Dbg->isInvalidated())
849  Dbg->print(OS);
850  } else if (getHasDebugValue())
851  OS << " [NoOfDbgValues>0]";
852  }
853 }
854 
855 LLVM_DUMP_METHOD void SDDbgValue::print(raw_ostream &OS) const {
856  OS << " DbgVal(Order=" << getOrder() << ')';
857  if (isInvalidated())
858  OS << "(Invalidated)";
859  if (isEmitted())
860  OS << "(Emitted)";
861  OS << "(";
862  bool Comma = false;
863  for (const SDDbgOperand &Op : getLocationOps()) {
864  if (Comma)
865  OS << ", ";
866  switch (Op.getKind()) {
867  case SDDbgOperand::SDNODE:
868  if (Op.getSDNode())
869  OS << "SDNODE=" << PrintNodeId(*Op.getSDNode()) << ':' << Op.getResNo();
870  else
871  OS << "SDNODE";
872  break;
873  case SDDbgOperand::CONST:
874  OS << "CONST";
875  break;
876  case SDDbgOperand::FRAMEIX:
877  OS << "FRAMEIX=" << Op.getFrameIx();
878  break;
879  case SDDbgOperand::VREG:
880  OS << "VREG=" << Op.getVReg();
881  break;
882  }
883  Comma = true;
884  }
885  OS << ")";
886  if (isIndirect()) OS << "(Indirect)";
887  if (isVariadic())
888  OS << "(Variadic)";
889  OS << ":\"" << Var->getName() << '"';
890 #ifndef NDEBUG
891  if (Expr->getNumElements())
892  Expr->dump();
893 #endif
894 }
895 
896 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
897 LLVM_DUMP_METHOD void SDDbgValue::dump() const {
898  if (isInvalidated())
899  return;
900  print(dbgs());
901  dbgs() << "\n";
902 }
903 #endif
904 
905 /// Return true if this node is so simple that we should just print it inline
906 /// if it appears as an operand.
907 static bool shouldPrintInline(const SDNode &Node, const SelectionDAG *G) {
908  // Avoid lots of cluttering when inline printing nodes with associated
909  // DbgValues in verbose mode.
910  if (VerboseDAGDumping && G && !G->GetDbgValues(&Node).empty())
911  return false;
912  if (Node.getOpcode() == ISD::EntryToken)
913  return false;
914  return Node.getNumOperands() == 0;
915 }
916 
917 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
918 static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) {
919  for (const SDValue &Op : N->op_values()) {
920  if (shouldPrintInline(*Op.getNode(), G))
921  continue;
922  if (Op.getNode()->hasOneUse())
923  DumpNodes(Op.getNode(), indent+2, G);
924  }
925 
926  dbgs().indent(indent);
927  N->dump(G);
928 }
929 
930 LLVM_DUMP_METHOD void SelectionDAG::dump() const {
931  dbgs() << "SelectionDAG has " << AllNodes.size() << " nodes:\n";
932 
933  for (const SDNode &N : allnodes()) {
934  if (!N.hasOneUse() && &N != getRoot().getNode() &&
935  (!shouldPrintInline(N, this) || N.use_empty()))
936  DumpNodes(&N, 2, this);
937  }
938 
939  if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this);
940  dbgs() << "\n";
941 
942  if (VerboseDAGDumping) {
943  if (DbgBegin() != DbgEnd())
944  dbgs() << "SDDbgValues:\n";
945  for (auto *Dbg : make_range(DbgBegin(), DbgEnd()))
946  Dbg->dump();
947  if (ByvalParmDbgBegin() != ByvalParmDbgEnd())
948  dbgs() << "Byval SDDbgValues:\n";
949  for (auto *Dbg : make_range(ByvalParmDbgBegin(), ByvalParmDbgEnd()))
950  Dbg->dump();
951  }
952  dbgs() << "\n";
953 }
954 #endif
955 
956 void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const {
957  OS << PrintNodeId(*this) << ": ";
958  print_types(OS, G);
959  OS << " = " << getOperationName(G);
960  print_details(OS, G);
961 }
962 
963 static bool printOperand(raw_ostream &OS, const SelectionDAG *G,
964  const SDValue Value) {
965  if (!Value.getNode()) {
966  OS << "<null>";
967  return false;
968  }
969 
970  if (shouldPrintInline(*Value.getNode(), G)) {
971  OS << Value->getOperationName(G) << ':';
972  Value->print_types(OS, G);
973  Value->print_details(OS, G);
974  return true;
975  }
976 
977  OS << PrintNodeId(*Value.getNode());
978  if (unsigned RN = Value.getResNo())
979  OS << ':' << RN;
980  return false;
981 }
982 
983 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
984 using VisitedSDNodeSet = SmallPtrSet<const SDNode *, 32>;
985 
986 static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent,
987  const SelectionDAG *G, VisitedSDNodeSet &once) {
988  if (!once.insert(N).second) // If we've been here before, return now.
989  return;
990 
991  // Dump the current SDNode, but don't end the line yet.
992  OS.indent(indent);
993  N->printr(OS, G);
994 
995  // Having printed this SDNode, walk the children:
996  for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
997  if (i) OS << ",";
998  OS << " ";
999 
1000  const SDValue Op = N->getOperand(i);
1001  bool printedInline = printOperand(OS, G, Op);
1002  if (printedInline)
1003  once.insert(Op.getNode());
1004  }
1005 
1006  OS << "\n";
1007 
1008  // Dump children that have grandchildren on their own line(s).
1009  for (const SDValue &Op : N->op_values())
1010  DumpNodesr(OS, Op.getNode(), indent+2, G, once);
1011 }
1012 
1013 LLVM_DUMP_METHOD void SDNode::dumpr() const {
1014  VisitedSDNodeSet once;
1015  DumpNodesr(dbgs(), this, 0, nullptr, once);
1016 }
1017 
1018 LLVM_DUMP_METHOD void SDNode::dumpr(const SelectionDAG *G) const {
1019  VisitedSDNodeSet once;
1020  DumpNodesr(dbgs(), this, 0, G, once);
1021 }
1022 #endif
1023 
1024 static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N,
1025  const SelectionDAG *G, unsigned depth,
1026  unsigned indent) {
1027  if (depth == 0)
1028  return;
1029 
1030  OS.indent(indent);
1031 
1032  N->print(OS, G);
1033 
1034  for (const SDValue &Op : N->op_values()) {
1035  // Don't follow chain operands.
1036  if (Op.getValueType() == MVT::Other)
1037  continue;
1038  OS << '\n';
1039  printrWithDepthHelper(OS, Op.getNode(), G, depth - 1, indent + 2);
1040  }
1041 }
1042 
1043 void SDNode::printrWithDepth(raw_ostream &OS, const SelectionDAG *G,
1044  unsigned depth) const {
1045  printrWithDepthHelper(OS, this, G, depth, 0);
1046 }
1047 
1048 void SDNode::printrFull(raw_ostream &OS, const SelectionDAG *G) const {
1049  // Don't print impossibly deep things.
1050  printrWithDepth(OS, G, 10);
1051 }
1052 
1053 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
1054 LLVM_DUMP_METHOD
1055 void SDNode::dumprWithDepth(const SelectionDAG *G, unsigned depth) const {
1056  printrWithDepth(dbgs(), G, depth);
1057 }
1058 
1059 LLVM_DUMP_METHOD void SDNode::dumprFull(const SelectionDAG *G) const {
1060  // Don't print impossibly deep things.
1061  dumprWithDepth(G, 10);
1062 }
1063 #endif
1064 
1065 void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const {
1066  printr(OS, G);
1067  // Under VerboseDAGDumping divergence will be printed always.
1068  if (isDivergent() && !VerboseDAGDumping)
1069  OS << " # D:1";
1070  for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
1071  if (i) OS << ", "; else OS << " ";
1072  printOperand(OS, G, getOperand(i));
1073  }
1074  if (DebugLoc DL = getDebugLoc()) {
1075  OS << ", ";
1076  DL.print(OS);
1077  }
1078 }
llvm::ISD::SUB
@ SUB
Definition: ISDOpcodes.h:240
llvm::Intrinsic::getBaseName
StringRef getBaseName(ID id)
Return the LLVM name for an intrinsic, without encoded types for overloading, such as "llvm....
Definition: Function.cpp:970
llvm::ISD::FPOWI
@ FPOWI
Definition: ISDOpcodes.h:916
llvm::ISD::FROUNDEVEN
@ FROUNDEVEN
Definition: ISDOpcodes.h:928
i
i
Definition: README.txt:29
llvm::ISD::ExternalSymbol
@ ExternalSymbol
Definition: ISDOpcodes.h:83
llvm::ISD::STRICT_FP_ROUND
@ STRICT_FP_ROUND
X = STRICT_FP_ROUND(Y, TRUNC) - Rounding 'Y' from a larger floating point type down to the precision ...
Definition: ISDOpcodes.h:464
llvm::ISD::SETUGE
@ SETUGE
Definition: ISDOpcodes.h:1441
ValueTypes.h
llvm::ConstantSDNode
Definition: SelectionDAGNodes.h:1586
llvm::ISD::SETCCCARRY
@ SETCCCARRY
Like SetCC, ops #0 and #1 are the LHS and RHS operands to compare, but op #2 is a boolean indicating ...
Definition: ISDOpcodes.h:744
llvm::ISD::SETTRUE
@ SETTRUE
Definition: ISDOpcodes.h:1445
llvm::ISD::STRICT_FSETCC
@ STRICT_FSETCC
STRICT_FSETCC/STRICT_FSETCCS - Constrained versions of SETCC, used for floating-point operands only.
Definition: ISDOpcodes.h:475
llvm::ISD::VECTOR_SHUFFLE
@ VECTOR_SHUFFLE
VECTOR_SHUFFLE(VEC1, VEC2) - Returns a vector, of the same type as VEC1/VEC2.
Definition: ISDOpcodes.h:586
llvm::ISD::SETLE
@ SETLE
Definition: ISDOpcodes.h:1452
llvm::ISD::INTRINSIC_VOID
@ INTRINSIC_VOID
OUTCHAIN = INTRINSIC_VOID(INCHAIN, INTRINSICID, arg1, arg2, ...) This node represents a target intrin...
Definition: ISDOpcodes.h:199
llvm::ISD::SETO
@ SETO
Definition: ISDOpcodes.h:1437
llvm::ISD::MemIndexedMode
MemIndexedMode
MemIndexedMode enum - This enum defines the load / store indexed addressing modes.
Definition: ISDOpcodes.h:1377
LLVM_DUMP_METHOD
#define LLVM_DUMP_METHOD
Mark debug helper function definitions like dump() that should not be stripped from debug builds.
Definition: Compiler.h:492
llvm::ISD::UMULO
@ UMULO
Definition: ISDOpcodes.h:332
llvm::ISD::STRICT_FSQRT
@ STRICT_FSQRT
Constrained versions of libm-equivalent floating point intrinsics.
Definition: ISDOpcodes.h:411
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
llvm::ISD::JumpTable
@ JumpTable
Definition: ISDOpcodes.h:81
M
We currently emits eax Perhaps this is what we really should generate is Is imull three or four cycles eax eax The current instruction priority is based on pattern complexity The former is more complex because it folds a load so the latter will not be emitted Perhaps we should use AddedComplexity to give LEA32r a higher priority We should always try to match LEA first since the LEA matching code does some estimate to determine whether the match is profitable if we care more about code then imull is better It s two bytes shorter than movl leal On a Pentium M
Definition: README.txt:252
llvm::ISD::PATCHPOINT
@ PATCHPOINT
Definition: ISDOpcodes.h:1303
llvm::SDNode::getValueType
EVT getValueType(unsigned ResNo) const
Return the type of a specified result.
Definition: SelectionDAGNodes.h:986
llvm::ISD::VECTOR_REVERSE
@ VECTOR_REVERSE
VECTOR_REVERSE(VECTOR) - Returns a vector, of the same type as VECTOR, whose elements are shuffled us...
Definition: ISDOpcodes.h:577
llvm::ISD::STRICT_FSIN
@ STRICT_FSIN
Definition: ISDOpcodes.h:414
llvm::ISD::OR
@ OR
Definition: ISDOpcodes.h:667
llvm::ISD::SETGT
@ SETGT
Definition: ISDOpcodes.h:1449
llvm::ISD::BITCAST
@ BITCAST
BITCAST - This operator converts between integer, vector and FP values, as if the value was stored to...
Definition: ISDOpcodes.h:885
llvm::ISD::LIFETIME_END
@ LIFETIME_END
Definition: ISDOpcodes.h:1229
llvm::ISD::SETNE
@ SETNE
Definition: ISDOpcodes.h:1453
llvm::ISD::BR_JT
@ BR_JT
BR_JT - Jumptable branch.
Definition: ISDOpcodes.h:990
llvm::APFloatBase::IEEEsingle
static const fltSemantics & IEEEsingle() LLVM_READNONE
Definition: APFloat.cpp:201
DebugInfoMetadata.h
llvm::ISD::FMINNUM
@ FMINNUM
FMINNUM/FMAXNUM - Perform floating-point minimum or maximum on two values.
Definition: ISDOpcodes.h:942
llvm::ISD::AssertSext
@ AssertSext
AssertSext, AssertZext - These nodes record if a register contains a value that has already been zero...
Definition: ISDOpcodes.h:61
llvm::ISD::UDIVFIXSAT
@ UDIVFIXSAT
Definition: ISDOpcodes.h:387
llvm::ISD::STRICT_FMAXNUM
@ STRICT_FMAXNUM
Definition: ISDOpcodes.h:423
llvm::ISD::ATOMIC_LOAD_UMAX
@ ATOMIC_LOAD_UMAX
Definition: ISDOpcodes.h:1197
Printable.h
llvm::ISD::ConstantFP
@ ConstantFP
Definition: ISDOpcodes.h:77
llvm::ISD::CONCAT_VECTORS
@ CONCAT_VECTORS
CONCAT_VECTORS(VECTOR0, VECTOR1, ...) - Given a number of values of vector type with the same length ...
Definition: ISDOpcodes.h:542
llvm::ISD::LIFETIME_START
@ LIFETIME_START
This corresponds to the llvm.lifetime.
Definition: ISDOpcodes.h:1228
llvm::ISD::PRE_DEC
@ PRE_DEC
Definition: ISDOpcodes.h:1377
llvm::MachineMemOperand::print
void print(raw_ostream &OS, ModuleSlotTracker &MST, SmallVectorImpl< StringRef > &SSNs, const LLVMContext &Context, const MachineFrameInfo *MFI, const TargetInstrInfo *TII) const
Support for operator<<.
Definition: MachineOperand.cpp:1129
llvm::ISD::BSWAP
@ BSWAP
Byte Swap and Counting operators.
Definition: ISDOpcodes.h:700
llvm::ISD::UDIV
@ UDIV
Definition: ISDOpcodes.h:243
llvm::ISD::STRICT_UINT_TO_FP
@ STRICT_UINT_TO_FP
Definition: ISDOpcodes.h:449
llvm::ISD::UADDO
@ UADDO
Definition: ISDOpcodes.h:324
llvm::ISD::STRICT_FMINNUM
@ STRICT_FMINNUM
Definition: ISDOpcodes.h:424
llvm::ISD::DYNAMIC_STACKALLOC
@ DYNAMIC_STACKALLOC
DYNAMIC_STACKALLOC - Allocate some number of bytes on the stack aligned to a specified boundary.
Definition: ISDOpcodes.h:975
llvm::ISD::ATOMIC_LOAD_CLR
@ ATOMIC_LOAD_CLR
Definition: ISDOpcodes.h:1190
llvm::ISD::CTTZ_ZERO_UNDEF
@ CTTZ_ZERO_UNDEF
Bit counting operators with an undefined result for zero inputs.
Definition: ISDOpcodes.h:708
llvm::ISD::ADDC
@ ADDC
Carry-setting nodes for multiple precision addition and subtraction.
Definition: ISDOpcodes.h:269
llvm::ISD::INIT_TRAMPOLINE
@ INIT_TRAMPOLINE
INIT_TRAMPOLINE - This corresponds to the init_trampoline intrinsic.
Definition: ISDOpcodes.h:1123
llvm::ISD::MLOAD
@ MLOAD
Definition: ISDOpcodes.h:1211
llvm::ISD::FSHL
@ FSHL
Definition: ISDOpcodes.h:696
llvm::SmallVector
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
Definition: SmallVector.h:1199
llvm::ISD::FP_TO_UINT_SAT
@ FP_TO_UINT_SAT
Definition: ISDOpcodes.h:839
llvm::ISD::SETEQ
@ SETEQ
Definition: ISDOpcodes.h:1448
llvm::ISD::STACKRESTORE
@ STACKRESTORE
STACKRESTORE has two operands, an input chain and a pointer to restore to it returns an output chain.
Definition: ISDOpcodes.h:1056
llvm::ISD::CONDCODE
@ CONDCODE
Definition: ISDOpcodes.h:73
llvm::ISD::TargetIndex
@ TargetIndex
TargetIndex - Like a constant pool entry, but with completely target-dependent semantics.
Definition: ISDOpcodes.h:177
llvm::MachineSDNode
An SDNode that represents everything that will be needed to construct a MachineInstr.
Definition: SelectionDAGNodes.h:2901
ErrorHandling.h
llvm::ISD::SDIVFIX
@ SDIVFIX
RESULT = [US]DIVFIX(LHS, RHS, SCALE) - Perform fixed point division on 2 integers with the same width...
Definition: ISDOpcodes.h:380
llvm::ISD::MGATHER
@ MGATHER
Definition: ISDOpcodes.h:1223
llvm::ISD::STEP_VECTOR
@ STEP_VECTOR
STEP_VECTOR(IMM) - Returns a scalable vector whose lanes are comprised of a linear sequence of unsign...
Definition: ISDOpcodes.h:632
llvm::ISD::EH_LABEL
@ EH_LABEL
EH_LABEL - Represents a label in mid basic block used to track locations needed for debug and excepti...
Definition: ISDOpcodes.h:1032
llvm::ISD::FLOG2
@ FLOG2
Definition: ISDOpcodes.h:919
llvm::ISD::ANY_EXTEND
@ ANY_EXTEND
ANY_EXTEND - Used for integer types. The high bits are undefined.
Definition: ISDOpcodes.h:766
llvm::ISD::USUBSAT
@ USUBSAT
Definition: ISDOpcodes.h:350
llvm::SDNode
Represents one node in the SelectionDAG.
Definition: SelectionDAGNodes.h:463
MachineBasicBlock.h
llvm::ISD::FMA
@ FMA
FMA - Perform a * b + c with no intermediate rounding step.
Definition: ISDOpcodes.h:482
llvm::ISD::FP_TO_SINT
@ FP_TO_SINT
FP_TO_[US]INT - Convert a floating point value to a signed or unsigned integer.
Definition: ISDOpcodes.h:819
llvm::cl::Hidden
@ Hidden
Definition: CommandLine.h:138
APInt.h
llvm::ISD::STRICT_FMAXIMUM
@ STRICT_FMAXIMUM
Definition: ISDOpcodes.h:434
llvm::ISD::USHLSAT
@ USHLSAT
Definition: ISDOpcodes.h:360
llvm::ISD::SETULE
@ SETULE
Definition: ISDOpcodes.h:1443
llvm::ISD::PREALLOCATED_SETUP
@ PREALLOCATED_SETUP
Definition: ISDOpcodes.h:1090
llvm::ISD::SHL_PARTS
@ SHL_PARTS
SHL_PARTS/SRA_PARTS/SRL_PARTS - These operators are used for expanded integer shift operations.
Definition: ISDOpcodes.h:749
TargetInstrInfo.h
llvm::MachineMemOperand
A description of a memory reference used in the backend.
Definition: MachineMemOperand.h:127
llvm::ISD::SETCC
@ SETCC
SetCC operator - This evaluates to a true value iff the condition is true.
Definition: ISDOpcodes.h:736
llvm::ISD::STRICT_FPOW
@ STRICT_FPOW
Definition: ISDOpcodes.h:412
llvm::ISD::CALLSEQ_START
@ CALLSEQ_START
CALLSEQ_START/CALLSEQ_END - These operators mark the beginning and end of a call sequence,...
Definition: ISDOpcodes.h:1070
llvm::ISD::SPLAT_VECTOR_PARTS
@ SPLAT_VECTOR_PARTS
SPLAT_VECTOR_PARTS(SCALAR1, SCALAR2, ...) - Returns a vector with the scalar values joined together a...
Definition: ISDOpcodes.h:622
llvm::ISD::VECREDUCE_FMAX
@ VECREDUCE_FMAX
FMIN/FMAX nodes can have flags, for NaN/NoNaN variants.
Definition: ISDOpcodes.h:1279
llvm::ISD::FMAXNUM_IEEE
@ FMAXNUM_IEEE
Definition: ISDOpcodes.h:950
llvm::ISD::MERGE_VALUES
@ MERGE_VALUES
MERGE_VALUES - This node takes multiple discrete operands and returns them all as its individual resu...
Definition: ISDOpcodes.h:236
llvm::ModuleSlotTracker::incorporateFunction
void incorporateFunction(const Function &F)
Incorporate the given function.
Definition: AsmWriter.cpp:870
llvm::ISD::SIGN_EXTEND_VECTOR_INREG
@ SIGN_EXTEND_VECTOR_INREG
SIGN_EXTEND_VECTOR_INREG(Vector) - This operator represents an in-register sign-extension of the low ...
Definition: ISDOpcodes.h:803
llvm::ISD::VAEND
@ VAEND
VAEND, VASTART - VAEND and VASTART have three operands: an input chain, pointer, and a SRCVALUE.
Definition: ISDOpcodes.h:1085
llvm::ISD::VECREDUCE_SEQ_FADD
@ VECREDUCE_SEQ_FADD
Generic reduction nodes.
Definition: ISDOpcodes.h:1263
SDNodeDbgValue.h
llvm::ISD::FP_TO_BF16
@ FP_TO_BF16
Definition: ISDOpcodes.h:905
llvm::ISD::SETOEQ
@ SETOEQ
Definition: ISDOpcodes.h:1431
SelectionDAG.h
llvm::ISD::FREEZE
@ FREEZE
Definition: ISDOpcodes.h:216
llvm::ModuleSlotTracker
Manage lifetime of a slot tracker for printing IR.
Definition: ModuleSlotTracker.h:44
llvm::ISD::GC_TRANSITION_END
@ GC_TRANSITION_END
Definition: ISDOpcodes.h:1238
llvm::ISD::STRICT_FLOG
@ STRICT_FLOG
Definition: ISDOpcodes.h:418
llvm::ISD::CALLSEQ_END
@ CALLSEQ_END
Definition: ISDOpcodes.h:1071
llvm::ISD::STRICT_FP_TO_UINT
@ STRICT_FP_TO_UINT
Definition: ISDOpcodes.h:442
llvm::ISD::SETUEQ
@ SETUEQ
Definition: ISDOpcodes.h:1439
llvm::ISD::SMAX
@ SMAX
Definition: ISDOpcodes.h:661
llvm::ISD::ATOMIC_LOAD_OR
@ ATOMIC_LOAD_OR
Definition: ISDOpcodes.h:1191
llvm::ISD::FABS
@ FABS
Definition: ISDOpcodes.h:911
llvm::ISD::ADDCARRY
@ ADDCARRY
Carry-using nodes for multiple precision addition and subtraction.
Definition: ISDOpcodes.h:303
llvm::ISD::BRCOND
@ BRCOND
BRCOND - Conditional branch.
Definition: ISDOpcodes.h:1000
llvm::ISD::EH_SJLJ_SETJMP
@ EH_SJLJ_SETJMP
RESULT, OUTCHAIN = EH_SJLJ_SETJMP(INCHAIN, buffer) This corresponds to the eh.sjlj....
Definition: ISDOpcodes.h:141
llvm::ShuffleVectorSDNode
This SDNode is used to implement the code generator support for the llvm IR shufflevector instruction...
Definition: SelectionDAGNodes.h:1528
llvm::ISD::INLINEASM
@ INLINEASM
INLINEASM - Represents an inline asm block.
Definition: ISDOpcodes.h:1024
llvm::ISD::PSEUDO_PROBE
@ PSEUDO_PROBE
Pseudo probe for AutoFDO, as a place holder in a basic block to improve the sample counts quality.
Definition: ISDOpcodes.h:1248
llvm::TargetIntrinsicInfo
TargetIntrinsicInfo - Interface to description of machine instruction set.
Definition: TargetIntrinsicInfo.h:29
llvm::ISD::STRICT_FLOG2
@ STRICT_FLOG2
Definition: ISDOpcodes.h:420
llvm::ISD::STRICT_FROUND
@ STRICT_FROUND
Definition: ISDOpcodes.h:427
MachineValueType.h
llvm::ISD::BRIND
@ BRIND
BRIND - Indirect branch.
Definition: ISDOpcodes.h:986
llvm::ISD::ROTL
@ ROTL
Definition: ISDOpcodes.h:694
llvm::ISD::AVGFLOORU
@ AVGFLOORU
Definition: ISDOpcodes.h:644
llvm::dbgs
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition: Debug.cpp:163
llvm::ISD::EH_SJLJ_LONGJMP
@ EH_SJLJ_LONGJMP
OUTCHAIN = EH_SJLJ_LONGJMP(INCHAIN, buffer) This corresponds to the eh.sjlj.longjmp intrinsic.
Definition: ISDOpcodes.h:147
llvm::ISD::VECREDUCE_UMAX
@ VECREDUCE_UMAX
Definition: ISDOpcodes.h:1291
llvm::ISD::GC_TRANSITION_START
@ GC_TRANSITION_START
GC_TRANSITION_START/GC_TRANSITION_END - These operators mark the beginning and end of GC transition s...
Definition: ISDOpcodes.h:1237
llvm::get
decltype(auto) get(const PointerIntPair< PointerTy, IntBits, IntType, PtrTraits, Info > &Pair)
Definition: PointerIntPair.h:234
llvm::ISD::FFLOOR
@ FFLOOR
Definition: ISDOpcodes.h:929
CommandLine.h
llvm::ISD::STRICT_FDIV
@ STRICT_FDIV
Definition: ISDOpcodes.h:403
llvm::ISD::BR_CC
@ BR_CC
BR_CC - Conditional branch.
Definition: ISDOpcodes.h:1007
TargetLowering.h
llvm::ISD::FSHR
@ FSHR
Definition: ISDOpcodes.h:697
llvm::SDNode::getOpcode
unsigned getOpcode() const
Return the SelectionDAG opcode value for this node.
Definition: SelectionDAGNodes.h:644
llvm::ISD::EH_SJLJ_SETUP_DISPATCH
@ EH_SJLJ_SETUP_DISPATCH
OUTCHAIN = EH_SJLJ_SETUP_DISPATCH(INCHAIN) The target initializes the dispatch table here.
Definition: ISDOpcodes.h:151
llvm::ISD::STRICT_FP_TO_SINT
@ STRICT_FP_TO_SINT
STRICT_FP_TO_[US]INT - Convert a floating point value to a signed or unsigned integer.
Definition: ISDOpcodes.h:441
llvm::ISD::GlobalAddress
@ GlobalAddress
Definition: ISDOpcodes.h:78
llvm::ISD::SELECT_CC
@ SELECT_CC
Select with condition operator - This selects between a true value and a false value (ops #2 and #3) ...
Definition: ISDOpcodes.h:728
llvm::TargetInstrInfo
TargetInstrInfo - Interface to description of machine instruction set.
Definition: TargetInstrInfo.h:98
hasNoUnsignedWrap
static bool hasNoUnsignedWrap(BinaryOperator &I)
Definition: InstructionCombining.cpp:301
TargetMachine.h
llvm::ISD::CTLZ
@ CTLZ
Definition: ISDOpcodes.h:702
llvm::SelectionDAG
This is used to represent a portion of an LLVM function in a low-level Data Dependence DAG representa...
Definition: SelectionDAG.h:221
SelectionDAGNodes.h
llvm::ISD::SELECT
@ SELECT
Select(COND, TRUEVAL, FALSEVAL).
Definition: ISDOpcodes.h:713
llvm::ISD::SMULFIXSAT
@ SMULFIXSAT
Same as the corresponding unsaturated fixed point instructions, but the result is clamped between the...
Definition: ISDOpcodes.h:373
Constants.h
llvm::ISD::STRICT_FRINT
@ STRICT_FRINT
Definition: ISDOpcodes.h:421
llvm::ISD::Constant
@ Constant
Definition: ISDOpcodes.h:76
llvm::ISD::ZERO_EXTEND
@ ZERO_EXTEND
ZERO_EXTEND - Used for integer types, zeroing the new bits.
Definition: ISDOpcodes.h:763
llvm::ISD::ABS
@ ABS
ABS - Determine the unsigned absolute value of a signed integer value of the same bitwidth.
Definition: ISDOpcodes.h:674
llvm::ISD::SETGE
@ SETGE
Definition: ISDOpcodes.h:1450
llvm::ISD::SMULFIX
@ SMULFIX
RESULT = [US]MULFIX(LHS, RHS, SCALE) - Perform fixed point multiplication on 2 integers with the same...
Definition: ISDOpcodes.h:367
llvm::ISD::CATCHRET
@ CATCHRET
CATCHRET - Represents a return from a catch block funclet.
Definition: ISDOpcodes.h:1043
llvm::ISD::SIGN_EXTEND_INREG
@ SIGN_EXTEND_INREG
SIGN_EXTEND_INREG - This operator atomically performs a SHL/SRA pair to sign extend a small value in ...
Definition: ISDOpcodes.h:781
llvm::ISD::CopyToReg
@ CopyToReg
CopyToReg - This node has three operands: a chain, a register number to set to this value,...
Definition: ISDOpcodes.h:203
llvm::ISD::STRICT_FNEARBYINT
@ STRICT_FNEARBYINT
Definition: ISDOpcodes.h:422
llvm::ISD::ANY_EXTEND_VECTOR_INREG
@ ANY_EXTEND_VECTOR_INREG
ANY_EXTEND_VECTOR_INREG(Vector) - This operator represents an in-register any-extension of the low la...
Definition: ISDOpcodes.h:792
Intrinsics.h
llvm::TargetLowering
This class defines information used to lower LLVM code to legal SelectionDAG operators that the targe...
Definition: TargetLowering.h:3510
llvm::ISD::STRICT_FP16_TO_FP
@ STRICT_FP16_TO_FP
Definition: ISDOpcodes.h:897
llvm::ISD::FROUND
@ FROUND
Definition: ISDOpcodes.h:927
llvm::ISD::TRUNCATE
@ TRUNCATE
TRUNCATE - Completely drop the high bits.
Definition: ISDOpcodes.h:769
llvm::ISD::SRA
@ SRA
Definition: ISDOpcodes.h:692
llvm::ISD::STRICT_FLOG10
@ STRICT_FLOG10
Definition: ISDOpcodes.h:419
llvm::ISD::LLROUND
@ LLROUND
Definition: ISDOpcodes.h:931
llvm::ISD::FMINNUM_IEEE
@ FMINNUM_IEEE
FMINNUM_IEEE/FMAXNUM_IEEE - Perform floating-point minimum or maximum on two values,...
Definition: ISDOpcodes.h:949
llvm::ISD::GLOBAL_OFFSET_TABLE
@ GLOBAL_OFFSET_TABLE
The address of the GOT.
Definition: ISDOpcodes.h:87
llvm::ISD::UDIVREM
@ UDIVREM
Definition: ISDOpcodes.h:256
TII
const HexagonInstrInfo * TII
Definition: HexagonCopyToCombine.cpp:125
llvm::ISD::DELETED_NODE
@ DELETED_NODE
DELETED_NODE - This is an illegal value that is used to catch errors.
Definition: ISDOpcodes.h:44
llvm::ISD::ADDRSPACECAST
@ ADDRSPACECAST
ADDRSPACECAST - This operator converts between pointers of different address spaces.
Definition: ISDOpcodes.h:889
llvm::ISD::ATOMIC_LOAD_AND
@ ATOMIC_LOAD_AND
Definition: ISDOpcodes.h:1189
llvm::ISD::MDNODE_SDNODE
@ MDNODE_SDNODE
MDNODE_SDNODE - This is a node that holdes an MDNode*, which is used to reference metadata in the IR.
Definition: ISDOpcodes.h:1101
llvm::ISD::ATOMIC_LOAD_UMIN
@ ATOMIC_LOAD_UMIN
Definition: ISDOpcodes.h:1196
llvm::ISD::SINT_TO_FP
@ SINT_TO_FP
[SU]INT_TO_FP - These operators convert integers (whose interpreted sign depends on the first letter)...
Definition: ISDOpcodes.h:773
llvm::raw_ostream
This class implements an extremely fast bulk output stream that can only output to a stream.
Definition: raw_ostream.h:52
APFloat.h
llvm::ISD::FNEARBYINT
@ FNEARBYINT
Definition: ISDOpcodes.h:926
llvm::ISD::FP16_TO_FP
@ FP16_TO_FP
FP16_TO_FP, FP_TO_FP16 - These operators are used to perform promotions and truncation for half-preci...
Definition: ISDOpcodes.h:895
llvm::ISD::FRINT
@ FRINT
Definition: ISDOpcodes.h:925
llvm::ISD::ATOMIC_STORE
@ ATOMIC_STORE
OUTCHAIN = ATOMIC_STORE(INCHAIN, ptr, val) This corresponds to "store atomic" instruction.
Definition: ISDOpcodes.h:1165
llvm::ISD::AssertAlign
@ AssertAlign
AssertAlign - These nodes record if a register contains a value that has a known alignment and the tr...
Definition: ISDOpcodes.h:68
DebugLoc.h
SmallPtrSet.h
llvm::ISD::AND
@ AND
Bitwise operators - logical and, logical or, logical xor.
Definition: ISDOpcodes.h:666
llvm::ISD::SMULO
@ SMULO
Same for multiplication.
Definition: ISDOpcodes.h:331
llvm::ISD::SETOLT
@ SETOLT
Definition: ISDOpcodes.h:1434
llvm::ISD::ABDS
@ ABDS
Definition: ISDOpcodes.h:655
llvm::ISD::TargetGlobalAddress
@ TargetGlobalAddress
TargetGlobalAddress - Like GlobalAddress, but the DAG does no folding or anything else with this node...
Definition: ISDOpcodes.h:164
llvm::ISD::SPLAT_VECTOR
@ SPLAT_VECTOR
SPLAT_VECTOR(VAL) - Returns a vector with the scalar value VAL duplicated in all lanes.
Definition: ISDOpcodes.h:613
llvm::ISD::EntryToken
@ EntryToken
EntryToken - This is the marker used to indicate the start of a region.
Definition: ISDOpcodes.h:47
llvm::ISD::FSINCOS
@ FSINCOS
FSINCOS - Compute both fsin and fcos as a single operation.
Definition: ISDOpcodes.h:959
llvm::ISD::CopyFromReg
@ CopyFromReg
CopyFromReg - This node indicates that the input value is a virtual or physical register that is defi...
Definition: ISDOpcodes.h:208
llvm::ISD::USUBO
@ USUBO
Definition: ISDOpcodes.h:328
llvm::ISD::FCBRT
@ FCBRT
Definition: ISDOpcodes.h:913
llvm::ISD::SETOLE
@ SETOLE
Definition: ISDOpcodes.h:1435
llvm::ISD::SETUGT
@ SETUGT
Definition: ISDOpcodes.h:1440
llvm::ISD::VALUETYPE
@ VALUETYPE
Definition: ISDOpcodes.h:72
llvm::ISD::VECREDUCE_FMUL
@ VECREDUCE_FMUL
Definition: ISDOpcodes.h:1277
llvm::ISD::ATOMIC_LOAD_FADD
@ ATOMIC_LOAD_FADD
Definition: ISDOpcodes.h:1198
llvm::ISD::POST_INC
@ POST_INC
Definition: ISDOpcodes.h:1377
llvm::ISD::TargetConstantFP
@ TargetConstantFP
Definition: ISDOpcodes.h:159
llvm::ISD::FPOW
@ FPOW
Definition: ISDOpcodes.h:917
llvm::ISD::FADD
@ FADD
Simple binary floating point operators.
Definition: ISDOpcodes.h:390
llvm::ISD::BlockAddress
@ BlockAddress
Definition: ISDOpcodes.h:84
llvm::ISD::AVGCEILU
@ AVGCEILU
Definition: ISDOpcodes.h:649
llvm::ISD::SETUNE
@ SETUNE
Definition: ISDOpcodes.h:1444
G
const DataFlowGraph & G
Definition: RDFGraph.cpp:200
llvm::ISD::STRICT_FSETCCS
@ STRICT_FSETCCS
Definition: ISDOpcodes.h:476
llvm::ISD::STRICT_FMINIMUM
@ STRICT_FMINIMUM
Definition: ISDOpcodes.h:435
llvm::ISD::SMIN
@ SMIN
[US]{MIN/MAX} - Binary minimum or maximum of signed or unsigned integers.
Definition: ISDOpcodes.h:660
llvm::ISD::WRITE_REGISTER
@ WRITE_REGISTER
Definition: ISDOpcodes.h:119
llvm::ISD::FMINIMUM
@ FMINIMUM
FMINIMUM/FMAXIMUM - NaN-propagating minimum/maximum that also treat -0.0 as less than 0....
Definition: ISDOpcodes.h:955
BasicBlock.h
llvm::cl::opt< bool >
llvm::ISD::AVGCEILS
@ AVGCEILS
AVGCEILS/AVGCEILU - Rounding averaging add - Add two integers using an integer of type i[N+2],...
Definition: ISDOpcodes.h:648
llvm::ISD::Register
@ Register
Definition: ISDOpcodes.h:74
llvm::ISD::GET_DYNAMIC_AREA_OFFSET
@ GET_DYNAMIC_AREA_OFFSET
GET_DYNAMIC_AREA_OFFSET - get offset from native SP to the address of the most recent dynamic alloca.
Definition: ISDOpcodes.h:1244
llvm::ISD::SADDO
@ SADDO
RESULT, BOOL = [SU]ADDO(LHS, RHS) - Overflow-aware nodes for addition.
Definition: ISDOpcodes.h:323
llvm::ISD::FLOG10
@ FLOG10
Definition: ISDOpcodes.h:920
llvm::ISD::VECREDUCE_FMIN
@ VECREDUCE_FMIN
Definition: ISDOpcodes.h:1280
llvm::ISD::FMAD
@ FMAD
FMAD - Perform a * b + c, while getting the same result as the separately rounded operations.
Definition: ISDOpcodes.h:486
llvm::ISD::LOCAL_RECOVER
@ LOCAL_RECOVER
LOCAL_RECOVER - Represents the llvm.localrecover intrinsic.
Definition: ISDOpcodes.h:114
llvm::ISD::ATOMIC_FENCE
@ ATOMIC_FENCE
OUTCHAIN = ATOMIC_FENCE(INCHAIN, ordering, scope) This corresponds to the fence instruction.
Definition: ISDOpcodes.h:1157
llvm::ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS
@ ATOMIC_CMP_SWAP_WITH_SUCCESS
Val, Success, OUTCHAIN = ATOMIC_CMP_SWAP_WITH_SUCCESS(INCHAIN, ptr, cmp, swap) N.b.
Definition: ISDOpcodes.h:1178
llvm::ISD::ATOMIC_LOAD_MIN
@ ATOMIC_LOAD_MIN
Definition: ISDOpcodes.h:1194
llvm::ISD::FP_TO_UINT
@ FP_TO_UINT
Definition: ISDOpcodes.h:820
D
static GCRegistry::Add< StatepointGC > D("statepoint-example", "an example strategy for statepoint")
llvm::ConstantFPSDNode
Definition: SelectionDAGNodes.h:1635
llvm::GlobalValue::getParent
Module * getParent()
Get the module that this global value is contained inside of...
Definition: GlobalValue.h:652
llvm::ISD::VECREDUCE_ADD
@ VECREDUCE_ADD
Integer reductions may have a result type larger than the vector element type.
Definition: ISDOpcodes.h:1284
llvm::ISD::LOAD
@ LOAD
LOAD and STORE have token chains as their first operand, then the same operands as an LLVM load/store...
Definition: ISDOpcodes.h:965
llvm::ISD::VECREDUCE_SMAX
@ VECREDUCE_SMAX
Definition: ISDOpcodes.h:1289
llvm::ISD::AssertZext
@ AssertZext
Definition: ISDOpcodes.h:62
llvm::SDNode::print_details
void print_details(raw_ostream &OS, const SelectionDAG *G) const
Definition: SelectionDAGDumper.cpp:572
llvm::ISD::SRCVALUE
@ SRCVALUE
SRCVALUE - This is a node type that holds a Value* that is used to make reference to a value in the L...
Definition: ISDOpcodes.h:1097
llvm::ISD::STRICT_LRINT
@ STRICT_LRINT
Definition: ISDOpcodes.h:432
llvm::ISD::TRAP
@ TRAP
TRAP - Trapping instruction.
Definition: ISDOpcodes.h:1132
llvm::LLVMContext
This is an important class for using LLVM in a threaded context.
Definition: LLVMContext.h:67
llvm::numbers::e
constexpr double e
Definition: MathExtras.h:31
llvm::ISD::SPONENTRY
@ SPONENTRY
SPONENTRY - Represents the llvm.sponentry intrinsic.
Definition: ISDOpcodes.h:106
llvm::ISD::SSUBO_CARRY
@ SSUBO_CARRY
Definition: ISDOpcodes.h:314
llvm::nodes
iterator_range< typename GraphTraits< GraphType >::nodes_iterator > nodes(const GraphType &G)
Definition: GraphTraits.h:110
llvm::ISD::EXTRACT_VECTOR_ELT
@ EXTRACT_VECTOR_ELT
EXTRACT_VECTOR_ELT(VECTOR, IDX) - Returns a single element from VECTOR identified by the (potentially...
Definition: ISDOpcodes.h:534
llvm::ISD::VECREDUCE_FADD
@ VECREDUCE_FADD
These reductions have relaxed evaluation order semantics, and have a single vector operand.
Definition: ISDOpcodes.h:1276
llvm::ISD::CLEANUPRET
@ CLEANUPRET
CLEANUPRET - Represents a return from a cleanup block funclet.
Definition: ISDOpcodes.h:1047
llvm::ISD::CTLZ_ZERO_UNDEF
@ CTLZ_ZERO_UNDEF
Definition: ISDOpcodes.h:709
llvm::ISD::ATOMIC_LOAD_NAND
@ ATOMIC_LOAD_NAND
Definition: ISDOpcodes.h:1193
llvm::SDNode::getOperand
const SDValue & getOperand(unsigned Num) const
Definition: SelectionDAGNodes.h:921
PrintNodeId
static Printable PrintNodeId(const SDNode &Node)
Definition: SelectionDAGDumper.cpp:517
llvm::ISD::VECREDUCE_SEQ_FMUL
@ VECREDUCE_SEQ_FMUL
Definition: ISDOpcodes.h:1264
llvm::ISD::LRINT
@ LRINT
Definition: ISDOpcodes.h:932
StringExtras.h
llvm::ISD::FP_TO_FP16
@ FP_TO_FP16
Definition: ISDOpcodes.h:896
llvm::ISD::ATOMIC_CMP_SWAP
@ ATOMIC_CMP_SWAP
Val, OUTCHAIN = ATOMIC_CMP_SWAP(INCHAIN, ptr, cmp, swap) For double-word atomic operations: ValLo,...
Definition: ISDOpcodes.h:1172
llvm::ISD::UADDSAT
@ UADDSAT
Definition: ISDOpcodes.h:341
llvm::ISD::ATOMIC_LOAD_ADD
@ ATOMIC_LOAD_ADD
Definition: ISDOpcodes.h:1187
MachineConstantPool.h
llvm::ISD::SSUBSAT
@ SSUBSAT
RESULT = [US]SUBSAT(LHS, RHS) - Perform saturation subtraction on 2 integers with the same bit width ...
Definition: ISDOpcodes.h:349
llvm::ISD::FCOPYSIGN
@ FCOPYSIGN
FCOPYSIGN(X, Y) - Return the value of X with the sign of Y.
Definition: ISDOpcodes.h:492
llvm::SDNode::dump
void dump() const
Dump this node, for debugging.
Definition: SelectionDAGDumper.cpp:554
llvm::MachineSDNode::mmo_iterator
ArrayRef< MachineMemOperand * >::const_iterator mmo_iterator
Definition: SelectionDAGNodes.h:2931
printMemOperand
static void printMemOperand(raw_ostream &OS, const MachineMemOperand &MMO, const MachineFunction *MF, const Module *M, const MachineFrameInfo *MFI, const TargetInstrInfo *TII, LLVMContext &Ctx)
Definition: SelectionDAGDumper.cpp:528
llvm::ISD::MSTORE
@ MSTORE
Definition: ISDOpcodes.h:1212
llvm::ISD::STRICT_LROUND
@ STRICT_LROUND
Definition: ISDOpcodes.h:430
llvm::ISD::MEMBARRIER
@ MEMBARRIER
MEMBARRIER - Compiler barrier only; generate a no-op.
Definition: ISDOpcodes.h:1152
llvm::ISD::SETOGT
@ SETOGT
Definition: ISDOpcodes.h:1432
llvm::ISD::ADJUST_TRAMPOLINE
@ ADJUST_TRAMPOLINE
ADJUST_TRAMPOLINE - This corresponds to the adjust_trampoline intrinsic.
Definition: ISDOpcodes.h:1129
llvm::ISD::MULHS
@ MULHS
Definition: ISDOpcodes.h:638
llvm::MVT::Other
@ Other
Definition: MachineValueType.h:42
llvm::MachineFunction::getFrameInfo
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
Definition: MachineFunction.h:688
llvm::ISD::SETULT
@ SETULT
Definition: ISDOpcodes.h:1442
llvm::ISD::DEBUGTRAP
@ DEBUGTRAP
DEBUGTRAP - Trap intended to get the attention of a debugger.
Definition: ISDOpcodes.h:1135
llvm::SDNode::print
void print(raw_ostream &OS, const SelectionDAG *G=nullptr) const
Definition: SelectionDAGDumper.cpp:1065
llvm::ISD::STACKMAP
@ STACKMAP
Definition: ISDOpcodes.h:1297
llvm::ISD::EH_DWARF_CFA
@ EH_DWARF_CFA
EH_DWARF_CFA - This node represents the pointer to the DWARF Canonical Frame Address (CFA),...
Definition: ISDOpcodes.h:129
llvm::ISD::BasicBlock
@ BasicBlock
Various leaf nodes.
Definition: ISDOpcodes.h:71
llvm::ISD::SDIVFIXSAT
@ SDIVFIXSAT
Same as the corresponding unsaturated fixed point instructions, but the result is clamped between the...
Definition: ISDOpcodes.h:386
llvm::ISD::VECREDUCE_AND
@ VECREDUCE_AND
Definition: ISDOpcodes.h:1286
llvm::ISD::TargetGlobalTLSAddress
@ TargetGlobalTLSAddress
Definition: ISDOpcodes.h:165
llvm::ISD::RETURNADDR
@ RETURNADDR
Definition: ISDOpcodes.h:95
llvm::ISD::SUBCARRY
@ SUBCARRY
Definition: ISDOpcodes.h:304
llvm::Module
A Module instance is used to store all the information related to an LLVM module.
Definition: Module.h:65
llvm::TargetLowering::getTargetNodeName
virtual const char * getTargetNodeName(unsigned Opcode) const
This method returns the name of a target specific DAG node.
Definition: TargetLowering.cpp:42
llvm::ISD::POST_DEC
@ POST_DEC
Definition: ISDOpcodes.h:1377
llvm::ISD::STRICT_LLRINT
@ STRICT_LLRINT
Definition: ISDOpcodes.h:433
llvm::ISD::SRA_PARTS
@ SRA_PARTS
Definition: ISDOpcodes.h:750
llvm::ISD::VASTART
@ VASTART
Definition: ISDOpcodes.h:1086
llvm::SDNode::isMachineOpcode
bool isMachineOpcode() const
Test if this node has a post-isel opcode, directly corresponding to a MachineInstr opcode.
Definition: SelectionDAGNodes.h:699
llvm::ISD::TargetBlockAddress
@ TargetBlockAddress
Definition: ISDOpcodes.h:170
llvm::MachineFunction
Definition: MachineFunction.h:258
llvm::ISD::ANNOTATION_LABEL
@ ANNOTATION_LABEL
ANNOTATION_LABEL - Represents a mid basic block label used by annotations.
Definition: ISDOpcodes.h:1038
llvm::ISD::VSCALE
@ VSCALE
VSCALE(IMM) - Returns the runtime scaling factor used to calculate the number of elements within a sc...
Definition: ISDOpcodes.h:1253
llvm::ISD::STRICT_FROUNDEVEN
@ STRICT_FROUNDEVEN
Definition: ISDOpcodes.h:428
llvm::ISD::HANDLENODE
@ HANDLENODE
HANDLENODE node - Used as a handle for various purposes.
Definition: ISDOpcodes.h:1115
llvm::ISD::STRICT_FEXP
@ STRICT_FEXP
Definition: ISDOpcodes.h:416
llvm::ISD::ConstantPool
@ ConstantPool
Definition: ISDOpcodes.h:82
llvm::ISD::FMAXIMUM
@ FMAXIMUM
Definition: ISDOpcodes.h:956
llvm::ISD::GlobalTLSAddress
@ GlobalTLSAddress
Definition: ISDOpcodes.h:79
llvm::ISD::UBSANTRAP
@ UBSANTRAP
UBSANTRAP - Trap with an immediate describing the kind of sanitizer failure.
Definition: ISDOpcodes.h:1139
llvm::ISD::TargetConstantPool
@ TargetConstantPool
Definition: ISDOpcodes.h:168
llvm::SDNode::print_types
void print_types(raw_ostream &OS, const SelectionDAG *G) const
Definition: SelectionDAGDumper.cpp:562
llvm::ISD::STRICT_FCOS
@ STRICT_FCOS
Definition: ISDOpcodes.h:415
llvm::ISD::UMAX
@ UMAX
Definition: ISDOpcodes.h:663
llvm::ISD::PRE_INC
@ PRE_INC
Definition: ISDOpcodes.h:1377
llvm::ISD::SETTRUE2
@ SETTRUE2
Definition: ISDOpcodes.h:1454
llvm::ISD::STRICT_FTRUNC
@ STRICT_FTRUNC
Definition: ISDOpcodes.h:429
llvm::APFloatBase::IEEEdouble
static const fltSemantics & IEEEdouble() LLVM_READNONE
Definition: APFloat.cpp:204
llvm::ISD::ABDU
@ ABDU
Definition: ISDOpcodes.h:656
llvm::ISD::STRICT_SINT_TO_FP
@ STRICT_SINT_TO_FP
STRICT_[US]INT_TO_FP - Convert a signed or unsigned integer to a floating point value.
Definition: ISDOpcodes.h:448
llvm_unreachable
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
Definition: ErrorHandling.h:143
llvm::ISD::SREM
@ SREM
Definition: ISDOpcodes.h:244
llvm::ISD::LLRINT
@ LLRINT
Definition: ISDOpcodes.h:933
llvm::ISD::UMUL_LOHI
@ UMUL_LOHI
Definition: ISDOpcodes.h:251
llvm::ISD::ATOMIC_LOAD_SUB
@ ATOMIC_LOAD_SUB
Definition: ISDOpcodes.h:1188
llvm::ISD::STRICT_FSUB
@ STRICT_FSUB
Definition: ISDOpcodes.h:401
Compiler.h
TargetSubtargetInfo.h
llvm::SDNode::getIndexedModeName
static const char * getIndexedModeName(ISD::MemIndexedMode AM)
Definition: SelectionDAGDumper.cpp:507
llvm::ISD::FEXP
@ FEXP
Definition: ISDOpcodes.h:921
llvm::ISD::UNDEF
@ UNDEF
UNDEF - An undefined node.
Definition: ISDOpcodes.h:211
llvm::ISD::SMUL_LOHI
@ SMUL_LOHI
SMUL_LOHI/UMUL_LOHI - Multiply two integers of type iN, producing a signed/unsigned value of type i[2...
Definition: ISDOpcodes.h:250
llvm::ISD::BUILTIN_OP_END
@ BUILTIN_OP_END
BUILTIN_OP_END - This must be the last enum value in this list.
Definition: ISDOpcodes.h:1311
llvm::ISD::UMULFIX
@ UMULFIX
Definition: ISDOpcodes.h:368
llvm::ISD::SETFALSE
@ SETFALSE
Definition: ISDOpcodes.h:1430
llvm::ISD::FEXP2
@ FEXP2
Definition: ISDOpcodes.h:922
llvm::ISD::STRICT_FP_EXTEND
@ STRICT_FP_EXTEND
X = STRICT_FP_EXTEND(Y) - Extend a smaller FP type into a larger FP type.
Definition: ISDOpcodes.h:469
llvm::ISD::VECREDUCE_XOR
@ VECREDUCE_XOR
Definition: ISDOpcodes.h:1288
llvm::ISD::FMUL
@ FMUL
Definition: ISDOpcodes.h:392
llvm::ISD::ATOMIC_SWAP
@ ATOMIC_SWAP
Val, OUTCHAIN = ATOMIC_SWAP(INCHAIN, ptr, amt) Val, OUTCHAIN = ATOMIC_LOAD_[OpName](INCHAIN,...
Definition: ISDOpcodes.h:1186
llvm::ISD::VECTOR_SPLICE
@ VECTOR_SPLICE
VECTOR_SPLICE(VEC1, VEC2, IMM) - Returns a subvector of the same type as VEC1/VEC2 from CONCAT_VECTOR...
Definition: ISDOpcodes.h:598
llvm::ISD::CARRY_FALSE
@ CARRY_FALSE
CARRY_FALSE - This node is used when folding other nodes, like ADDC/SUBC, which indicate the carry re...
Definition: ISDOpcodes.h:260
llvm::ISD::SSHLSAT
@ SSHLSAT
RESULT = [US]SHLSAT(LHS, RHS) - Perform saturation left shift.
Definition: ISDOpcodes.h:359
llvm::ISD::PCMARKER
@ PCMARKER
PCMARKER - This corresponds to the pcmarker intrinsic.
Definition: ISDOpcodes.h:1104
llvm::ISD::INTRINSIC_WO_CHAIN
@ INTRINSIC_WO_CHAIN
RESULT = INTRINSIC_WO_CHAIN(INTRINSICID, arg1, arg2, ...) This node represents a target intrinsic fun...
Definition: ISDOpcodes.h:184
llvm::ISD::XOR
@ XOR
Definition: ISDOpcodes.h:668
llvm::SDNode::getOperationName
std::string getOperationName(const SelectionDAG *G=nullptr) const
Return the opcode of this operation for printing.
Definition: SelectionDAGDumper.cpp:58
llvm::ISD::FRAMEADDR
@ FRAMEADDR
FRAMEADDR, RETURNADDR - These nodes represent llvm.frameaddress and llvm.returnaddress on the DAG.
Definition: ISDOpcodes.h:94
llvm::ISD::FrameIndex
@ FrameIndex
Definition: ISDOpcodes.h:80
llvm::ISD::FSQRT
@ FSQRT
Definition: ISDOpcodes.h:912
llvm::EVT::getEVTString
std::string getEVTString() const
This function returns value type as a string, e.g. "i32".
Definition: ValueTypes.cpp:152
llvm::ISD::INSERT_SUBVECTOR
@ INSERT_SUBVECTOR
INSERT_SUBVECTOR(VECTOR1, VECTOR2, IDX) - Returns a vector with VECTOR2 inserted into VECTOR1.
Definition: ISDOpcodes.h:558
llvm::ISD::READ_REGISTER
@ READ_REGISTER
READ_REGISTER, WRITE_REGISTER - This node represents llvm.register on the DAG, which implements the n...
Definition: ISDOpcodes.h:118
llvm::ISD::SETLT
@ SETLT
Definition: ISDOpcodes.h:1451
llvm::ISD::STRICT_FMUL
@ STRICT_FMUL
Definition: ISDOpcodes.h:402
llvm::ISD::STRICT_FMA
@ STRICT_FMA
Definition: ISDOpcodes.h:405
llvm::ISD::FMAXNUM
@ FMAXNUM
Definition: ISDOpcodes.h:943
llvm::GlobalAddressSDNode
Definition: SelectionDAGNodes.h:1763
llvm::MachineFunction::getFunction
Function & getFunction()
Return the LLVM function that this machine code represents.
Definition: MachineFunction.h:638
llvm::ISD::EXTRACT_SUBVECTOR
@ EXTRACT_SUBVECTOR
EXTRACT_SUBVECTOR(VECTOR, IDX) - Returns a subvector from VECTOR.
Definition: ISDOpcodes.h:572
llvm::ISD::FP_TO_SINT_SAT
@ FP_TO_SINT_SAT
FP_TO_[US]INT_SAT - Convert floating point value in operand 0 to a signed or unsigned scalar integer ...
Definition: ISDOpcodes.h:838
llvm::ISD::SADDO_CARRY
@ SADDO_CARRY
Carry-using overflow-aware nodes for multiple precision addition and subtraction.
Definition: ISDOpcodes.h:313
llvm::ISD::VECREDUCE_MUL
@ VECREDUCE_MUL
Definition: ISDOpcodes.h:1285
llvm::ISD::UMULFIXSAT
@ UMULFIXSAT
Definition: ISDOpcodes.h:374
llvm::ISD::STRICT_FP_TO_FP16
@ STRICT_FP_TO_FP16
Definition: ISDOpcodes.h:898
llvm::ISD::BR
@ BR
Control flow instructions. These all have token chains.
Definition: ISDOpcodes.h:981
llvm::ISD::TargetExternalSymbol
@ TargetExternalSymbol
Definition: ISDOpcodes.h:169
llvm::ISD::FCOS
@ FCOS
Definition: ISDOpcodes.h:915
llvm::ISD::FCEIL
@ FCEIL
Definition: ISDOpcodes.h:923
llvm::ISD::FSIN
@ FSIN
Definition: ISDOpcodes.h:914
ISDOpcodes.h
llvm::ISD::INLINEASM_BR
@ INLINEASM_BR
INLINEASM_BR - Branching version of inline asm. Used by asm-goto.
Definition: ISDOpcodes.h:1027
llvm::ISD::BUILD_VECTOR
@ BUILD_VECTOR
BUILD_VECTOR(ELT0, ELT1, ELT2, ELT3,...) - Return a fixed-width vector with the specified,...
Definition: ISDOpcodes.h:514
Casting.h
llvm::ISD::STRICT_FCEIL
@ STRICT_FCEIL
Definition: ISDOpcodes.h:425
llvm::ISD::FRAME_TO_ARGS_OFFSET
@ FRAME_TO_ARGS_OFFSET
FRAME_TO_ARGS_OFFSET - This node represents offset from frame pointer to first (possible) on-stack ar...
Definition: ISDOpcodes.h:124
Function.h
llvm::ISD::SUBC
@ SUBC
Definition: ISDOpcodes.h:270
llvm::ISD::VECREDUCE_OR
@ VECREDUCE_OR
Definition: ISDOpcodes.h:1287
llvm::ISD::SETUO
@ SETUO
Definition: ISDOpcodes.h:1438
llvm::ISD::SDIV
@ SDIV
Definition: ISDOpcodes.h:242
llvm::ISD::TargetConstant
@ TargetConstant
TargetConstant* - Like Constant*, but the DAG does not do any folding, simplification,...
Definition: ISDOpcodes.h:158
llvm::ISD::PREALLOCATED_ARG
@ PREALLOCATED_ARG
Definition: ISDOpcodes.h:1093
llvm::SDNode::getNumValues
unsigned getNumValues() const
Return the number of values defined/returned by this operator.
Definition: SelectionDAGNodes.h:983
llvm::ISD::EH_RETURN
@ EH_RETURN
OUTCHAIN = EH_RETURN(INCHAIN, OFFSET, HANDLER) - This node represents 'eh_return' gcc dwarf builtin,...
Definition: ISDOpcodes.h:135
hasNoSignedWrap
static bool hasNoSignedWrap(BinaryOperator &I)
Definition: InstructionCombining.cpp:306
llvm::ISD::STORE
@ STORE
Definition: ISDOpcodes.h:966
llvm::ISD::VACOPY
@ VACOPY
VACOPY - VACOPY has 5 operands: an input chain, a destination pointer, a source pointer,...
Definition: ISDOpcodes.h:1081
llvm::ISD::SRL_PARTS
@ SRL_PARTS
Definition: ISDOpcodes.h:751
llvm::ISD::UINT_TO_FP
@ UINT_TO_FP
Definition: ISDOpcodes.h:774
llvm::ISD::ADD
@ ADD
Simple integer binary arithmetic operators.
Definition: ISDOpcodes.h:239
llvm::ISD::SSUBO
@ SSUBO
Same for subtraction.
Definition: ISDOpcodes.h:327
llvm::SDNode::getMachineOpcode
unsigned getMachineOpcode() const
This may only be called if isMachineOpcode returns true.
Definition: SelectionDAGNodes.h:704
llvm::ISD::STRICT_FFLOOR
@ STRICT_FFLOOR
Definition: ISDOpcodes.h:426
llvm::ISD::IS_FPCLASS
@ IS_FPCLASS
Performs a check of floating point class property, defined by IEEE-754.
Definition: ISDOpcodes.h:506
llvm::ISD::SETOGE
@ SETOGE
Definition: ISDOpcodes.h:1433
llvm::ISD::FP_EXTEND
@ FP_EXTEND
X = FP_EXTEND(Y) - Extend a smaller FP type into a larger FP type.
Definition: ISDOpcodes.h:870
llvm::MachineFrameInfo
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted.
Definition: MachineFrameInfo.h:106
llvm::ISD::FGETSIGN
@ FGETSIGN
INT = FGETSIGN(FP) - Return the sign bit of the specified floating point value as an integer 0/1 valu...
Definition: ISDOpcodes.h:496
llvm::ISD::RegisterMask
@ RegisterMask
Definition: ISDOpcodes.h:75
llvm::ISD::ATOMIC_LOAD_UINC_WRAP
@ ATOMIC_LOAD_UINC_WRAP
Definition: ISDOpcodes.h:1202
llvm::ISD::FSUB
@ FSUB
Definition: ISDOpcodes.h:391
llvm::ISD::PREFETCH
@ PREFETCH
PREFETCH - This corresponds to a prefetch intrinsic.
Definition: ISDOpcodes.h:1145
llvm::ISD::BF16_TO_FP
@ BF16_TO_FP
BF16_TO_FP, FP_TO_BF16 - These operators are used to perform promotions and truncation for bfloat16.
Definition: ISDOpcodes.h:904
llvm::ISD::SHL
@ SHL
Shift and rotation operations.
Definition: ISDOpcodes.h:691
llvm::ISD::READCYCLECOUNTER
@ READCYCLECOUNTER
READCYCLECOUNTER - This corresponds to the readcyclecounter intrinsic.
Definition: ISDOpcodes.h:1112
llvm::ISD::FREM
@ FREM
Definition: ISDOpcodes.h:394
llvm::Printable
Simple wrapper around std::function<void(raw_ostream&)>.
Definition: Printable.h:38
llvm::ISD::MUL
@ MUL
Definition: ISDOpcodes.h:241
llvm::ISD::UREM
@ UREM
Definition: ISDOpcodes.h:245
TargetIntrinsicInfo.h
llvm::ISD::ZERO_EXTEND_VECTOR_INREG
@ ZERO_EXTEND_VECTOR_INREG
ZERO_EXTEND_VECTOR_INREG(Vector) - This operator represents an in-register zero-extension of the low ...
Definition: ISDOpcodes.h:814
llvm::ISD::BITREVERSE
@ BITREVERSE
Definition: ISDOpcodes.h:704
llvm::ISD::SUBE
@ SUBE
Definition: ISDOpcodes.h:280
llvm::ISD::SRL
@ SRL
Definition: ISDOpcodes.h:693
llvm::ISD::ATOMIC_LOAD_UDEC_WRAP
@ ATOMIC_LOAD_UDEC_WRAP
Definition: ISDOpcodes.h:1203
llvm::ISD::ADDROFRETURNADDR
@ ADDROFRETURNADDR
ADDROFRETURNADDR - Represents the llvm.addressofreturnaddress intrinsic.
Definition: ISDOpcodes.h:101
llvm::ISD::CTTZ
@ CTTZ
Definition: ISDOpcodes.h:701
llvm::ISD::TargetJumpTable
@ TargetJumpTable
Definition: ISDOpcodes.h:167
llvm::ISD::STRICT_FADD
@ STRICT_FADD
Constrained versions of the binary floating point operators.
Definition: ISDOpcodes.h:400
llvm::ISD::PARITY
@ PARITY
Definition: ISDOpcodes.h:705
llvm::ISD::STRICT_LLROUND
@ STRICT_LLROUND
Definition: ISDOpcodes.h:431
llvm::ISD::UMIN
@ UMIN
Definition: ISDOpcodes.h:662
ModuleSlotTracker.h
MachineMemOperand.h
llvm::ISD::SETFALSE2
@ SETFALSE2
Definition: ISDOpcodes.h:1447
llvm::ISD::MULHU
@ MULHU
MULHU/MULHS - Multiply high - Multiply two integers of type iN, producing an unsigned/signed value of...
Definition: ISDOpcodes.h:637
llvm::ISD::LROUND
@ LROUND
Definition: ISDOpcodes.h:930
llvm::ISD::STRICT_FREM
@ STRICT_FREM
Definition: ISDOpcodes.h:404
llvm::StringRef::str
std::string str() const
str - Get the contents as an std::string.
Definition: StringRef.h:222
llvm::ISD::SETONE
@ SETONE
Definition: ISDOpcodes.h:1436
llvm::ISD::INTRINSIC_W_CHAIN
@ INTRINSIC_W_CHAIN
RESULT,OUTCHAIN = INTRINSIC_W_CHAIN(INCHAIN, INTRINSICID, arg1, ...) This node represents a target in...
Definition: ISDOpcodes.h:192
llvm::ISD::FNEG
@ FNEG
Perform various unary floating-point operations inspired by libm.
Definition: ISDOpcodes.h:910
llvm::ISD::STRICT_FEXP2
@ STRICT_FEXP2
Definition: ISDOpcodes.h:417
llvm::ISD::GET_ROUNDING
@ GET_ROUNDING
Returns current rounding mode: -1 Undefined 0 Round to 0 1 Round to nearest, ties to even 2 Round to ...
Definition: ISDOpcodes.h:862
llvm::ISD::BUILD_PAIR
@ BUILD_PAIR
BUILD_PAIR - This is the opposite of EXTRACT_ELEMENT in some ways.
Definition: ISDOpcodes.h:229
llvm::ISD::VAARG
@ VAARG
VAARG - VAARG has four operands: an input chain, a pointer, a SRCVALUE, and the alignment.
Definition: ISDOpcodes.h:1076
llvm::ISD::UDIVFIX
@ UDIVFIX
Definition: ISDOpcodes.h:381
llvm::ISD::SDIVREM
@ SDIVREM
SDIVREM/UDIVREM - Divide two integers and produce both a quotient and remainder result.
Definition: ISDOpcodes.h:255
llvm::ISD::STRICT_FPOWI
@ STRICT_FPOWI
Definition: ISDOpcodes.h:413
llvm::cl::desc
Definition: CommandLine.h:411
llvm::ISD::ATOMIC_LOAD_XOR
@ ATOMIC_LOAD_XOR
Definition: ISDOpcodes.h:1192
hasNoInfs
static bool hasNoInfs(const TargetOptions &Options, SDValue N)
Definition: DAGCombiner.cpp:14583
llvm::ISD::TargetFrameIndex
@ TargetFrameIndex
Definition: ISDOpcodes.h:166
llvm::ISD::VECREDUCE_SMIN
@ VECREDUCE_SMIN
Definition: ISDOpcodes.h:1290
llvm::ISD::SIGN_EXTEND
@ SIGN_EXTEND
Conversion operators.
Definition: ISDOpcodes.h:760
raw_ostream.h
llvm::ISD::VECREDUCE_UMIN
@ VECREDUCE_UMIN
Definition: ISDOpcodes.h:1292
n
The same transformation can work with an even modulo with the addition of a and shrink the compare RHS by the same amount Unless the target supports that transformation probably isn t worthwhile The transformation can also easily be made to work with non zero equality for n
Definition: README.txt:685
llvm::ISD::FTRUNC
@ FTRUNC
Definition: ISDOpcodes.h:924
llvm::SDNode::getFlags
SDNodeFlags getFlags() const
Definition: SelectionDAGNodes.h:972
Value.h
llvm::ISD::INSERT_VECTOR_ELT
@ INSERT_VECTOR_ELT
INSERT_VECTOR_ELT(VECTOR, VAL, IDX) - Returns VECTOR with the element at IDX replaced with VAL.
Definition: ISDOpcodes.h:523
llvm::ISD::FCANONICALIZE
@ FCANONICALIZE
Returns platform specific canonical encoding of a floating point number.
Definition: ISDOpcodes.h:499
llvm::ISD::STACKSAVE
@ STACKSAVE
STACKSAVE - STACKSAVE has one operand, an input chain.
Definition: ISDOpcodes.h:1052
llvm::ISD::FLOG
@ FLOG
Definition: ISDOpcodes.h:918
llvm::ISD::ADDE
@ ADDE
Carry-using nodes for multiple precision addition and subtraction.
Definition: ISDOpcodes.h:279
llvm::ISD::FP_ROUND
@ FP_ROUND
X = FP_ROUND(Y, TRUNC) - Rounding 'Y' from a larger floating point type down to the precision of the ...
Definition: ISDOpcodes.h:852
llvm::ISD::ROTR
@ ROTR
Definition: ISDOpcodes.h:695
TargetRegisterInfo.h
llvm::ISD::AVGFLOORS
@ AVGFLOORS
AVGFLOORS/AVGFLOORU - Averaging add - Add two integers using an integer of type i[N+1],...
Definition: ISDOpcodes.h:643
Debug.h
llvm::ISD::SET_ROUNDING
@ SET_ROUNDING
Set rounding mode.
Definition: ISDOpcodes.h:867
llvm::ISD::ATOMIC_LOAD
@ ATOMIC_LOAD
Val, OUTCHAIN = ATOMIC_LOAD(INCHAIN, ptr) This corresponds to "load atomic" instruction.
Definition: ISDOpcodes.h:1161
llvm::ISD::SCALAR_TO_VECTOR
@ SCALAR_TO_VECTOR
SCALAR_TO_VECTOR(VAL) - This represents the operation of loading a scalar value into element 0 of the...
Definition: ISDOpcodes.h:606
llvm::ISD::CTPOP
@ CTPOP
Definition: ISDOpcodes.h:703
llvm::ISD::MCSymbol
@ MCSymbol
Definition: ISDOpcodes.h:172
llvm::ISD::SADDSAT
@ SADDSAT
RESULT = [US]ADDSAT(LHS, RHS) - Perform saturation addition on 2 integers with the same bit width (W)...
Definition: ISDOpcodes.h:340
llvm::ISD::ATOMIC_LOAD_MAX
@ ATOMIC_LOAD_MAX
Definition: ISDOpcodes.h:1195
llvm::ISD::TokenFactor
@ TokenFactor
TokenFactor - This node takes multiple tokens as input and produces a single token result.
Definition: ISDOpcodes.h:52
llvm::ISD::EXTRACT_ELEMENT
@ EXTRACT_ELEMENT
EXTRACT_ELEMENT - This is used to get the lower or upper (determined by a Constant,...
Definition: ISDOpcodes.h:222
llvm::ISD::MSCATTER
@ MSCATTER
Definition: ISDOpcodes.h:1224
llvm::Intrinsic::ID
unsigned ID
Definition: TargetTransformInfo.h:39
llvm::ISD::VSELECT
@ VSELECT
Select with a vector condition (op #0) and two vector operands (ops #1 and #2), returning a vector re...
Definition: ISDOpcodes.h:722
VerboseDAGDumping
static cl::opt< bool > VerboseDAGDumping("dag-dump-verbose", cl::Hidden, cl::desc("Display more information when dumping selection " "DAG nodes."))
llvm::ISD::FDIV
@ FDIV
Definition: ISDOpcodes.h:393
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