LLVM  10.0.0svn
WebAssemblyISelDAGToDAG.cpp
Go to the documentation of this file.
1 //- WebAssemblyISelDAGToDAG.cpp - A dag to dag inst selector for WebAssembly -//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 ///
9 /// \file
10 /// This file defines an instruction selector for the WebAssembly target.
11 ///
12 //===----------------------------------------------------------------------===//
13 
15 #include "WebAssembly.h"
18 #include "llvm/IR/DiagnosticInfo.h"
19 #include "llvm/IR/Function.h" // To access function attributes.
20 #include "llvm/Support/Debug.h"
21 #include "llvm/Support/KnownBits.h"
24 using namespace llvm;
25 
26 #define DEBUG_TYPE "wasm-isel"
27 
28 //===--------------------------------------------------------------------===//
29 /// WebAssembly-specific code to select WebAssembly machine instructions for
30 /// SelectionDAG operations.
31 ///
32 namespace {
33 class WebAssemblyDAGToDAGISel final : public SelectionDAGISel {
34  /// Keep a pointer to the WebAssemblySubtarget around so that we can make the
35  /// right decision when generating code for different targets.
36  const WebAssemblySubtarget *Subtarget;
37 
38  bool ForCodeSize;
39 
40 public:
41  WebAssemblyDAGToDAGISel(WebAssemblyTargetMachine &TM,
42  CodeGenOpt::Level OptLevel)
43  : SelectionDAGISel(TM, OptLevel), Subtarget(nullptr), ForCodeSize(false) {
44  }
45 
46  StringRef getPassName() const override {
47  return "WebAssembly Instruction Selection";
48  }
49 
50  bool runOnMachineFunction(MachineFunction &MF) override {
51  LLVM_DEBUG(dbgs() << "********** ISelDAGToDAG **********\n"
52  "********** Function: "
53  << MF.getName() << '\n');
54 
55  ForCodeSize = MF.getFunction().hasOptSize();
56  Subtarget = &MF.getSubtarget<WebAssemblySubtarget>();
57 
58  // Wasm64 is not fully supported right now (and is not specified)
59  if (Subtarget->hasAddr64())
61  "64-bit WebAssembly (wasm64) is not currently supported");
62 
64  }
65 
66  void Select(SDNode *Node) override;
67 
68  bool SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID,
69  std::vector<SDValue> &OutOps) override;
70 
71 // Include the pieces autogenerated from the target description.
72 #include "WebAssemblyGenDAGISel.inc"
73 
74 private:
75  // add select functions here...
76 };
77 } // end anonymous namespace
78 
80  // If we have a custom node, we already have selected!
81  if (Node->isMachineOpcode()) {
82  LLVM_DEBUG(errs() << "== "; Node->dump(CurDAG); errs() << "\n");
83  Node->setNodeId(-1);
84  return;
85  }
86 
87  // Few custom selection stuff.
88  SDLoc DL(Node);
89  MachineFunction &MF = CurDAG->getMachineFunction();
90  switch (Node->getOpcode()) {
91  case ISD::ATOMIC_FENCE: {
93  break;
94 
95  uint64_t SyncScopeID =
96  cast<ConstantSDNode>(Node->getOperand(2).getNode())->getZExtValue();
97  MachineSDNode *Fence = nullptr;
98  switch (SyncScopeID) {
100  // We lower a single-thread fence to a pseudo compiler barrier instruction
101  // preventing instruction reordering. This will not be emitted in final
102  // binary.
103  Fence = CurDAG->getMachineNode(WebAssembly::COMPILER_FENCE,
104  DL, // debug loc
105  MVT::Other, // outchain type
106  Node->getOperand(0) // inchain
107  );
108  break;
109  case SyncScope::System:
110  // Currently wasm only supports sequentially consistent atomics, so we
111  // always set the order to 0 (sequentially consistent).
112  Fence = CurDAG->getMachineNode(
114  DL, // debug loc
115  MVT::Other, // outchain type
116  CurDAG->getTargetConstant(0, DL, MVT::i32), // order
117  Node->getOperand(0) // inchain
118  );
119  break;
120  default:
121  llvm_unreachable("Unknown scope!");
122  }
123 
124  ReplaceNode(Node, Fence);
125  CurDAG->RemoveDeadNode(Node);
126  return;
127  }
128 
129  case ISD::GlobalTLSAddress: {
130  const auto *GA = cast<GlobalAddressSDNode>(Node);
131 
133  report_fatal_error("cannot use thread-local storage without bulk memory",
134  false);
135 
136  // Currently Emscripten does not support dynamic linking with threads.
137  // Therefore, if we have thread-local storage, only the local-exec model
138  // is possible.
139  // TODO: remove this and implement proper TLS models once Emscripten
140  // supports dynamic linking with threads.
141  if (GA->getGlobal()->getThreadLocalMode() !=
143  !Subtarget->getTargetTriple().isOSEmscripten()) {
144  report_fatal_error("only -ftls-model=local-exec is supported for now on "
145  "non-Emscripten OSes: variable " +
146  GA->getGlobal()->getName(),
147  false);
148  }
149 
150  MVT PtrVT = TLI->getPointerTy(CurDAG->getDataLayout());
151  assert(PtrVT == MVT::i32 && "only wasm32 is supported for now");
152 
153  SDValue TLSBaseSym = CurDAG->getTargetExternalSymbol("__tls_base", PtrVT);
154  SDValue TLSOffsetSym = CurDAG->getTargetGlobalAddress(
155  GA->getGlobal(), DL, PtrVT, GA->getOffset(), 0);
156 
157  MachineSDNode *TLSBase = CurDAG->getMachineNode(WebAssembly::GLOBAL_GET_I32,
158  DL, MVT::i32, TLSBaseSym);
159  MachineSDNode *TLSOffset = CurDAG->getMachineNode(
160  WebAssembly::CONST_I32, DL, MVT::i32, TLSOffsetSym);
161  MachineSDNode *TLSAddress =
162  CurDAG->getMachineNode(WebAssembly::ADD_I32, DL, MVT::i32,
163  SDValue(TLSBase, 0), SDValue(TLSOffset, 0));
164  ReplaceNode(Node, TLSAddress);
165  return;
166  }
167 
169  unsigned IntNo = cast<ConstantSDNode>(Node->getOperand(0))->getZExtValue();
170  switch (IntNo) {
171  case Intrinsic::wasm_tls_size: {
172  MVT PtrVT = TLI->getPointerTy(CurDAG->getDataLayout());
173  assert(PtrVT == MVT::i32 && "only wasm32 is supported for now");
174 
175  MachineSDNode *TLSSize = CurDAG->getMachineNode(
176  WebAssembly::GLOBAL_GET_I32, DL, PtrVT,
177  CurDAG->getTargetExternalSymbol("__tls_size", MVT::i32));
178  ReplaceNode(Node, TLSSize);
179  return;
180  }
181  case Intrinsic::wasm_tls_align: {
182  MVT PtrVT = TLI->getPointerTy(CurDAG->getDataLayout());
183  assert(PtrVT == MVT::i32 && "only wasm32 is supported for now");
184 
185  MachineSDNode *TLSAlign = CurDAG->getMachineNode(
186  WebAssembly::GLOBAL_GET_I32, DL, PtrVT,
187  CurDAG->getTargetExternalSymbol("__tls_align", MVT::i32));
188  ReplaceNode(Node, TLSAlign);
189  return;
190  }
191  }
192  break;
193  }
194  case ISD::INTRINSIC_W_CHAIN: {
195  unsigned IntNo = cast<ConstantSDNode>(Node->getOperand(1))->getZExtValue();
196  switch (IntNo) {
197  case Intrinsic::wasm_tls_base: {
198  MVT PtrVT = TLI->getPointerTy(CurDAG->getDataLayout());
199  assert(PtrVT == MVT::i32 && "only wasm32 is supported for now");
200 
201  MachineSDNode *TLSBase = CurDAG->getMachineNode(
202  WebAssembly::GLOBAL_GET_I32, DL, MVT::i32, MVT::Other,
203  CurDAG->getTargetExternalSymbol("__tls_base", PtrVT),
204  Node->getOperand(0));
205  ReplaceNode(Node, TLSBase);
206  return;
207  }
208  }
209  break;
210  }
211 
212  default:
213  break;
214  }
215 
216  // Select the default instruction.
217  SelectCode(Node);
218 }
219 
220 bool WebAssemblyDAGToDAGISel::SelectInlineAsmMemoryOperand(
221  const SDValue &Op, unsigned ConstraintID, std::vector<SDValue> &OutOps) {
222  switch (ConstraintID) {
225  // We just support simple memory operands that just have a single address
226  // operand and need no special handling.
227  OutOps.push_back(Op);
228  return false;
229  default:
230  break;
231  }
232 
233  return true;
234 }
235 
236 /// This pass converts a legalized DAG into a WebAssembly-specific DAG, ready
237 /// for instruction scheduling.
239  CodeGenOpt::Level OptLevel) {
240  return new WebAssemblyDAGToDAGISel(TM, OptLevel);
241 }
raw_ostream & errs()
This returns a reference to a raw_ostream for standard error.
unsigned getOpcode() const
Return the SelectionDAG opcode value for this node.
LLVM_ATTRIBUTE_NORETURN void report_fatal_error(Error Err, bool gen_crash_diag=true)
Report a serious error, calling any installed error handler.
Definition: Error.cpp:139
This class represents lattice values for constants.
Definition: AllocatorList.h:23
bool hasOptSize() const
Optimize this function for size (-Os) or minimum size (-Oz).
Definition: Function.h:627
void setNodeId(int Id)
Set unique node id.
SDNode * getNode() const
get the SDNode which holds the desired result
This file contains the entry points for global functions defined in the LLVM WebAssembly back-end...
OUTCHAIN = ATOMIC_FENCE(INCHAIN, ordering, scope) This corresponds to the fence instruction.
Definition: ISDOpcodes.h:820
RESULT,OUTCHAIN = INTRINSIC_W_CHAIN(INCHAIN, INTRINSICID, arg1, ...) This node represents a target in...
Definition: ISDOpcodes.h:158
bool runOnMachineFunction(MachineFunction &MF) override
runOnMachineFunction - This method must be overloaded to perform the desired machine code transformat...
This file declares the WebAssembly-specific subclass of TargetMachine.
RESULT = INTRINSIC_WO_CHAIN(INTRINSICID, arg1, arg2, ...) This node represents a target intrinsic fun...
Definition: ISDOpcodes.h:150
StringRef getName() const
getName - Return the name of the corresponding LLVM function.
Machine Value Type.
FunctionPass * createWebAssemblyISelDag(WebAssemblyTargetMachine &TM, CodeGenOpt::Level OptLevel)
This pass converts a legalized DAG into a WebAssembly-specific DAG, ready for instruction scheduling...
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
const SDValue & getOperand(unsigned Num) const
This file provides WebAssembly-specific target descriptions.
FunctionPass class - This class is used to implement most global optimizations.
Definition: Pass.h:284
bool isMachineOpcode() const
Test if this node has a post-isel opcode, directly corresponding to a MachineInstr opcode...
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
void dump() const
Dump this node, for debugging.
An SDNode that represents everything that will be needed to construct a MachineInstr.
Wrapper class for IR location info (IR ordering and DebugLoc) to be passed into SDNode creation funct...
Represents one node in the SelectionDAG.
SelectionDAGISel - This is the common base class used for SelectionDAG-based pattern-matching instruc...
const Function & getFunction() const
Return the LLVM function that this machine code represents.
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition: Debug.cpp:132
Synchronized with respect to all concurrently executing threads.
Definition: LLVMContext.h:54
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
Synchronized with respect to signal handlers executing in the same thread.
Definition: LLVMContext.h:51
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:48
#define LLVM_DEBUG(X)
Definition: Debug.h:122
Unlike LLVM values, Selection DAG nodes may return multiple values as the result of a computation...