LLVM 20.0.0git
llvm::SPIRVRegisterBankInfo Member List

This is the complete list of members for llvm::SPIRVRegisterBankInfo, including all inherited members.

applyDefaultMapping(const OperandsMapper &OpdMapper)llvm::RegisterBankInfostatic
applyMapping(MachineIRBuilder &Builder, const OperandsMapper &OpdMapper) constllvm::RegisterBankInfoinline
applyMappingImpl(MachineIRBuilder &Builder, const OperandsMapper &OpdMapper) constllvm::RegisterBankInfoinlinevirtual
cannotCopy(const RegisterBank &Dst, const RegisterBank &Src, TypeSize Size) constllvm::RegisterBankInfoinline
constrainGenericRegister(Register Reg, const TargetRegisterClass &RC, MachineRegisterInfo &MRI)llvm::RegisterBankInfostatic
copyCost(const RegisterBank &A, const RegisterBank &B, TypeSize Size) constllvm::RegisterBankInfoinlinevirtual
DefaultMappingIDllvm::RegisterBankInfostatic
getBreakDownCost(const ValueMapping &ValMapping, const RegisterBank *CurBank=nullptr) constllvm::RegisterBankInfoinlinevirtual
getInstrAlternativeMappings(const MachineInstr &MI) constllvm::RegisterBankInfovirtual
getInstrMapping(const MachineInstr &MI) constllvm::RegisterBankInfovirtual
getInstrMappingImpl(const MachineInstr &MI) constllvm::RegisterBankInfoprotected
getInstrPossibleMappings(const MachineInstr &MI) constllvm::RegisterBankInfo
getInstructionMapping(unsigned ID, unsigned Cost, const ValueMapping *OperandsMapping, unsigned NumOperands) constllvm::RegisterBankInfoinline
getInvalidInstructionMapping() constllvm::RegisterBankInfoinline
getMaximumSize(unsigned RegBankID) constllvm::RegisterBankInfoinline
getMinimalPhysRegClass(Register Reg, const TargetRegisterInfo &TRI) constllvm::RegisterBankInfoprotected
getNumRegBanks() constllvm::RegisterBankInfoinline
getOperandsMapping(Iterator Begin, Iterator End) constllvm::RegisterBankInfoprotected
getOperandsMapping(const SmallVectorImpl< const ValueMapping * > &OpdsMapping) constllvm::RegisterBankInfoprotected
getOperandsMapping(std::initializer_list< const ValueMapping * > OpdsMapping) constllvm::RegisterBankInfoprotected
getPartialMapping(unsigned StartIdx, unsigned Length, const RegisterBank &RegBank) constllvm::RegisterBankInfoprotected
getRegBank(unsigned ID)llvm::RegisterBankInfoinlineprotected
getRegBank(unsigned ID) constllvm::RegisterBankInfoinline
getRegBank(Register Reg, const MachineRegisterInfo &MRI, const TargetRegisterInfo &TRI) constllvm::RegisterBankInfo
getRegBankFromConstraints(const MachineInstr &MI, unsigned OpIdx, const TargetInstrInfo &TII, const MachineRegisterInfo &MRI) constllvm::RegisterBankInfo
getRegBankFromRegClass(const TargetRegisterClass &RC, LLT Ty) const overridellvm::SPIRVRegisterBankInfovirtual
getSizeInBits(Register Reg, const MachineRegisterInfo &MRI, const TargetRegisterInfo &TRI) constllvm::RegisterBankInfo
getValueMapping(unsigned StartIdx, unsigned Length, const RegisterBank &RegBank) constllvm::RegisterBankInfoprotected
getValueMapping(const PartialMapping *BreakDown, unsigned NumBreakDowns) constllvm::RegisterBankInfoprotected
HwModellvm::RegisterBankInfoprotected
InstructionMappings typedefllvm::RegisterBankInfo
InvalidMappingIDllvm::RegisterBankInfostatic
isDivergentRegBank(const RegisterBank *RB) constllvm::RegisterBankInfoinlinevirtual
MapOfInstructionMappingsllvm::RegisterBankInfomutableprotected
MapOfOperandsMappingsllvm::RegisterBankInfomutableprotected
MapOfPartialMappingsllvm::RegisterBankInfomutableprotected
MapOfValueMappingsllvm::RegisterBankInfomutableprotected
NumRegBanksllvm::RegisterBankInfoprotected
PhysRegMinimalRCsllvm::RegisterBankInfomutableprotected
RegBanksllvm::RegisterBankInfoprotected
RegisterBankInfo(const RegisterBank **RegBanks, unsigned NumRegBanks, const unsigned *Sizes, unsigned HwMode)llvm::RegisterBankInfoprotected
RegisterBankInfo()llvm::RegisterBankInfoinlineprotected
Sizesllvm::RegisterBankInfoprotected
verify(const TargetRegisterInfo &TRI) constllvm::RegisterBankInfo
~RegisterBankInfo()=defaultllvm::RegisterBankInfovirtual