LLVM 20.0.0git
x86_64.cpp
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1//===----- x86_64.cpp - Generic JITLink x86-64 edge kinds, utilities ------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// Generic utilities for graphs representing x86-64 objects.
10//
11//===----------------------------------------------------------------------===//
12
14
15#define DEBUG_TYPE "jitlink"
16
17namespace llvm {
18namespace jitlink {
19namespace x86_64 {
20
22 switch (K) {
23 case Pointer64:
24 return "Pointer64";
25 case Pointer32:
26 return "Pointer32";
27 case Pointer32Signed:
28 return "Pointer32Signed";
29 case Pointer16:
30 return "Pointer16";
31 case Pointer8:
32 return "Pointer8";
33 case Delta64:
34 return "Delta64";
35 case Delta32:
36 return "Delta32";
37 case Delta16:
38 return "Delta16";
39 case Delta8:
40 return "Delta8";
41 case NegDelta64:
42 return "NegDelta64";
43 case NegDelta32:
44 return "NegDelta32";
45 case Size64:
46 return "Size64";
47 case Size32:
48 return "Size32";
49 case Delta64FromGOT:
50 return "Delta64FromGOT";
51 case PCRel32:
52 return "PCRel32";
53 case BranchPCRel32:
54 return "BranchPCRel32";
56 return "BranchPCRel32ToPtrJumpStub";
58 return "BranchPCRel32ToPtrJumpStubBypassable";
60 return "RequestGOTAndTransformToDelta32";
62 return "RequestGOTAndTransformToDelta64";
64 return "RequestGOTAndTransformToDelta64FromGOT";
66 return "PCRel32GOTLoadREXRelaxable";
68 return "RequestGOTAndTransformToPCRel32GOTLoadREXRelaxable";
70 return "PCRel32GOTLoadRelaxable";
72 return "RequestGOTAndTransformToPCRel32GOTLoadRelaxable";
74 return "PCRel32TLVPLoadREXRelaxable";
76 return "RequestTLVPAndTransformToPCRel32TLVPLoadREXRelaxable";
77 default:
78 return getGenericEdgeKindName(static_cast<Edge::Kind>(K));
79 }
80}
81
82const char NullPointerContent[PointerSize] = {0x00, 0x00, 0x00, 0x00,
83 0x00, 0x00, 0x00, 0x00};
84
85const char PointerJumpStubContent[6] = {
86 static_cast<char>(0xFFu), 0x25, 0x00, 0x00, 0x00, 0x00};
87
88const char ReentryTrampolineContent[5] = {
89 static_cast<char>(0xe8), 0x00, 0x00, 0x00, 0x00
90};
91
93 LLVM_DEBUG(dbgs() << "Optimizing GOT entries and stubs:\n");
94
95 for (auto *B : G.blocks())
96 for (auto &E : B->edges()) {
97 if (E.getKind() == x86_64::PCRel32GOTLoadRelaxable ||
99#ifndef NDEBUG
100 bool REXPrefix = E.getKind() == x86_64::PCRel32GOTLoadREXRelaxable;
101 assert(E.getOffset() >= (REXPrefix ? 3u : 2u) &&
102 "GOT edge occurs too early in block");
103#endif
104 auto *FixupData = reinterpret_cast<uint8_t *>(
105 const_cast<char *>(B->getContent().data())) +
106 E.getOffset();
107 const uint8_t Op = FixupData[-2];
108 const uint8_t ModRM = FixupData[-1];
109
110 auto &GOTEntryBlock = E.getTarget().getBlock();
111 assert(GOTEntryBlock.getSize() == G.getPointerSize() &&
112 "GOT entry block should be pointer sized");
113 assert(GOTEntryBlock.edges_size() == 1 &&
114 "GOT entry should only have one outgoing edge");
115 auto &GOTTarget = GOTEntryBlock.edges().begin()->getTarget();
116 orc::ExecutorAddr TargetAddr = GOTTarget.getAddress();
117 orc::ExecutorAddr EdgeAddr = B->getFixupAddress(E);
118 int64_t Displacement = TargetAddr - EdgeAddr + 4;
119 bool TargetInRangeForImmU32 = isUInt<32>(TargetAddr.getValue());
120 bool DisplacementInRangeForImmS32 = isInt<32>(Displacement);
121
122 // If both of the Target and displacement is out of range, then
123 // there isn't optimization chance.
124 if (!(TargetInRangeForImmU32 || DisplacementInRangeForImmS32))
125 continue;
126
127 // Transform "mov foo@GOTPCREL(%rip),%reg" to "lea foo(%rip),%reg".
128 if (Op == 0x8b && DisplacementInRangeForImmS32) {
129 FixupData[-2] = 0x8d;
130 E.setKind(x86_64::Delta32);
131 E.setTarget(GOTTarget);
132 E.setAddend(E.getAddend() - 4);
133 LLVM_DEBUG({
134 dbgs() << " Replaced GOT load wih LEA:\n ";
135 printEdge(dbgs(), *B, E, getEdgeKindName(E.getKind()));
136 dbgs() << "\n";
137 });
138 continue;
139 }
140
141 // Transform call/jmp instructions
142 if (Op == 0xff && TargetInRangeForImmU32) {
143 if (ModRM == 0x15) {
144 // ABI says we can convert "call *foo@GOTPCREL(%rip)" to "nop; call
145 // foo" But lld convert it to "addr32 call foo, because that makes
146 // result expression to be a single instruction.
147 FixupData[-2] = 0x67;
148 FixupData[-1] = 0xe8;
149 LLVM_DEBUG({
150 dbgs() << " replaced call instruction's memory operand wih imm "
151 "operand:\n ";
152 printEdge(dbgs(), *B, E, getEdgeKindName(E.getKind()));
153 dbgs() << "\n";
154 });
155 } else {
156 // Transform "jmp *foo@GOTPCREL(%rip)" to "jmp foo; nop"
157 assert(ModRM == 0x25 && "Invalid ModRm for call/jmp instructions");
158 FixupData[-2] = 0xe9;
159 FixupData[3] = 0x90;
160 E.setOffset(E.getOffset() - 1);
161 LLVM_DEBUG({
162 dbgs() << " replaced jmp instruction's memory operand wih imm "
163 "operand:\n ";
164 printEdge(dbgs(), *B, E, getEdgeKindName(E.getKind()));
165 dbgs() << "\n";
166 });
167 }
168 E.setKind(x86_64::Pointer32);
169 E.setTarget(GOTTarget);
170 continue;
171 }
172 } else if (E.getKind() == x86_64::BranchPCRel32ToPtrJumpStubBypassable) {
173 auto &StubBlock = E.getTarget().getBlock();
174 assert(StubBlock.getSize() == sizeof(PointerJumpStubContent) &&
175 "Stub block should be stub sized");
176 assert(StubBlock.edges_size() == 1 &&
177 "Stub block should only have one outgoing edge");
178
179 auto &GOTBlock = StubBlock.edges().begin()->getTarget().getBlock();
180 assert(GOTBlock.getSize() == G.getPointerSize() &&
181 "GOT block should be pointer sized");
182 assert(GOTBlock.edges_size() == 1 &&
183 "GOT block should only have one outgoing edge");
184
185 auto &GOTTarget = GOTBlock.edges().begin()->getTarget();
186 orc::ExecutorAddr EdgeAddr = B->getAddress() + E.getOffset();
187 orc::ExecutorAddr TargetAddr = GOTTarget.getAddress();
188
189 int64_t Displacement = TargetAddr - EdgeAddr + 4;
190 if (isInt<32>(Displacement)) {
191 E.setKind(x86_64::BranchPCRel32);
192 E.setTarget(GOTTarget);
193 LLVM_DEBUG({
194 dbgs() << " Replaced stub branch with direct branch:\n ";
195 printEdge(dbgs(), *B, E, getEdgeKindName(E.getKind()));
196 dbgs() << "\n";
197 });
198 }
199 }
200 }
201
202 return Error::success();
203}
204
205} // end namespace x86_64
206} // end namespace jitlink
207} // end namespace llvm
static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
#define LLVM_DEBUG(...)
Definition: Debug.h:106
#define G(x, y, z)
Definition: MD5.cpp:56
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
This class represents an Operation in the Expression.
Lightweight error class with error context and mandatory checking.
Definition: Error.h:160
static ErrorSuccess success()
Create a success value.
Definition: Error.h:337
Represents an address in the executor process.
uint64_t getValue() const
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition: Debug.cpp:163