14#ifndef LLVM_LIB_TARGET_AARCH64_AARCH64PERFECTSHUFFLE_H
15#define LLVM_LIB_TARGET_AARCH64_AARCH64PERFECTSHUFFLE_H
6592 assert(M.size() == 4 &&
"Expected a 4 entry perfect shuffle");
6596 return E.value() < 0 ||
E.value() == (
int)
E.index();
6600 return E.value() < 0 ||
E.value() == (
int)
E.index() + 4;
6606 unsigned PFIndexes[4];
6607 for (
unsigned i = 0; i != 4; ++i) {
6608 assert(M[i] < 8 &&
"Expected a maximum entry of 8 for shuffle mask");
6612 PFIndexes[i] = M[i];
6616 unsigned PFTableIndex = PFIndexes[0] * 9 * 9 * 9 + PFIndexes[1] * 9 * 9 +
6617 PFIndexes[2] * 9 + PFIndexes[3];
6620 return (PFEntry >> 30) + 1;
6627 unsigned &WhichResultOut) {
6628 if (NumElts % 2 != 0)
6631 unsigned WhichResult = 2;
6632 for (
unsigned i = 0; i != NumElts / 2; i++) {
6633 if (M[i * 2] >= 0) {
6634 WhichResult = ((
unsigned)M[i * 2] == i ? 0 : 1);
6636 }
else if (M[i * 2 + 1] >= 0) {
6637 WhichResult = ((
unsigned)M[i * 2 + 1] == NumElts + i ? 0 : 1);
6641 if (WhichResult == 2)
6645 unsigned Idx = WhichResult * NumElts / 2;
6646 for (
unsigned i = 0; i != NumElts; i += 2) {
6647 if ((M[i] >= 0 && (
unsigned)M[i] !=
Idx) ||
6648 (M[i + 1] >= 0 && (
unsigned)M[i + 1] !=
Idx + NumElts))
6652 WhichResultOut = WhichResult;
6660 unsigned &WhichResultOut) {
6662 unsigned WhichResult = 2;
6663 for (
unsigned i = 0; i != NumElts; i++) {
6665 WhichResult = ((
unsigned)M[i] == i * 2 ? 0 : 1);
6669 if (WhichResult == 2)
6673 for (
unsigned i = 0; i != NumElts; ++i) {
6676 if ((
unsigned)M[i] != 2 * i + WhichResult)
6679 WhichResultOut = WhichResult;
6687 unsigned &WhichResult) {
6688 if (NumElts % 2 != 0)
6690 WhichResult = (M[0] == 0 ? 0 : 1);
6691 for (
unsigned i = 0; i < NumElts; i += 2) {
6692 if ((M[i] >= 0 && (
unsigned)M[i] != i + WhichResult) ||
6693 (M[i + 1] >= 0 && (
unsigned)M[i + 1] != i + NumElts + WhichResult))
6706 "Only possible block sizes for REV are: 16, 32, 64, 128");
6708 unsigned BlockElts = M[0] + 1;
6716 for (
unsigned i = 0; i < NumElts; ++i) {
6719 if ((
unsigned)M[i] != (i - i % BlockElts) + (BlockElts - 1 - i % BlockElts))
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
Returns the sub type a function will return at a given Idx Should correspond to the result type of an ExtractValue instruction executed with just that one unsigned Idx
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
static const int BlockSize
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
This is an optimization pass for GlobalISel generic memory operations.
bool all_of(R &&range, UnaryPredicate P)
Provide wrappers to std::all_of which take ranges instead of having to pass begin/end explicitly.
auto enumerate(FirstRange &&First, RestRanges &&...Rest)
Given two or more input ranges, returns a new range whose values are tuples (A, B,...
bool isTRNMask(ArrayRef< int > M, unsigned NumElts, unsigned &WhichResult)
Return true for trn1 or trn2 masks of the form: <0, 8, 2, 10, 4, 12, 6, 14> or <1,...
unsigned getPerfectShuffleCost(llvm::ArrayRef< int > M)
bool isUZPMask(ArrayRef< int > M, unsigned NumElts, unsigned &WhichResultOut)
Return true for uzp1 or uzp2 masks of the form: <0, 2, 4, 6, 8, 10, 12, 14> or <1,...
bool isREVMask(ArrayRef< int > M, unsigned EltSize, unsigned NumElts, unsigned BlockSize)
isREVMask - Check if a vector shuffle corresponds to a REV instruction with the specified blocksize.
bool isZIPMask(ArrayRef< int > M, unsigned NumElts, unsigned &WhichResultOut)
Return true for zip1 or zip2 masks of the form: <0, 8, 1, 9, 2, 10, 3, 11> or <4, 12,...
static const unsigned PerfectShuffleTable[6561+1]