LLVM  mainline
Namespace List
Here is a list of all namespaces with brief descriptions:
AMDGPUASOpenCL uses address spaces to differentiate between various memory regions on the hardware
CU
false
fuzzer
llvmCompute iterated dominance frontiers using a linear time algorithm
llvm::AArch64
llvm::AArch64_AMAArch64_AM - AArch64 Addressing Mode Stuff
llvm::AArch64AT
llvm::AArch64CC
llvm::AArch64DB
llvm::AArch64DC
llvm::AArch64IC
llvm::AArch64II
llvm::AArch64ISB
llvm::AArch64ISD
llvm::AArch64Layout
llvm::AArch64PRFM
llvm::AArch64PState
llvm::AArch64SE
llvm::AArch64SysReg
llvm::AArch64TLBI
llvm::AMDGPU
llvm::AMDGPUIntrinsic
llvm::AMDGPUISD
llvm::APIntOps
llvm::ARMDefine some predicates that are used for node matching
llvm::ARM::EHABI
llvm::ARM::WinEH
llvm::ARM_AMARM_AM - ARM Addressing Mode Stuff
llvm::ARM_ISB
llvm::ARM_MB
llvm::ARM_MC
llvm::ARM_PROC
llvm::ARMBuildAttrs
llvm::ARMCC
llvm::ARMCP
llvm::ARMIIARMII - This namespace holds all of the target specific flags that instruction info tracks
llvm::ARMISD
llvm::ARMRIRegister allocation hints
llvm::AttributeFuncs
llvm::bfi_detail
llvm::bitc
llvm::BPFISD
llvm::CallingConvCallingConv Namespace - This namespace contains an enum with a value for the well-known calling conventions
llvm::clCl Namespace - This namespace contains all of the command line option processing machinery
llvm::CodeGenOpt
llvm::CodeModel
llvm::COFF
llvm::COFFYAML
llvm::coverage
llvm::detailImplementation details of the pass manager interfaces
llvm::DOT
llvm::dwarf
llvm::dwarf::syntax
llvm::DWARFFlavourFlavour of dwarf regnumbers
llvm::ELF
llvm::ELFYAML
llvm::EngineKind
llvm::FloatABI
llvm::FPOpFusion
llvm::GC
llvm::GCOV
llvm::GraphProgram
llvm::hashing
llvm::hashing::detail
llvm::Hexagon
llvm::HexagonIIHexagonII - This namespace holds all of the target specific flags that instruction info tracks
llvm::HexagonISD
llvm::HexagonMCInstrInfo
llvm::HexStyle
llvm::IndexedInstrProf
llvm::InlineConstants
llvm::IntervalMapImplIntervalMapImpl - Namespace used for IntervalMap implementation details
llvm::IntrinsicThis namespace contains an enum with a value for every intrinsic/builtin function known by LLVM
llvm::ISDISD namespace - This namespace contains an enum which represents all of the SelectionDAG node types and value types
llvm::JumpTable
llvm::LCOMM
llvm::legacy
llvm::LibFunc
llvm::lltok
llvm::MachineCombinerPatternEnumeration of instruction pattern supported by machine combiner
llvm::MachO
llvm::MCD
llvm::MCID
llvm::MCOI
llvm::MCParserUtils
llvm::mdconstTransitional API for extracting constants from Metadata
llvm::mdconst::detail
llvm::Mips
llvm::Mips16HardFloatInfo
llvm::MIPS_MC
llvm::MipsIIMipsII - This namespace holds all of the target specific flags that instruction info tracks
llvm::MipsISD
llvm::MSP430IIMSP430II - This namespace holds all of the target specific flags that instruction info tracks
llvm::MSP430ISD
llvm::N86Native X86 register numbers
llvm::NVPTX
llvm::NVPTX::PTXCmpModePTXCmpMode - Comparison mode enumeration
llvm::NVPTX::PTXCvtModePTXCvtMode - Conversion code enumeration
llvm::NVPTX::PTXLdStInstCode
llvm::NVPTXCC
llvm::NVPTXII
llvm::NVPTXISD
llvm::objcarc
llvm::object
llvm::opt
llvm::orc
llvm::PatternMatch
llvm::PBQP
llvm::PBQP::RegAlloc
llvm::PICLevel
llvm::PICStylesThe X86 backend supports a number of different styles of PIC
llvm::PPCDefine some predicates that are used for node matching
llvm::PPCIIPPCII - This namespace holds all of the PowerPC target-specific per-instruction flags
llvm::PPCISD
llvm::RegState
llvm::Reloc
llvm::RTLIB
llvm::sampleprof
llvm::ScaledNumbers
llvm::Sched
llvm::SI
llvm::SI::KernelInputOffsets
llvm::Sparc
llvm::SPCC
llvm::SPIISPII - This namespace holds all of the target specific flags that instruction info tracks
llvm::SPISD
llvm::support
llvm::support::detail
llvm::support::endian
llvm::SymbolRewriter
llvm::sys
llvm::sys::fs
llvm::sys::fs::detail
llvm::sys::locale
llvm::sys::path
llvm::sys::unicode
llvm::sys::windows
llvm::SystemZ
llvm::SystemZCP
llvm::SystemZICMP
llvm::SystemZII
llvm::SystemZISD
llvm::SystemZMC
llvm::TargetOpcodeInvariant opcodes: All instruction sets have these as their low opcodes
llvm::tgtok
llvm::ThreadModel
llvm::TLSModel
llvm::types
llvm::Win64EH
llvm::WinEH
llvm::X86Define some predicates that are used for node matching
llvm::X86_MC
llvm::X86Disassembler
llvm::X86IIX86II - This namespace holds all of the target specific flags that instruction info tracks
llvm::X86ISD
llvm::XCore
llvm::XCoreISD
llvm::yaml
llvm::zlib
MemRef
MSP430CC
OpName
R600_InstFlag
ShaderType
SIInstrFlags
SIOutMods
SISrcMods
stats
std
true