#include <Passes.h>
Public Member Functions | |
| TargetPassConfig (TargetMachine *tm, PassManagerBase &pm) | |
| TargetPassConfig () | |
| virtual | ~TargetPassConfig () |
| template<typename TMC > | |
| TMC & | getTM () const |
| Get the right type of TargetMachine for this target. | |
| const TargetLowering * | getTargetLowering () const |
| void | setInitialized () |
| CodeGenOpt::Level | getOptLevel () const |
| void | setStartStopPasses (AnalysisID Start, AnalysisID Stop) |
| void | setDisableVerify (bool Disable) |
| bool | getEnableTailMerge () const |
| void | setEnableTailMerge (bool Enable) |
| void | substitutePass (AnalysisID StandardID, IdentifyingPassPtr TargetID) |
| void | insertPass (AnalysisID TargetPassID, IdentifyingPassPtr InsertedPassID) |
| Insert InsertedPassID pass after TargetPassID pass. | |
| void | enablePass (AnalysisID PassID) |
| Allow the target to enable a specific standard pass by default. | |
| void | disablePass (AnalysisID PassID) |
| Allow the target to disable a specific standard pass by default. | |
| IdentifyingPassPtr | getPassSubstitution (AnalysisID StandardID) const |
| bool | getOptimizeRegAlloc () const |
| Return true if the optimized regalloc pipeline is enabled. | |
| virtual void | addIRPasses () |
| void | addPassesToHandleExceptions () |
| Add passes to lower exception handling for the code generator. | |
| virtual void | addCodeGenPrepare () |
| virtual void | addISelPrepare () |
| virtual bool | addInstSelector () |
| virtual void | addMachinePasses () |
Static Public Attributes | |
| static char | EarlyTailDuplicateID |
| static char | PostRAMachineLICMID = 0 |
| static char | ID |
Protected Member Functions | |
| void | setOpt (bool &Opt, bool Val) |
| virtual bool | addPreISel () |
| virtual void | addMachineSSAOptimization () |
| Add passes that optimize machine instructions in SSA form. | |
| virtual bool | addILPOpts () |
| virtual bool | addPreRegAlloc () |
| virtual FunctionPass * | createTargetRegisterAllocator (bool Optimized) |
| virtual void | addFastRegAlloc (FunctionPass *RegAllocPass) |
| virtual void | addOptimizedRegAlloc (FunctionPass *RegAllocPass) |
| virtual bool | addPreRewrite () |
| virtual bool | addPostRegAlloc () |
| virtual void | addMachineLateOptimization () |
| Add passes that optimize machine instructions after register allocation. | |
| virtual bool | addPreSched2 () |
| virtual bool | addGCPasses () |
| Add standard GC passes. | |
| virtual void | addBlockPlacement () |
| Add standard basic block placement passes. | |
| virtual bool | addPreEmitPass () |
| AnalysisID | addPass (AnalysisID PassID) |
| void | addPass (Pass *P) |
| FunctionPass * | createRegAllocPass (bool Optimized) |
| void | printAndVerify (const char *Banner) |
Protected Attributes | |
| TargetMachine * | TM |
| PassConfigImpl * | Impl |
| bool | Initialized |
| bool | DisableVerify |
| bool | EnableTailMerge |
| Default setting for -enable-tail-merge on this target. | |
Detailed Description
Target-Independent Code Generator Pass Configuration Options.
This is an ImmutablePass solely for the purpose of exposing CodeGen options to the internals of other CodeGen passes.
Definition at line 84 of file CodeGen/Passes.h.
Constructor & Destructor Documentation
| TargetPassConfig::TargetPassConfig | ( | TargetMachine * | tm, |
| PassManagerBase & | pm | ||
| ) |
Definition at line 221 of file Passes.cpp.
References disablePass(), EarlyTailDuplicateID, llvm::TargetSubtargetInfo::enableMachineScheduler(), llvm::PassRegistry::getPassRegistry(), llvm::TargetMachine::getSubtarget(), Impl, llvm::initializeCodeGen(), llvm::MachineLICMID, llvm::MachineSchedulerID, PostRAMachineLICMID, llvm::A64DB::ST, substitutePass(), llvm::TailDuplicateID, and TM.
| TargetPassConfig::TargetPassConfig | ( | ) |
Definition at line 263 of file Passes.cpp.
References llvm_unreachable.
| TargetPassConfig::~TargetPassConfig | ( | ) | [virtual] |
Definition at line 215 of file Passes.cpp.
References Impl.
Member Function Documentation
| void TargetPassConfig::addBlockPlacement | ( | ) | [protected, virtual] |
Add standard basic block placement passes.
Definition at line 752 of file Passes.cpp.
References addPass(), EnableBlockPlacementStats, llvm::MachineBlockPlacementID, llvm::MachineBlockPlacementStatsID, and printAndVerify().
Referenced by addMachinePasses().
| void TargetPassConfig::addCodeGenPrepare | ( | ) | [virtual] |
Add pass to prepare the LLVM IR for code generation. This should be done before exception handling preparation passes.
Definition at line 417 of file Passes.cpp.
References addPass(), llvm::createCodeGenPreparePass(), DisableCGP, getOptLevel(), llvm::CodeGenOpt::None, and TM.
Referenced by addPassesToGenerateCode().
| void TargetPassConfig::addFastRegAlloc | ( | FunctionPass * | RegAllocPass | ) | [protected, virtual] |
addFastRegAlloc - Add the minimum set of target-independent passes that are required for fast register allocation.
Add the minimum set of target-independent passes that are required for register allocation. No coalescing or scheduling.
Definition at line 654 of file Passes.cpp.
References addPass(), llvm::PHIEliminationID, printAndVerify(), and llvm::TwoAddressInstructionPassID.
Referenced by addMachinePasses().
| bool TargetPassConfig::addGCPasses | ( | ) | [protected, virtual] |
Add standard GC passes.
addGCPasses - Add late codegen passes that analyze code for garbage collection. This should return true if GC info should be printed after these passes.
Definition at line 746 of file Passes.cpp.
References addPass(), and llvm::GCMachineCodeAnalysisID.
Referenced by addMachinePasses().
| virtual bool llvm::TargetPassConfig::addILPOpts | ( | ) | [inline, protected, virtual] |
Add passes that optimize instruction level parallelism for out-of-order targets. These passes are run while the machine code is still in SSA form, so they can use MachineTraceMetrics to control their heuristics.
All passes added here should preserve the MachineDominatorTree, MachineLoopInfo, and MachineTraceMetrics analyses.
Definition at line 234 of file CodeGen/Passes.h.
Referenced by addMachineSSAOptimization().
| virtual bool llvm::TargetPassConfig::addInstSelector | ( | ) | [inline, virtual] |
addInstSelector - This method should install an instruction selector pass, which converts from LLVM code to machine instructions.
Definition at line 199 of file CodeGen/Passes.h.
Referenced by addPassesToGenerateCode().
| void TargetPassConfig::addIRPasses | ( | ) | [virtual] |
Add common target configurable passes that perform LLVM IR to IR transforms following machine independent optimization.
Definition at line 362 of file Passes.cpp.
References addPass(), llvm::createBasicAliasAnalysisPass(), llvm::createGCLoweringPass(), llvm::createLoopStrengthReducePass(), llvm::createPrintFunctionPass(), llvm::createTypeBasedAliasAnalysisPass(), llvm::createUnreachableBlockEliminationPass(), llvm::createVerifierPass(), llvm::dbgs(), DisableLSR, DisableVerify, getOptLevel(), llvm::CodeGenOpt::None, and PrintLSR.
Referenced by addPassesToGenerateCode().
| void TargetPassConfig::addISelPrepare | ( | ) | [virtual] |
Add common passes that perform LLVM IR to IR transforms in preparation for instruction selection.
Definition at line 424 of file Passes.cpp.
References addPass(), addPreISel(), llvm::createPrintFunctionPass(), llvm::createStackProtectorPass(), llvm::createVerifierPass(), llvm::dbgs(), DisableVerify, PrintISelInput, and TM.
Referenced by addPassesToGenerateCode().
| void TargetPassConfig::addMachineLateOptimization | ( | ) | [protected, virtual] |
Add passes that optimize machine instructions after register allocation.
Post RegAlloc Pass Configuration.
Definition at line 731 of file Passes.cpp.
References addPass(), llvm::BranchFolderPassID, llvm::MachineCopyPropagationID, printAndVerify(), and llvm::TailDuplicateID.
Referenced by addMachinePasses().
| void TargetPassConfig::addMachinePasses | ( | ) | [virtual] |
Add the complete, standard set of LLVM CodeGen passes. Fully developed targets will not generally override this.
Add the complete set of target-independent postISel code generator passes.
This can be read as the standard order of major LLVM CodeGen stages. Stages with nontrivial configuration or multiple passes are broken out below in addStage routines.
Any TargetPassConfig::addXX routine may be overriden by the Target. The addPre/Post methods with empty header implementations allow injecting target-specific fixups just before or after major stages. Additionally, targets have the flexibility to change pass order within a stage by overriding default implementation of addStage routines below. Each technique has maintainability tradeoffs because alternate pass orders are not well supported. addPre/Post works better if the target pass is easily tied to a common pass. But if it has subtle dependencies on multiple passes, the target should override the stage instead.
TODO: We could use a single addPre/Post(ID) hook to allow pass injection before/after any target-independent pass. But it's currently overkill.
Add passes that optimize machine instructions after register allocation.
Definition at line 458 of file Passes.cpp.
References addBlockPlacement(), addFastRegAlloc(), addGCPasses(), addMachineLateOptimization(), addMachineSSAOptimization(), addOptimizedRegAlloc(), addPass(), addPostRegAlloc(), addPreEmitPass(), addPreRegAlloc(), addPreSched2(), llvm::createGCInfoPrinter(), createRegAllocPass(), llvm::dbgs(), llvm::ExpandISelPseudosID, llvm::ExpandPostRAPseudosID, getOptimizeRegAlloc(), getOptLevel(), llvm::PassRegistry::getPassInfo(), llvm::PassRegistry::getPassRegistry(), llvm::PassInfo::getTypeInfo(), if(), insertPass(), llvm::LocalStackSlotAllocationID, llvm::CodeGenOpt::None, llvm::TargetMachine::Options, llvm::PostRASchedulerID, printAndVerify(), PrintGCInfo, llvm::TargetOptions::PrintMachineCode, PrintMachineInstrs, llvm::PrologEpilogCodeInserterID, and TM.
Referenced by addPassesToGenerateCode().
| void TargetPassConfig::addMachineSSAOptimization | ( | ) | [protected, virtual] |
Add passes that optimize machine instructions in SSA form.
addMachineSSAOptimization - Add standard passes that optimize machine instructions in SSA form.
Definition at line 542 of file Passes.cpp.
References addILPOpts(), addPass(), llvm::DeadMachineInstructionElimID, EarlyTailDuplicateID, llvm::LocalStackSlotAllocationID, llvm::MachineCSEID, llvm::MachineLICMID, llvm::MachineSinkingID, llvm::OptimizePHIsID, llvm::PeepholeOptimizerID, printAndVerify(), and llvm::StackColoringID.
Referenced by addMachinePasses().
| void TargetPassConfig::addOptimizedRegAlloc | ( | FunctionPass * | RegAllocPass | ) | [protected, virtual] |
addOptimizedRegAlloc - Add passes related to register allocation. LLVMTargetMachine provides standard regalloc passes for most targets.
Add standard target-independent passes that are tightly coupled with optimized register allocation, including coalescing, machine instruction scheduling, and register allocation itself.
Definition at line 665 of file Passes.cpp.
References addPass(), addPreRewrite(), EarlyLiveIntervals, EnableStrongPHIElim, llvm::LiveIntervalsID, llvm::LiveVariablesID, llvm::MachineLoopInfoID, llvm::MachineSchedulerID, llvm::PHIEliminationID, PostRAMachineLICMID, printAndVerify(), llvm::ProcessImplicitDefsID, llvm::RegisterCoalescerID, llvm::StackSlotColoringID, llvm::StrongPHIEliminationID, llvm::TwoAddressInstructionPassID, and llvm::VirtRegRewriterID.
Referenced by addMachinePasses().
| AnalysisID TargetPassConfig::addPass | ( | AnalysisID | PassID | ) | [protected] |
Utilities for targets to add passes to the pass manager. Add a CodeGen pass at this point in the pipeline after checking overrides. Return the pass that was added, or zero if no pass was added.
Add a CodeGen pass at this point in the pipeline after checking for target and command line overrides.
addPass cannot return a pointer to the pass instance because is internal the PassManager and the instance we create here may already be freed.
Definition at line 316 of file Passes.cpp.
References llvm::SmallVectorTemplateCommon< T, typename >::begin(), llvm::Pass::createPass(), llvm::SmallVectorTemplateCommon< T, typename >::end(), llvm::IdentifyingPassPtr::getID(), llvm::IdentifyingPassPtr::getInstance(), llvm::Pass::getPassID(), getPassSubstitution(), I, Impl, llvm::PassConfigImpl::InsertedPasses, llvm::IdentifyingPassPtr::isInstance(), llvm::IdentifyingPassPtr::isValid(), llvm_unreachable, overridePass(), and P.
Referenced by addBlockPlacement(), addCodeGenPrepare(), addFastRegAlloc(), addGCPasses(), addIRPasses(), addISelPrepare(), addMachineLateOptimization(), addMachinePasses(), addMachineSSAOptimization(), addOptimizedRegAlloc(), addPassesToHandleExceptions(), and printAndVerify().
| void TargetPassConfig::addPass | ( | Pass * | P | ) | [protected] |
Add a pass to the PassManager if that pass is supposed to be run, as determined by the StartAfter and StopAfter options.
Add a pass to the PassManager if that pass is supposed to be run. If the Started/Stopped flags indicate either that the compilation should start at a later pass or that it should stop after an earlier pass, then do not add the pass. Finally, compare the current pass against the StartAfter and StopAfter options and change the Started/Stopped flags accordingly.
Definition at line 292 of file Passes.cpp.
References llvm::PassManagerBase::add(), llvm::Pass::getPassID(), Initialized, and llvm::report_fatal_error().
| void TargetPassConfig::addPassesToHandleExceptions | ( | ) |
Add passes to lower exception handling for the code generator.
Turn exception handling constructs into something the code generators can handle.
Definition at line 390 of file Passes.cpp.
References addPass(), llvm::ExceptionHandling::ARM, llvm::createDwarfEHPass(), llvm::createLowerInvokePass(), llvm::createSjLjEHPreparePass(), llvm::createUnreachableBlockEliminationPass(), llvm::ExceptionHandling::DwarfCFI, llvm::MCAsmInfo::getExceptionHandlingType(), llvm::TargetMachine::getMCAsmInfo(), llvm::ExceptionHandling::None, llvm::ExceptionHandling::SjLj, TM, and llvm::ExceptionHandling::Win64.
Referenced by addPassesToGenerateCode().
| virtual bool llvm::TargetPassConfig::addPostRegAlloc | ( | ) | [inline, protected, virtual] |
addPostRegAlloc - This method may be implemented by targets that want to run passes after register allocation pass pipeline but before prolog-epilog insertion. This should return true if -print-machineinstrs should print after these passes.
Definition at line 273 of file CodeGen/Passes.h.
Referenced by addMachinePasses().
| virtual bool llvm::TargetPassConfig::addPreEmitPass | ( | ) | [inline, protected, virtual] |
addPreEmitPass - This pass may be implemented by targets that want to run passes immediately before machine code is emitted. This should return true if -print-machineinstrs should print out the code after the passes.
Definition at line 299 of file CodeGen/Passes.h.
Referenced by addMachinePasses().
| virtual bool llvm::TargetPassConfig::addPreISel | ( | ) | [inline, protected, virtual] |
Methods with trivial inline returns are convenient points in the common codegen pass pipeline where targets may insert passes. Methods with out-of-line standard implementations are major CodeGen stages called by addMachinePasses. Some targets may override major stages when inserting passes is insufficient, but maintaining overriden stages is more work. addPreISelPasses - This method should add any "last minute" LLVM->LLVM passes (which are run just before instruction selector).
Definition at line 220 of file CodeGen/Passes.h.
Referenced by addISelPrepare().
| virtual bool llvm::TargetPassConfig::addPreRegAlloc | ( | ) | [inline, protected, virtual] |
addPreRegAlloc - This method may be implemented by targets that want to run passes immediately before register allocation. This should return true if -print-machineinstrs should print after these passes.
Definition at line 241 of file CodeGen/Passes.h.
Referenced by addMachinePasses().
| virtual bool llvm::TargetPassConfig::addPreRewrite | ( | ) | [inline, protected, virtual] |
addPreRewrite - Add passes to the optimized register allocation pipeline after register allocation is complete, but before virtual registers are rewritten to physical registers.
These passes must preserve VirtRegMap and LiveIntervals, and when running after RABasic or RAGreedy, they should take advantage of LiveRegMatrix. When these passes run, VirtRegMap contains legal physreg assignments for all virtual registers.
Definition at line 265 of file CodeGen/Passes.h.
Referenced by addOptimizedRegAlloc().
| virtual bool llvm::TargetPassConfig::addPreSched2 | ( | ) | [inline, protected, virtual] |
addPreSched2 - This method may be implemented by targets that want to run passes after prolog-epilog insertion and before the second instruction scheduling pass. This should return true if -print-machineinstrs should print after these passes.
Definition at line 284 of file CodeGen/Passes.h.
Referenced by addMachinePasses().
| FunctionPass * TargetPassConfig::createRegAllocPass | ( | bool | Optimized | ) | [protected] |
addMachinePasses helper to create the target-selected or overriden regalloc pass.
Find and instantiate the register allocation pass requested by this target at the current optimization level. Different register allocators are defined as separate passes because they may require different analysis.
This helper ensures that the regalloc= option is always available, even for targets that override the default allocator.
FIXME: When MachinePassRegistry register pass IDs instead of function ptrs, this can be folded into addPass.
Definition at line 637 of file Passes.cpp.
References createTargetRegisterAllocator(), llvm::RegisterRegAlloc::getDefault(), RegAlloc, llvm::RegisterRegAlloc::setDefault(), and useDefaultRegisterAllocator().
Referenced by addMachinePasses().
| FunctionPass * TargetPassConfig::createTargetRegisterAllocator | ( | bool | Optimized | ) | [protected, virtual] |
createTargetRegisterAllocator - Create the register allocator pass for this target at the current optimization level.
Instantiate the default register allocator pass for this target for either the optimized or unoptimized allocation path. This will be added to the pass manager by addFastRegAlloc in the unoptimized case or addOptimizedRegAlloc in the optimized case.
A target that uses the standard regalloc pass order for fast or optimized allocation may still override this for per-target regalloc selection. But -regalloc=... always takes precedence.
Definition at line 621 of file Passes.cpp.
References llvm::createFastRegisterAllocator(), and llvm::createGreedyRegisterAllocator().
Referenced by createRegAllocPass().
| void llvm::TargetPassConfig::disablePass | ( | AnalysisID | PassID | ) | [inline] |
Allow the target to disable a specific standard pass by default.
Definition at line 171 of file CodeGen/Passes.h.
References substitutePass().
Referenced by TargetPassConfig().
| void llvm::TargetPassConfig::enablePass | ( | AnalysisID | PassID | ) | [inline] |
Allow the target to enable a specific standard pass by default.
Definition at line 168 of file CodeGen/Passes.h.
References substitutePass().
| bool llvm::TargetPassConfig::getEnableTailMerge | ( | ) | const [inline] |
Definition at line 156 of file CodeGen/Passes.h.
References EnableTailMerge.
Referenced by INITIALIZE_PASS().
| bool TargetPassConfig::getOptimizeRegAlloc | ( | ) | const |
Return true if the optimized regalloc pipeline is enabled.
Register Allocation Pass Configuration.
Definition at line 585 of file Passes.cpp.
References llvm::cl::BOU_FALSE, llvm::cl::BOU_TRUE, llvm::cl::BOU_UNSET, getOptLevel(), llvm_unreachable, llvm::None, and OptimizeRegAlloc.
Referenced by addMachinePasses().
| CodeGenOpt::Level llvm::TargetPassConfig::getOptLevel | ( | ) | const [inline] |
Definition at line 140 of file CodeGen/Passes.h.
References llvm::TargetMachine::getOptLevel(), and TM.
Referenced by addCodeGenPrepare(), addIRPasses(), addMachinePasses(), and getOptimizeRegAlloc().
| IdentifyingPassPtr TargetPassConfig::getPassSubstitution | ( | AnalysisID | StandardID | ) | const |
Return the pass substituted for StandardID by the target. If no substitution exists, return StandardID.
Definition at line 279 of file Passes.cpp.
References llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT >::end(), llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT >::find(), I, Impl, and llvm::PassConfigImpl::TargetPasses.
Referenced by addPass().
| const TargetLowering* llvm::TargetPassConfig::getTargetLowering | ( | ) | const [inline] |
Definition at line 133 of file CodeGen/Passes.h.
References llvm::TargetMachine::getTargetLowering(), and TM.
| TMC& llvm::TargetPassConfig::getTM | ( | ) | const [inline] |
Get the right type of TargetMachine for this target.
Definition at line 129 of file CodeGen/Passes.h.
References TM.
| void TargetPassConfig::insertPass | ( | AnalysisID | TargetPassID, |
| IdentifyingPassPtr | InsertedPassID | ||
| ) |
Insert InsertedPassID pass after TargetPassID pass.
Insert InsertedPassID pass after TargetPassID.
Definition at line 244 of file Passes.cpp.
References llvm::IdentifyingPassPtr::getID(), llvm::IdentifyingPassPtr::getInstance(), llvm::Pass::getPassID(), Impl, llvm::PassConfigImpl::InsertedPasses, llvm::IdentifyingPassPtr::isInstance(), P, and llvm::SmallVectorTemplateBase< T, isPodLike >::push_back().
Referenced by addMachinePasses().
| void TargetPassConfig::printAndVerify | ( | const char * | Banner | ) | [protected] |
printAndVerify - Add a pass to dump then verify the machine function, if those steps are enabled.
Definition at line 352 of file Passes.cpp.
References addPass(), llvm::createMachineFunctionPrinterPass(), llvm::createMachineVerifierPass(), llvm::dbgs(), llvm::TargetMachine::shouldPrintMachineCode(), TM, and VerifyMachineCode.
Referenced by addBlockPlacement(), addFastRegAlloc(), addMachineLateOptimization(), addMachinePasses(), addMachineSSAOptimization(), and addOptimizedRegAlloc().
| void llvm::TargetPassConfig::setDisableVerify | ( | bool | Disable | ) | [inline] |
Definition at line 154 of file CodeGen/Passes.h.
References DisableVerify, and setOpt().
Referenced by addPassesToGenerateCode().
| void llvm::TargetPassConfig::setEnableTailMerge | ( | bool | Enable | ) | [inline] |
Definition at line 157 of file CodeGen/Passes.h.
References EnableTailMerge, and setOpt().
| void llvm::TargetPassConfig::setInitialized | ( | ) | [inline] |
Definition at line 138 of file CodeGen/Passes.h.
References Initialized.
Referenced by addPassesToGenerateCode().
Definition at line 269 of file Passes.cpp.
References Initialized.
Referenced by setDisableVerify(), and setEnableTailMerge().
| void llvm::TargetPassConfig::setStartStopPasses | ( | AnalysisID | Start, |
| AnalysisID | Stop | ||
| ) | [inline] |
setStartStopPasses - Set the StartAfter and StopAfter passes to allow running only a portion of the normal code-gen pass sequence. If the Start pass ID is zero, then compilation will begin at the normal point; otherwise, clear the Started flag to indicate that passes should not be added until the starting pass is seen. If the Stop pass ID is zero, then compilation will continue to the end.
Definition at line 148 of file CodeGen/Passes.h.
Referenced by addPassesToGenerateCode().
| void TargetPassConfig::substitutePass | ( | AnalysisID | StandardID, |
| IdentifyingPassPtr | TargetID | ||
| ) |
Allow the target to override a specific pass without overriding the pass pipeline. When passes are added to the standard pipeline at the point where StandardID is expected, add TargetID in its place.
Definition at line 274 of file Passes.cpp.
References Impl, and llvm::PassConfigImpl::TargetPasses.
Referenced by disablePass(), enablePass(), and TargetPassConfig().
Member Data Documentation
bool llvm::TargetPassConfig::DisableVerify [protected] |
Definition at line 114 of file CodeGen/Passes.h.
Referenced by addIRPasses(), addISelPrepare(), and setDisableVerify().
char llvm::TargetPassConfig::EarlyTailDuplicateID [static] |
Pseudo Pass IDs. These are defined within TargetPassConfig because they are unregistered pass IDs. They are only useful for use with TargetPassConfig APIs to identify multiple occurrences of the same pass. EarlyTailDuplicate - A clone of the TailDuplicate pass that runs early during codegen, on SSA form.
Definition at line 93 of file CodeGen/Passes.h.
Referenced by addMachineSSAOptimization(), overridePass(), and TargetPassConfig().
bool llvm::TargetPassConfig::EnableTailMerge [protected] |
Default setting for -enable-tail-merge on this target.
Definition at line 117 of file CodeGen/Passes.h.
Referenced by getEnableTailMerge(), and setEnableTailMerge().
char llvm::TargetPassConfig::ID [static] |
Definition at line 126 of file CodeGen/Passes.h.
PassConfigImpl* llvm::TargetPassConfig::Impl [protected] |
Definition at line 108 of file CodeGen/Passes.h.
Referenced by addPass(), getPassSubstitution(), insertPass(), substitutePass(), TargetPassConfig(), and ~TargetPassConfig().
bool llvm::TargetPassConfig::Initialized [protected] |
Definition at line 109 of file CodeGen/Passes.h.
Referenced by addPass(), setInitialized(), and setOpt().
char TargetPassConfig::PostRAMachineLICMID = 0 [static] |
PostRAMachineLICM - A clone of the LICM pass that runs during late machine optimization after regalloc.
Definition at line 97 of file CodeGen/Passes.h.
Referenced by addOptimizedRegAlloc(), overridePass(), and TargetPassConfig().
TargetMachine* llvm::TargetPassConfig::TM [protected] |
Definition at line 107 of file CodeGen/Passes.h.
Referenced by addCodeGenPrepare(), addISelPrepare(), addMachinePasses(), addPassesToHandleExceptions(), getOptLevel(), getTargetLowering(), getTM(), printAndVerify(), and TargetPassConfig().
The documentation for this class was generated from the following files:
1.7.5.1