LLVM  6.0.0svn
Namespaces | Macros | Enumerations | Functions
AMDGPUInstrInfo.cpp File Reference

Implementation of the TargetInstrInfo class that is common to all AMD GPUs. More...

#include "AMDGPUInstrInfo.h"
#include "AMDGPURegisterInfo.h"
#include "AMDGPUTargetMachine.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "AMDGPUGenInstrInfo.inc"
Include dependency graph for AMDGPUInstrInfo.cpp:

Go to the source code of this file.

Namespaces

 llvm
 Compute iterated dominance frontiers using a linear time algorithm.
 
 llvm::AMDGPU
 

Macros

#define GET_INSTRINFO_CTOR_DTOR
 
#define GET_INSTRMAP_INFO
 

Enumerations

enum  SIEncodingFamily {
  SI = 0, VI = 1, SDWA = 2, SDWA9 = 3,
  GFX9 = 4
}
 

Functions

static int llvm::AMDGPU::getMCOpcode (uint16_t Opcode, unsigned Gen)
 
static SIEncodingFamily subtargetEncodingFamily (const AMDGPUSubtarget &ST)
 

Detailed Description

Implementation of the TargetInstrInfo class that is common to all AMD GPUs.

Definition in file AMDGPUInstrInfo.cpp.

Macro Definition Documentation

◆ GET_INSTRINFO_CTOR_DTOR

#define GET_INSTRINFO_CTOR_DTOR

Definition at line 25 of file AMDGPUInstrInfo.cpp.

◆ GET_INSTRMAP_INFO

#define GET_INSTRMAP_INFO

Definition at line 26 of file AMDGPUInstrInfo.cpp.

Enumeration Type Documentation

◆ SIEncodingFamily

Enumerator
SI 
VI 
SDWA 
SDWA9 
GFX9 

Definition at line 69 of file AMDGPUInstrInfo.cpp.

Function Documentation

◆ subtargetEncodingFamily()

static SIEncodingFamily subtargetEncodingFamily ( const AMDGPUSubtarget ST)
static