LLVM  9.0.0svn
InlineAsm.h
Go to the documentation of this file.
1 //===- llvm/InlineAsm.h - Class to represent inline asm strings -*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This class represents the inline asm strings, which are Value*'s that are
10 // used as the callee operand of call instructions. InlineAsm's are uniqued
11 // like constants, and created via InlineAsm::get(...).
12 //
13 //===----------------------------------------------------------------------===//
14 
15 #ifndef LLVM_IR_INLINEASM_H
16 #define LLVM_IR_INLINEASM_H
17 
18 #include "llvm/ADT/StringRef.h"
19 #include "llvm/IR/Value.h"
20 #include <cassert>
21 #include <string>
22 #include <vector>
23 
24 namespace llvm {
25 
26 class FunctionType;
27 class PointerType;
28 template <class ConstantClass> class ConstantUniqueMap;
29 
30 class InlineAsm final : public Value {
31 public:
32  enum AsmDialect {
35  };
36 
37 private:
38  friend struct InlineAsmKeyType;
40 
41  std::string AsmString, Constraints;
42  FunctionType *FTy;
43  bool HasSideEffects;
44  bool IsAlignStack;
45  AsmDialect Dialect;
46 
47  InlineAsm(FunctionType *Ty, const std::string &AsmString,
48  const std::string &Constraints, bool hasSideEffects,
49  bool isAlignStack, AsmDialect asmDialect);
50 
51  /// When the ConstantUniqueMap merges two types and makes two InlineAsms
52  /// identical, it destroys one of them with this method.
53  void destroyConstant();
54 
55 public:
56  InlineAsm(const InlineAsm &) = delete;
57  InlineAsm &operator=(const InlineAsm &) = delete;
58 
59  /// InlineAsm::get - Return the specified uniqued inline asm string.
60  ///
61  static InlineAsm *get(FunctionType *Ty, StringRef AsmString,
62  StringRef Constraints, bool hasSideEffects,
63  bool isAlignStack = false,
64  AsmDialect asmDialect = AD_ATT);
65 
66  bool hasSideEffects() const { return HasSideEffects; }
67  bool isAlignStack() const { return IsAlignStack; }
68  AsmDialect getDialect() const { return Dialect; }
69 
70  /// getType - InlineAsm's are always pointers.
71  ///
72  PointerType *getType() const {
73  return reinterpret_cast<PointerType*>(Value::getType());
74  }
75 
76  /// getFunctionType - InlineAsm's are always pointers to functions.
77  ///
79 
80  const std::string &getAsmString() const { return AsmString; }
81  const std::string &getConstraintString() const { return Constraints; }
82 
83  /// Verify - This static method can be used by the parser to check to see if
84  /// the specified constraint string is legal for the type. This returns true
85  /// if legal, false if not.
86  ///
87  static bool Verify(FunctionType *Ty, StringRef Constraints);
88 
89  // Constraint String Parsing
91  isInput, // 'x'
92  isOutput, // '=x'
93  isClobber // '~x'
94  };
95 
96  using ConstraintCodeVector = std::vector<std::string>;
97 
99  /// MatchingInput - If this is not -1, this is an output constraint where an
100  /// input constraint is required to match it (e.g. "0"). The value is the
101  /// constraint number that matches this one (for example, if this is
102  /// constraint #0 and constraint #4 has the value "0", this will be 4).
103  int MatchingInput = -1;
104 
105  /// Code - The constraint code, either the register name (in braces) or the
106  /// constraint letter/number.
108 
109  /// Default constructor.
110  SubConstraintInfo() = default;
111  };
112 
113  using SubConstraintInfoVector = std::vector<SubConstraintInfo>;
114  struct ConstraintInfo;
115  using ConstraintInfoVector = std::vector<ConstraintInfo>;
116 
117  struct ConstraintInfo {
118  /// Type - The basic type of the constraint: input/output/clobber
119  ///
121 
122  /// isEarlyClobber - "&": output operand writes result before inputs are all
123  /// read. This is only ever set for an output operand.
124  bool isEarlyClobber = false;
125 
126  /// MatchingInput - If this is not -1, this is an output constraint where an
127  /// input constraint is required to match it (e.g. "0"). The value is the
128  /// constraint number that matches this one (for example, if this is
129  /// constraint #0 and constraint #4 has the value "0", this will be 4).
130  int MatchingInput = -1;
131 
132  /// hasMatchingInput - Return true if this is an output constraint that has
133  /// a matching input constraint.
134  bool hasMatchingInput() const { return MatchingInput != -1; }
135 
136  /// isCommutative - This is set to true for a constraint that is commutative
137  /// with the next operand.
138  bool isCommutative = false;
139 
140  /// isIndirect - True if this operand is an indirect operand. This means
141  /// that the address of the source or destination is present in the call
142  /// instruction, instead of it being returned or passed in explicitly. This
143  /// is represented with a '*' in the asm string.
144  bool isIndirect = false;
145 
146  /// Code - The constraint code, either the register name (in braces) or the
147  /// constraint letter/number.
149 
150  /// isMultipleAlternative - '|': has multiple-alternative constraints.
151  bool isMultipleAlternative = false;
152 
153  /// multipleAlternatives - If there are multiple alternative constraints,
154  /// this array will contain them. Otherwise it will be empty.
156 
157  /// The currently selected alternative constraint index.
158  unsigned currentAlternativeIndex = 0;
159 
160  /// Default constructor.
161  ConstraintInfo() = default;
162 
163  /// Parse - Analyze the specified string (e.g. "=*&{eax}") and fill in the
164  /// fields in this structure. If the constraint string is not understood,
165  /// return true, otherwise return false.
166  bool Parse(StringRef Str, ConstraintInfoVector &ConstraintsSoFar);
167 
168  /// selectAlternative - Point this constraint to the alternative constraint
169  /// indicated by the index.
170  void selectAlternative(unsigned index);
171  };
172 
173  /// ParseConstraints - Split up the constraint string into the specific
174  /// constraints and their prefixes. If this returns an empty vector, and if
175  /// the constraint string itself isn't empty, there was an error parsing.
176  static ConstraintInfoVector ParseConstraints(StringRef ConstraintString);
177 
178  /// ParseConstraints - Parse the constraints of this inlineasm object,
179  /// returning them the same way that ParseConstraints(str) does.
181  return ParseConstraints(Constraints);
182  }
183 
184  // Methods for support type inquiry through isa, cast, and dyn_cast:
185  static bool classof(const Value *V) {
186  return V->getValueID() == Value::InlineAsmVal;
187  }
188 
189  // These are helper methods for dealing with flags in the INLINEASM SDNode
190  // in the backend.
191  //
192  // The encoding of the flag word is currently:
193  // Bits 2-0 - A Kind_* value indicating the kind of the operand.
194  // Bits 15-3 - The number of SDNode operands associated with this inline
195  // assembly operand.
196  // If bit 31 is set:
197  // Bit 30-16 - The operand number that this operand must match.
198  // When bits 2-0 are Kind_Mem, the Constraint_* value must be
199  // obtained from the flags for this operand number.
200  // Else if bits 2-0 are Kind_Mem:
201  // Bit 30-16 - A Constraint_* value indicating the original constraint
202  // code.
203  // Else:
204  // Bit 30-16 - The register class ID to use for the operand.
205 
206  enum : uint32_t {
207  // Fixed operands on an INLINEASM SDNode.
211  Op_ExtraInfo = 3, // HasSideEffects, IsAlignStack, AsmDialect.
213 
214  // Fixed operands on an INLINEASM MachineInstr.
216  MIOp_ExtraInfo = 1, // HasSideEffects, IsAlignStack, AsmDialect.
218 
219  // Interpretation of the MIOp_ExtraInfo bit field.
226 
227  // Inline asm operands map to multiple SDNode / MachineInstr operands.
228  // The first operand is an immediate describing the asm operand, the low
229  // bits is the kind:
230  Kind_RegUse = 1, // Input register, "r".
231  Kind_RegDef = 2, // Output register, "=r".
232  Kind_RegDefEarlyClobber = 3, // Early-clobber output register, "=&r".
233  Kind_Clobber = 4, // Clobbered register, "~r".
234  Kind_Imm = 5, // Immediate.
235  Kind_Mem = 6, // Memory operand, "m".
236 
237  // Memory constraint codes.
238  // These could be tablegenerated but there's little need to do that since
239  // there's plenty of space in the encoding to support the union of all
240  // constraint codes for all targets.
264 
265  Flag_MatchingOperand = 0x80000000
266  };
267 
268  static unsigned getFlagWord(unsigned Kind, unsigned NumOps) {
269  assert(((NumOps << 3) & ~0xffff) == 0 && "Too many inline asm operands!");
270  assert(Kind >= Kind_RegUse && Kind <= Kind_Mem && "Invalid Kind");
271  return Kind | (NumOps << 3);
272  }
273 
274  static bool isRegDefKind(unsigned Flag){ return getKind(Flag) == Kind_RegDef;}
275  static bool isImmKind(unsigned Flag) { return getKind(Flag) == Kind_Imm; }
276  static bool isMemKind(unsigned Flag) { return getKind(Flag) == Kind_Mem; }
277  static bool isRegDefEarlyClobberKind(unsigned Flag) {
278  return getKind(Flag) == Kind_RegDefEarlyClobber;
279  }
280  static bool isClobberKind(unsigned Flag) {
281  return getKind(Flag) == Kind_Clobber;
282  }
283 
284  /// getFlagWordForMatchingOp - Augment an existing flag word returned by
285  /// getFlagWord with information indicating that this input operand is tied
286  /// to a previous output operand.
287  static unsigned getFlagWordForMatchingOp(unsigned InputFlag,
288  unsigned MatchedOperandNo) {
289  assert(MatchedOperandNo <= 0x7fff && "Too big matched operand");
290  assert((InputFlag & ~0xffff) == 0 && "High bits already contain data");
291  return InputFlag | Flag_MatchingOperand | (MatchedOperandNo << 16);
292  }
293 
294  /// getFlagWordForRegClass - Augment an existing flag word returned by
295  /// getFlagWord with the required register class for the following register
296  /// operands.
297  /// A tied use operand cannot have a register class, use the register class
298  /// from the def operand instead.
299  static unsigned getFlagWordForRegClass(unsigned InputFlag, unsigned RC) {
300  // Store RC + 1, reserve the value 0 to mean 'no register class'.
301  ++RC;
302  assert(!isImmKind(InputFlag) && "Immediates cannot have a register class");
303  assert(!isMemKind(InputFlag) && "Memory operand cannot have a register class");
304  assert(RC <= 0x7fff && "Too large register class ID");
305  assert((InputFlag & ~0xffff) == 0 && "High bits already contain data");
306  return InputFlag | (RC << 16);
307  }
308 
309  /// Augment an existing flag word returned by getFlagWord with the constraint
310  /// code for a memory constraint.
311  static unsigned getFlagWordForMem(unsigned InputFlag, unsigned Constraint) {
312  assert(isMemKind(InputFlag) && "InputFlag is not a memory constraint!");
313  assert(Constraint <= 0x7fff && "Too large a memory constraint ID");
314  assert(Constraint <= Constraints_Max && "Unknown constraint ID");
315  assert((InputFlag & ~0xffff) == 0 && "High bits already contain data");
316  return InputFlag | (Constraint << Constraints_ShiftAmount);
317  }
318 
319  static unsigned convertMemFlagWordToMatchingFlagWord(unsigned InputFlag) {
320  assert(isMemKind(InputFlag));
321  return InputFlag & ~(0x7fff << Constraints_ShiftAmount);
322  }
323 
324  static unsigned getKind(unsigned Flags) {
325  return Flags & 7;
326  }
327 
328  static unsigned getMemoryConstraintID(unsigned Flag) {
329  assert(isMemKind(Flag));
330  return (Flag >> Constraints_ShiftAmount) & 0x7fff;
331  }
332 
333  /// getNumOperandRegisters - Extract the number of registers field from the
334  /// inline asm operand flag.
335  static unsigned getNumOperandRegisters(unsigned Flag) {
336  return (Flag & 0xffff) >> 3;
337  }
338 
339  /// isUseOperandTiedToDef - Return true if the flag of the inline asm
340  /// operand indicates it is an use operand that's matched to a def operand.
341  static bool isUseOperandTiedToDef(unsigned Flag, unsigned &Idx) {
342  if ((Flag & Flag_MatchingOperand) == 0)
343  return false;
344  Idx = (Flag & ~Flag_MatchingOperand) >> 16;
345  return true;
346  }
347 
348  /// hasRegClassConstraint - Returns true if the flag contains a register
349  /// class constraint. Sets RC to the register class ID.
350  static bool hasRegClassConstraint(unsigned Flag, unsigned &RC) {
351  if (Flag & Flag_MatchingOperand)
352  return false;
353  unsigned High = Flag >> 16;
354  // getFlagWordForRegClass() uses 0 to mean no register class, and otherwise
355  // stores RC + 1.
356  if (!High)
357  return false;
358  RC = High - 1;
359  return true;
360  }
361 };
362 
363 } // end namespace llvm
364 
365 #endif // LLVM_IR_INLINEASM_H
unsigned getValueID() const
Return an ID for the concrete type of this object.
Definition: Value.h:463
This class represents lattice values for constants.
Definition: AllocatorList.h:23
static unsigned getFlagWord(unsigned Kind, unsigned NumOps)
Definition: InlineAsm.h:268
const std::string & getAsmString() const
Definition: InlineAsm.h:80
static bool isClobberKind(unsigned Flag)
Definition: InlineAsm.h:280
uint64_t High
static bool isImmKind(unsigned Flag)
Definition: InlineAsm.h:275
static bool isUseOperandTiedToDef(unsigned Flag, unsigned &Idx)
isUseOperandTiedToDef - Return true if the flag of the inline asm operand indicates it is an use oper...
Definition: InlineAsm.h:341
bool hasMatchingInput() const
hasMatchingInput - Return true if this is an output constraint that has a matching input constraint...
Definition: InlineAsm.h:134
ConstraintCodeVector Codes
Code - The constraint code, either the register name (in braces) or the constraint letter/number...
Definition: InlineAsm.h:148
bool hasSideEffects() const
Definition: InlineAsm.h:66
SubConstraintInfo()=default
Default constructor.
std::vector< std::string > ConstraintCodeVector
Definition: InlineAsm.h:96
static unsigned getFlagWordForRegClass(unsigned InputFlag, unsigned RC)
getFlagWordForRegClass - Augment an existing flag word returned by getFlagWord with the required regi...
Definition: InlineAsm.h:299
static bool isRegDefEarlyClobberKind(unsigned Flag)
Definition: InlineAsm.h:277
static unsigned convertMemFlagWordToMatchingFlagWord(unsigned InputFlag)
Definition: InlineAsm.h:319
Class to represent function types.
Definition: DerivedTypes.h:102
Type * getType() const
All values are typed, get the type of this value.
Definition: Value.h:244
static bool Verify(FunctionType *Ty, StringRef Constraints)
Verify - This static method can be used by the parser to check to see if the specified constraint str...
Definition: InlineAsm.cpp:243
InlineAsm & operator=(const InlineAsm &)=delete
static bool isRegDefKind(unsigned Flag)
Definition: InlineAsm.h:274
Class to represent pointers.
Definition: DerivedTypes.h:498
Flag
These should be considered private to the implementation of the MCInstrDesc class.
Definition: MCInstrDesc.h:117
static bool classof(const Value *V)
Definition: InlineAsm.h:185
The instances of the Type class are immutable: once they are created, they are never changed...
Definition: Type.h:45
SubConstraintInfoVector multipleAlternatives
multipleAlternatives - If there are multiple alternative constraints, this array will contain them...
Definition: InlineAsm.h:155
static unsigned getNumOperandRegisters(unsigned Flag)
getNumOperandRegisters - Extract the number of registers field from the inline asm operand flag...
Definition: InlineAsm.h:335
static unsigned getMemoryConstraintID(unsigned Flag)
Definition: InlineAsm.h:328
static unsigned getKind(unsigned Flags)
Definition: InlineAsm.h:324
static unsigned getFlagWordForMem(unsigned InputFlag, unsigned Constraint)
Augment an existing flag word returned by getFlagWord with the constraint code for a memory constrain...
Definition: InlineAsm.h:311
static bool isMemKind(unsigned Flag)
Definition: InlineAsm.h:276
bool isAlignStack() const
Definition: InlineAsm.h:67
const std::string & getConstraintString() const
Definition: InlineAsm.h:81
std::vector< ConstraintInfo > ConstraintInfoVector
Definition: InlineAsm.h:115
ConstraintCodeVector Codes
Code - The constraint code, either the register name (in braces) or the constraint letter/number...
Definition: InlineAsm.h:107
PointerType * getType() const
getType - InlineAsm&#39;s are always pointers.
Definition: InlineAsm.h:72
static bool hasRegClassConstraint(unsigned Flag, unsigned &RC)
hasRegClassConstraint - Returns true if the flag contains a register class constraint.
Definition: InlineAsm.h:350
FunctionType * getFunctionType() const
getFunctionType - InlineAsm&#39;s are always pointers to functions.
Definition: InlineAsm.cpp:56
AsmDialect getDialect() const
Definition: InlineAsm.h:68
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
LLVM Value Representation.
Definition: Value.h:72
static bool isCommutative(Instruction *I)
int MatchingInput
MatchingInput - If this is not -1, this is an output constraint where an input constraint is required...
Definition: InlineAsm.h:103
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:48
std::vector< SubConstraintInfo > SubConstraintInfoVector
Definition: InlineAsm.h:113
ConstraintInfoVector ParseConstraints() const
ParseConstraints - Parse the constraints of this inlineasm object, returning them the same way that P...
Definition: InlineAsm.h:180
static unsigned getFlagWordForMatchingOp(unsigned InputFlag, unsigned MatchedOperandNo)
getFlagWordForMatchingOp - Augment an existing flag word returned by getFlagWord with information ind...
Definition: InlineAsm.h:287