LLVM  7.0.0svn
Memory.inc
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1 //===- Unix/Memory.cpp - Generic UNIX System Configuration ------*- C++ -*-===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file defines some functions for various memory management utilities.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #include "Unix.h"
15 #include "llvm/Support/DataTypes.h"
17 #include "llvm/Support/Process.h"
18 
19 #ifdef HAVE_SYS_MMAN_H
20 #include <sys/mman.h>
21 #endif
22 
23 #ifdef __APPLE__
24 #include <mach/mach.h>
25 #endif
26 
27 #if defined(__mips__)
28 # if defined(__OpenBSD__)
29 # include <mips64/sysarch.h>
30 # elif !defined(__FreeBSD__)
31 # include <sys/cachectl.h>
32 # endif
33 #endif
34 
35 #ifdef __APPLE__
36 extern "C" void sys_icache_invalidate(const void *Addr, size_t len);
37 #else
38 extern "C" void __clear_cache(void *, void*);
39 #endif
40 
41 namespace {
42 
43 int getPosixProtectionFlags(unsigned Flags) {
44  switch (Flags) {
46  return PROT_READ;
48  return PROT_WRITE;
50  return PROT_READ | PROT_WRITE;
52  return PROT_READ | PROT_EXEC;
55  return PROT_READ | PROT_WRITE | PROT_EXEC;
57 #if defined(__FreeBSD__)
58  // On PowerPC, having an executable page that has no read permission
59  // can have unintended consequences. The function InvalidateInstruction-
60  // Cache uses instructions dcbf and icbi, both of which are treated by
61  // the processor as loads. If the page has no read permissions,
62  // executing these instructions will result in a segmentation fault.
63  // Somehow, this problem is not present on Linux, but it does happen
64  // on FreeBSD.
65  return PROT_READ | PROT_EXEC;
66 #else
67  return PROT_EXEC;
68 #endif
69  default:
70  llvm_unreachable("Illegal memory protection flag specified!");
71  }
72  // Provide a default return value as required by some compilers.
73  return PROT_NONE;
74 }
75 
76 } // anonymous namespace
77 
78 namespace llvm {
79 namespace sys {
80 
81 MemoryBlock
82 Memory::allocateMappedMemory(size_t NumBytes,
83  const MemoryBlock *const NearBlock,
84  unsigned PFlags,
85  std::error_code &EC) {
86  EC = std::error_code();
87  if (NumBytes == 0)
88  return MemoryBlock();
89 
90  static const size_t PageSize = Process::getPageSize();
91  const size_t NumPages = (NumBytes+PageSize-1)/PageSize;
92 
93  int fd = -1;
94 
95  int MMFlags = MAP_PRIVATE |
96 #ifdef MAP_ANONYMOUS
97  MAP_ANONYMOUS
98 #else
99  MAP_ANON
100 #endif
101  ; // Ends statement above
102 
103  int Protect = getPosixProtectionFlags(PFlags);
104 
105 #if defined(__NetBSD__) && defined(PROT_MPROTECT)
106  Protect |= PROT_MPROTECT(PROT_READ | PROT_WRITE | PROT_EXEC);
107 #endif
108 
109  // Use any near hint and the page size to set a page-aligned starting address
110  uintptr_t Start = NearBlock ? reinterpret_cast<uintptr_t>(NearBlock->base()) +
111  NearBlock->size() : 0;
112  if (Start && Start % PageSize)
113  Start += PageSize - Start % PageSize;
114 
115  void *Addr = ::mmap(reinterpret_cast<void*>(Start), PageSize*NumPages,
116  Protect, MMFlags, fd, 0);
117  if (Addr == MAP_FAILED) {
118  if (NearBlock) //Try again without a near hint
119  return allocateMappedMemory(NumBytes, nullptr, PFlags, EC);
120 
121  EC = std::error_code(errno, std::generic_category());
122  return MemoryBlock();
123  }
124 
125  MemoryBlock Result;
126  Result.Address = Addr;
127  Result.Size = NumPages*PageSize;
128 
129  // Rely on protectMappedMemory to invalidate instruction cache.
130  if (PFlags & MF_EXEC) {
131  EC = Memory::protectMappedMemory (Result, PFlags);
132  if (EC != std::error_code())
133  return MemoryBlock();
134  }
135 
136  return Result;
137 }
138 
139 std::error_code
140 Memory::releaseMappedMemory(MemoryBlock &M) {
141  if (M.Address == nullptr || M.Size == 0)
142  return std::error_code();
143 
144  if (0 != ::munmap(M.Address, M.Size))
145  return std::error_code(errno, std::generic_category());
146 
147  M.Address = nullptr;
148  M.Size = 0;
149 
150  return std::error_code();
151 }
152 
153 std::error_code
154 Memory::protectMappedMemory(const MemoryBlock &M, unsigned Flags) {
155  static const size_t PageSize = Process::getPageSize();
156  if (M.Address == nullptr || M.Size == 0)
157  return std::error_code();
158 
159  if (!Flags)
160  return std::error_code(EINVAL, std::generic_category());
161 
162  int Protect = getPosixProtectionFlags(Flags);
163  uintptr_t Start = alignAddr((uint8_t *)M.Address - PageSize + 1, PageSize);
164  uintptr_t End = alignAddr((uint8_t *)M.Address + M.Size, PageSize);
165 
166  bool InvalidateCache = (Flags & MF_EXEC);
167 
168 #if defined(__arm__) || defined(__aarch64__)
169  // Certain ARM implementations treat icache clear instruction as a memory read,
170  // and CPU segfaults on trying to clear cache on !PROT_READ page. Therefore we need
171  // to temporarily add PROT_READ for the sake of flushing the instruction caches.
172  if (InvalidateCache && !(Protect & PROT_READ)) {
173  int Result = ::mprotect((void *)Start, End - Start, Protect | PROT_READ);
174  if (Result != 0)
175  return std::error_code(errno, std::generic_category());
176 
177  Memory::InvalidateInstructionCache(M.Address, M.Size);
178  InvalidateCache = false;
179  }
180 #endif
181 
182  int Result = ::mprotect((void *)Start, End - Start, Protect);
183 
184  if (Result != 0)
185  return std::error_code(errno, std::generic_category());
186 
187  if (InvalidateCache)
188  Memory::InvalidateInstructionCache(M.Address, M.Size);
189 
190  return std::error_code();
191 }
192 
193 /// InvalidateInstructionCache - Before the JIT can run a block of code
194 /// that has been emitted it must invalidate the instruction cache on some
195 /// platforms.
196 void Memory::InvalidateInstructionCache(const void *Addr,
197  size_t Len) {
198 
199 // icache invalidation for PPC and ARM.
200 #if defined(__APPLE__)
201 
202 # if (defined(__POWERPC__) || defined (__ppc__) || \
203  defined(_POWER) || defined(_ARCH_PPC) || defined(__arm__) || \
204  defined(__arm64__))
205  sys_icache_invalidate(const_cast<void *>(Addr), Len);
206 # endif
207 
208 #else
209 
210 # if (defined(__POWERPC__) || defined (__ppc__) || \
211  defined(_POWER) || defined(_ARCH_PPC)) && defined(__GNUC__)
212  const size_t LineSize = 32;
213 
214  const intptr_t Mask = ~(LineSize - 1);
215  const intptr_t StartLine = ((intptr_t) Addr) & Mask;
216  const intptr_t EndLine = ((intptr_t) Addr + Len + LineSize - 1) & Mask;
217 
218  for (intptr_t Line = StartLine; Line < EndLine; Line += LineSize)
219  asm volatile("dcbf 0, %0" : : "r"(Line));
220  asm volatile("sync");
221 
222  for (intptr_t Line = StartLine; Line < EndLine; Line += LineSize)
223  asm volatile("icbi 0, %0" : : "r"(Line));
224  asm volatile("isync");
225 # elif (defined(__arm__) || defined(__aarch64__) || defined(__mips__)) && \
226  defined(__GNUC__)
227  // FIXME: Can we safely always call this for __GNUC__ everywhere?
228  const char *Start = static_cast<const char *>(Addr);
229  const char *End = Start + Len;
230  __clear_cache(const_cast<char *>(Start), const_cast<char *>(End));
231 # endif
232 
233 #endif // end apple
234 
235  ValgrindDiscardTranslations(Addr, Len);
236 }
237 
238 } // namespace sys
239 } // namespace llvm
Compute iterated dominance frontiers using a linear time algorithm.
Definition: AllocatorList.h:24
void ValgrindDiscardTranslations(const void *Addr, size_t Len)
Definition: Valgrind.cpp:52
static const unsigned End
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
uintptr_t alignAddr(const void *Addr, size_t Alignment)
Aligns Addr to Alignment bytes, rounding up.
Definition: MathExtras.h:615
Provides a library for accessing information about this process and other processes on the operating ...
static cl::opt< int > PageSize("imp-null-check-page-size", cl::desc("The page size of the target in bytes"), cl::init(4096), cl::Hidden)
std::underlying_type< E >::type Mask()
Get a bitmask with 1s in all places up to the high-order bit of E&#39;s largest value.
Definition: BitmaskEnum.h:81