LLVM
23.0.0git
lib
Target
AArch64
MCTargetDesc
AArch64MCLFIRewriter.h
Go to the documentation of this file.
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//===- AArch64MCLFIRewriter.h -----------------------------------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file declares the AArch64MCLFIRewriter class, the AArch64 specific
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// subclass of MCLFIRewriter.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_AARCH64_MCTARGETDESC_AARCH64MCLFIREWRITER_H
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#define LLVM_LIB_TARGET_AARCH64_MCTARGETDESC_AARCH64MCLFIREWRITER_H
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#include "
llvm/MC/MCInstrInfo.h
"
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#include "
llvm/MC/MCLFIRewriter.h
"
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#include "
llvm/MC/MCRegister.h
"
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#include "
llvm/MC/MCRegisterInfo.h
"
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namespace
llvm
{
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class
MCContext
;
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class
MCInst
;
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class
MCStreamer
;
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class
MCSubtargetInfo
;
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/// Rewrites AArch64 instructions for LFI sandboxing.
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///
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/// This class implements the LFI (Lightweight Fault Isolation) rewriting
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/// for AArch64 instructions. It transforms instructions to ensure memory
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/// accesses and control flow are confined within the sandbox region.
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///
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/// Reserved registers:
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/// - X27: Sandbox base address (always holds the base)
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/// - X28: Safe address register (always within sandbox)
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/// - X26: Scratch register for intermediate calculations
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/// - X25: context register (points to thread-local runtime data)
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/// - SP: Stack pointer (always within sandbox)
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/// - X30: Link register (always within sandbox)
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class
AArch64MCLFIRewriter
:
public
MCLFIRewriter
{
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public
:
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AArch64MCLFIRewriter
(
MCContext
&Ctx, std::unique_ptr<MCRegisterInfo> &&RI,
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std::unique_ptr<MCInstrInfo> &&
II
)
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:
MCLFIRewriter
(Ctx,
std
::
move
(RI),
std
::
move
(
II
)) {}
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bool
rewriteInst
(
const
MCInst
&Inst,
MCStreamer
&Out,
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const
MCSubtargetInfo
&STI)
override
;
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private
:
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/// Recursion guard to prevent infinite loops when emitting instructions.
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bool
Guard =
false
;
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// Instruction classification.
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bool
mayModifyReserved(
const
MCInst
&Inst)
const
;
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// Instruction emission.
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void
emitInst(
const
MCInst
&Inst,
MCStreamer
&Out,
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const
MCSubtargetInfo
&STI);
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void
emitAddMask(
MCRegister
Dest,
MCRegister
Src,
MCStreamer
&Out,
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const
MCSubtargetInfo
&STI);
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void
emitBranch(
unsigned
Opcode,
MCRegister
Target
,
MCStreamer
&Out,
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const
MCSubtargetInfo
&STI);
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void
emitMov(
MCRegister
Dest,
MCRegister
Src,
MCStreamer
&Out,
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const
MCSubtargetInfo
&STI);
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// Rewriting logic.
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void
doRewriteInst(
const
MCInst
&Inst,
MCStreamer
&Out,
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const
MCSubtargetInfo
&STI);
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// System instructions.
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void
rewriteSyscall(
const
MCInst
&Inst,
MCStreamer
&Out,
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const
MCSubtargetInfo
&STI);
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void
rewriteTPRead(
const
MCInst
&Inst,
MCStreamer
&Out,
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const
MCSubtargetInfo
&STI);
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void
rewriteTPWrite(
const
MCInst
&Inst,
MCStreamer
&Out,
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const
MCSubtargetInfo
&STI);
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};
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}
// namespace llvm
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#endif
// LLVM_LIB_TARGET_AARCH64_MCTARGETDESC_AARCH64MCLFIREWRITER_H
MCInstrInfo.h
MCLFIRewriter.h
This file declares the MCLFIRewriter class, an abstract class that encapsulates the rewriting logic f...
MCRegisterInfo.h
MCRegister.h
II
uint64_t IntrinsicInst * II
Definition
NVVMIntrRange.cpp:46
llvm::AArch64MCLFIRewriter::AArch64MCLFIRewriter
AArch64MCLFIRewriter(MCContext &Ctx, std::unique_ptr< MCRegisterInfo > &&RI, std::unique_ptr< MCInstrInfo > &&II)
Definition
AArch64MCLFIRewriter.h:42
llvm::AArch64MCLFIRewriter::rewriteInst
bool rewriteInst(const MCInst &Inst, MCStreamer &Out, const MCSubtargetInfo &STI) override
Definition
AArch64MCLFIRewriter.cpp:198
llvm::MCContext
Context object for machine code objects.
Definition
MCContext.h:83
llvm::MCInst
Instances of this class represent a single low-level machine instruction.
Definition
MCInst.h:188
llvm::MCLFIRewriter::MCLFIRewriter
MCLFIRewriter(MCContext &Ctx, std::unique_ptr< MCRegisterInfo > &&RI, std::unique_ptr< MCInstrInfo > &&II)
Definition
MCLFIRewriter.h:39
llvm::MCRegister
Wrapper class representing physical registers. Should be passed by value.
Definition
MCRegister.h:41
llvm::MCStreamer
Streaming machine code generation interface.
Definition
MCStreamer.h:222
llvm::MCSubtargetInfo
Generic base class for all target subtargets.
Definition
MCSubtargetInfo.h:77
llvm::Target
Target - Wrapper for Target specific information.
Definition
TargetRegistry.h:148
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition
FunctionInfo.h:25
llvm::move
OutputIt move(R &&Range, OutputIt Out)
Provide wrappers to std::move which take ranges instead of having to pass begin/end explicitly.
Definition
STLExtras.h:1917
std
Implement std::hash so that hash_code can be used in STL containers.
Definition
BitVector.h:870
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