13#ifndef LLVM_LIB_TARGET_SPIRV_MCTARGETDESC_SPIRVMCTARGETDESC_H
14#define LLVM_LIB_TARGET_SPIRV_MCTARGETDESC_SPIRVMCTARGETDESC_H
24class MCObjectTargetWriter;
34 const MCRegisterInfo &
MRI,
35 const MCTargetOptions &
Options);
42#define GET_REGINFO_ENUM
43#include "SPIRVGenRegisterInfo.inc"
46#define GET_INSTRINFO_ENUM
47#define GET_INSTRINFO_MC_HELPER_DECLS
48#include "SPIRVGenInstrInfo.inc"
50#define GET_SUBTARGETINFO_ENUM
51#include "SPIRVGenSubtargetInfo.inc"
unsigned const MachineRegisterInfo * MRI
This is an optimization pass for GlobalISel generic memory operations.
MCCodeEmitter * createSPIRVMCCodeEmitter(const MCInstrInfo &MCII, MCContext &Ctx)
std::unique_ptr< MCObjectTargetWriter > createSPIRVObjectTargetWriter()
MCAsmBackend * createSPIRVAsmBackend(const Target &T, const MCSubtargetInfo &STI, const MCRegisterInfo &MRI, const MCTargetOptions &Options)