13#ifndef LLVM_LIB_TARGET_SPIRV_MCTARGETDESC_SPIRVMCTARGETDESC_H
14#define LLVM_LIB_TARGET_SPIRV_MCTARGETDESC_SPIRVMCTARGETDESC_H
25class MCObjectTargetWriter;
35 const MCRegisterInfo &
MRI,
36 const MCTargetOptions &
Options);
41#define GET_REGINFO_ENUM
42#include "SPIRVGenRegisterInfo.inc"
45#define GET_INSTRINFO_ENUM
46#define GET_INSTRINFO_MC_HELPER_DECLS
47#include "SPIRVGenInstrInfo.inc"
49#define GET_SUBTARGETINFO_ENUM
50#include "SPIRVGenSubtargetInfo.inc"
55 return Reg & ~(1U << 31);
unsigned const MachineRegisterInfo * MRI
assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")
unsigned getIDFromRegister(unsigned Reg)
This is an optimization pass for GlobalISel generic memory operations.
MCCodeEmitter * createSPIRVMCCodeEmitter(const MCInstrInfo &MCII, MCContext &Ctx)
MCAsmBackend * createSPIRVAsmBackend(const Target &T, const MCSubtargetInfo &STI, const MCRegisterInfo &MRI, const MCTargetOptions &Options)