13#ifndef LLVM_LIB_TARGET_VE_MCTARGETDESC_VEMCTARGETDESC_H
14#define LLVM_LIB_TARGET_VE_MCTARGETDESC_VEMCTARGETDESC_H
25class MCObjectTargetWriter;
33 const MCRegisterInfo &
MRI,
34 const MCTargetOptions &
Options);
41#define GET_REGINFO_ENUM
42#include "VEGenRegisterInfo.inc"
46#define GET_INSTRINFO_ENUM
47#define GET_INSTRINFO_MC_HELPER_DECLS
48#include "VEGenInstrInfo.inc"
50#define GET_SUBTARGETINFO_ENUM
51#include "VEGenSubtargetInfo.inc"
unsigned const MachineRegisterInfo * MRI
This is an optimization pass for GlobalISel generic memory operations.
MCAsmBackend * createVEAsmBackend(const Target &T, const MCSubtargetInfo &STI, const MCRegisterInfo &MRI, const MCTargetOptions &Options)
MCCodeEmitter * createVEMCCodeEmitter(const MCInstrInfo &MCII, MCContext &Ctx)
std::unique_ptr< MCObjectTargetWriter > createVEELFObjectWriter(uint8_t OSABI)