#include "llvm/CodeGen/VLIWMachineScheduler.h"

Inheritance diagram for llvm::ConvergingVLIWScheduler:

Classes
struct	SchedCandidate
	Store the state used by ConvergingVLIWScheduler heuristics, required for the lifetime of one invocation of pickNode(). More...

struct	VLIWSchedBoundary
	Each Scheduling boundary is associated with ready queues. More...

Public Types
enum	{ TopQID = 1 , BotQID = 2 , LogMaxQID = 2 }
	SUnit::NodeQueueId: 0 (none), 1 (top), 2 (bot), 3 (both) More...

Public Member Functions
	ConvergingVLIWScheduler ()

virtual	~ConvergingVLIWScheduler ()=default

void	initialize (ScheduleDAGMI *dag) override
	Initialize the strategy after building the DAG for a new region.

SUnit *	pickNode (bool &IsTopNode) override
	Pick the best node to balance the schedule. Implements MachineSchedStrategy.

void	schedNode (SUnit *SU, bool IsTopNode) override
	Update the scheduler's state after scheduling a node.

void	releaseTopNode (SUnit *SU) override
	When all predecessor dependencies have been resolved, free this node for top-down scheduling.

void	releaseBottomNode (SUnit *SU) override
	When all successor dependencies have been resolved, free this node for bottom-up scheduling.

unsigned	reportPackets ()

Public Member Functions inherited from llvm::MachineSchedStrategy
virtual	~MachineSchedStrategy ()=default

virtual void	initPolicy (MachineBasicBlock::iterator Begin, MachineBasicBlock::iterator End, unsigned NumRegionInstrs)
	Optionally override the per-region scheduling policy.

virtual MachineSchedPolicy	getPolicy () const

virtual void	dumpPolicy () const

virtual bool	shouldTrackPressure () const
	Check if pressure tracking is needed before building the DAG and initializing this strategy.

virtual bool	shouldTrackLaneMasks () const
	Returns true if lanemasks should be tracked.

virtual bool	doMBBSchedRegionsTopDown () const

virtual void	initialize (ScheduleDAGMI *DAG)=0
	Initialize the strategy after building the DAG for a new region.

virtual void	enterMBB (MachineBasicBlock *MBB)
	Tell the strategy that MBB is about to be processed.

virtual void	leaveMBB ()
	Tell the strategy that current MBB is done.

virtual void	registerRoots ()
	Notify this strategy that all roots have been released (including those that depend on EntrySU or ExitSU).

virtual SUnit *	pickNode (bool &IsTopNode)=0
	Pick the next node to schedule, or return NULL.

virtual void	scheduleTree (unsigned SubtreeID)
	Scheduler callback to notify that a new subtree is scheduled.

virtual void	schedNode (SUnit *SU, bool IsTopNode)=0
	Notify MachineSchedStrategy that ScheduleDAGMI has scheduled an instruction and updated scheduled/remaining flags in the DAG nodes.

virtual void	releaseTopNode (SUnit *SU)=0
	When all predecessor dependencies have been resolved, free this node for top-down scheduling.

virtual void	releaseBottomNode (SUnit *SU)=0
	When all successor dependencies have been resolved, free this node for bottom-up scheduling.

Protected Types
enum	CandResult { NoCand , NodeOrder , SingleExcess , SingleCritical , SingleMax , MultiPressure , BestCost , Weak }
	Represent the type of SchedCandidate found within a single queue. More...

Protected Member Functions
virtual VLIWResourceModel *	createVLIWResourceModel (const TargetSubtargetInfo &STI, const TargetSchedModel *SchedModel) const

SUnit *	pickNodeBidrectional (bool &IsTopNode)
	Pick the best candidate node from either the top or bottom queue.

int	pressureChange (const SUnit *SU, bool isBotUp)
	Check if the instruction changes the register pressure of a register in the high pressure set.

virtual int	SchedulingCost (ReadyQueue &Q, SUnit *SU, SchedCandidate &Candidate, RegPressureDelta &Delta, bool verbose)
	Single point to compute overall scheduling cost.

CandResult	pickNodeFromQueue (VLIWSchedBoundary &Zone, const RegPressureTracker &RPTracker, SchedCandidate &Candidate)
	Pick the best candidate from the top queue.

void	traceCandidate (const char Label, const ReadyQueue &Q, SUnit SU, int Cost, PressureChange P=PressureChange())

void	readyQueueVerboseDump (const RegPressureTracker &RPTracker, SchedCandidate &Candidate, ReadyQueue &Q)

Protected Attributes
VLIWMachineScheduler *	DAG = nullptr

const TargetSchedModel *	SchedModel = nullptr

VLIWSchedBoundary	Top

VLIWSchedBoundary	Bot

SmallVector< bool >	HighPressureSets
	List of pressure sets that have a high pressure level in the region.

Static Protected Attributes
static constexpr unsigned	PriorityOne = 200

static constexpr unsigned	PriorityTwo = 50

static constexpr unsigned	PriorityThree = 75

static constexpr unsigned	ScaleTwo = 10

Detailed Description

Definition at line 89 of file VLIWMachineScheduler.h.

Member Enumeration Documentation

◆ anonymous enum

anonymous enum

SUnit::NodeQueueId: 0 (none), 1 (top), 2 (bot), 3 (both)

Enumerator
TopQID
BotQID
LogMaxQID

Definition at line 223 of file VLIWMachineScheduler.h.

◆ CandResult

enum llvm::ConvergingVLIWScheduler::CandResult

protected

Represent the type of SchedCandidate found within a single queue.

Enumerator
NoCand
NodeOrder
SingleExcess
SingleCritical
SingleMax
MultiPressure
BestCost
Weak

Definition at line 106 of file VLIWMachineScheduler.h.

Constructor & Destructor Documentation

◆ ConvergingVLIWScheduler()

llvm::ConvergingVLIWScheduler::ConvergingVLIWScheduler ( )

inline

Definition at line 225 of file VLIWMachineScheduler.h.

◆ ~ConvergingVLIWScheduler()

virtual llvm::ConvergingVLIWScheduler::~ConvergingVLIWScheduler ( )

virtualdefault

Member Function Documentation

◆ createVLIWResourceModel()

VLIWResourceModel * ConvergingVLIWScheduler::createVLIWResourceModel	(	const TargetSubtargetInfo &	STI,
		const TargetSchedModel *	SchedModel
	)		const

protectedvirtual

Reimplemented in llvm::HexagonConvergingVLIWScheduler.

Definition at line 302 of file VLIWMachineScheduler.cpp.

References SchedModel.

Referenced by initialize().

◆ initialize()

void ConvergingVLIWScheduler::initialize ( ScheduleDAGMI * DAG )

overridevirtual

Initialize the strategy after building the DAG for a new region.

Implements llvm::MachineSchedStrategy.

Definition at line 270 of file VLIWMachineScheduler.cpp.

References llvm::SmallVectorImpl< T >::assign(), Bot, createVLIWResourceModel(), DAG, llvm::TargetSubtargetInfo::getInstrInfo(), llvm::TargetSchedModel::getInstrItineraries(), llvm::VLIWMachineScheduler::getRegClassInfo(), llvm::ScheduleDAGMILive::getRegPressure(), llvm::RegisterClassInfo::getRegPressureSetLimit(), llvm::ScheduleDAGInstrs::getSchedModel(), llvm::MachineFunction::getSubtarget(), llvm::ConvergingVLIWScheduler::VLIWSchedBoundary::HazardRec, HighPressureSets, llvm::ConvergingVLIWScheduler::VLIWSchedBoundary::init(), llvm::RegisterPressure::MaxSetPressure, llvm::ScheduleDAG::MF, llvm::ConvergingVLIWScheduler::VLIWSchedBoundary::ResourceModel, RPThreshold, SchedModel, TII, and Top.

◆ pickNode()

SUnit * ConvergingVLIWScheduler::pickNode ( bool & IsTopNode )

overridevirtual

Pick the best node to balance the schedule. Implements MachineSchedStrategy.

Implements llvm::MachineSchedStrategy.

Definition at line 947 of file VLIWMachineScheduler.cpp.

References assert(), llvm::ConvergingVLIWScheduler::VLIWSchedBoundary::Available, Bot, llvm::ScheduleDAGMI::bottom(), llvm::MISched::BottomUp, llvm::ConvergingVLIWScheduler::VLIWSchedBoundary::CurrCycle, DAG, llvm::dbgs(), llvm::ScheduleDAGInstrs::dumpNode(), llvm::ReadyQueue::empty(), llvm::ScheduleDAGMILive::getBotRPTracker(), llvm::ScheduleDAGMILive::getTopRPTracker(), llvm::SUnit::isBottomReady(), llvm::SUnit::isTopReady(), LLVM_DEBUG, NoCand, llvm::ConvergingVLIWScheduler::VLIWSchedBoundary::Pending, pickNodeBidrectional(), pickNodeFromQueue(), llvm::ConvergingVLIWScheduler::VLIWSchedBoundary::pickOnlyChoice(), llvm::PreRADirection, llvm::ConvergingVLIWScheduler::VLIWSchedBoundary::removeReady(), reportPackets(), llvm::ConvergingVLIWScheduler::SchedCandidate::SU, llvm::ScheduleDAGMI::top(), Top, and llvm::MISched::TopDown.

◆ pickNodeBidrectional()

SUnit * ConvergingVLIWScheduler::pickNodeBidrectional ( bool & IsTopNode )

protected

Pick the best candidate node from either the top or bottom queue.

Definition at line 881 of file VLIWMachineScheduler.cpp.

References assert(), Bot, DAG, llvm::dbgs(), llvm::ScheduleDAGMILive::getBotRPTracker(), llvm::ScheduleDAGMILive::getTopRPTracker(), LLVM_DEBUG, NoCand, pickNodeFromQueue(), llvm::ConvergingVLIWScheduler::VLIWSchedBoundary::pickOnlyChoice(), llvm::ConvergingVLIWScheduler::SchedCandidate::SCost, SingleCritical, SingleExcess, SingleMax, llvm::ConvergingVLIWScheduler::SchedCandidate::SU, and Top.

Referenced by pickNode().

◆ pickNodeFromQueue()

ConvergingVLIWScheduler::CandResult ConvergingVLIWScheduler::pickNodeFromQueue	(	VLIWSchedBoundary &	Zone,
		const RegPressureTracker &	RPTracker,
		SchedCandidate &	Candidate
	)

protected

Pick the best candidate from the top queue.

TODO: getMaxPressureDelta results can be mostly cached for each SUnit during DAG building. To adjust for the current scheduling location we need to maintain the number of vreg uses remaining to be top-scheduled.

Definition at line 766 of file VLIWMachineScheduler.cpp.

References llvm::ConvergingVLIWScheduler::VLIWSchedBoundary::Available, llvm::ReadyQueue::begin(), BestCost, BotQID, DAG, llvm::ReadyQueue::dump(), llvm::ReadyQueue::end(), llvm::ReadyQueue::getID(), llvm::ScheduleDAGMILive::getRegionCriticalPSets(), llvm::ScheduleDAGMILive::getRegPressure(), llvm::getWeakLeft(), I, llvm::ConvergingVLIWScheduler::VLIWSchedBoundary::isLatencyBound(), LLVM_DEBUG, llvm::RegisterPressure::MaxSetPressure, NoCand, llvm::SUnit::NodeNum, NodeOrder, llvm::SUnit::Preds, readyQueueVerboseDump(), llvm::ConvergingVLIWScheduler::SchedCandidate::RPDelta, SchedDebugVerboseLevel, SchedulingCost(), llvm::ConvergingVLIWScheduler::SchedCandidate::SCost, llvm::ConvergingVLIWScheduler::SchedCandidate::SU, llvm::SUnit::Succs, TopQID, traceCandidate(), UseNewerCandidate, and Weak.

Referenced by pickNode(), and pickNodeBidrectional().

◆ pressureChange()

int ConvergingVLIWScheduler::pressureChange	(	const SUnit *	SU,
		bool	isBotUp
	)

protected

Check if the instruction changes the register pressure of a register in the high pressure set.

The function returns a negative value if the pressure decreases and a positive value is the pressure increases. If the instruction doesn't use a high pressure register or doesn't change the register pressure, then return 0.

Definition at line 577 of file VLIWMachineScheduler.cpp.

References DAG, llvm::ScheduleDAGMILive::getPressureDiff(), HighPressureSets, and P.

Referenced by SchedulingCost().

◆ readyQueueVerboseDump()

void ConvergingVLIWScheduler::readyQueueVerboseDump	(	const RegPressureTracker &	RPTracker,
		SchedCandidate &	Candidate,
		ReadyQueue &	Q
	)

protected

Definition at line 521 of file VLIWMachineScheduler.cpp.

References llvm::ReadyQueue::begin(), DAG, llvm::dbgs(), llvm::ReadyQueue::end(), llvm::RegPressureTracker::getMaxPressureDelta(), llvm::ReadyQueue::getName(), llvm::ScheduleDAGMILive::getRegionCriticalPSets(), llvm::ScheduleDAGMILive::getRegPressure(), I, llvm::RegisterPressure::MaxSetPressure, and SchedulingCost().

Referenced by pickNodeFromQueue().

◆ releaseBottomNode()

void ConvergingVLIWScheduler::releaseBottomNode ( SUnit * SU )

overridevirtual

When all successor dependencies have been resolved, free this node for bottom-up scheduling.

Implements llvm::MachineSchedStrategy.

Definition at line 322 of file VLIWMachineScheduler.cpp.

References assert(), Bot, llvm::SUnit::BotReadyCycle, llvm::SUnit::getInstr(), I, llvm::SUnit::isScheduled, llvm::ConvergingVLIWScheduler::VLIWSchedBoundary::MaxMinLatency, llvm::ConvergingVLIWScheduler::VLIWSchedBoundary::releaseNode(), and llvm::SUnit::Succs.

◆ releaseTopNode()

void ConvergingVLIWScheduler::releaseTopNode ( SUnit * SU )

overridevirtual

When all predecessor dependencies have been resolved, free this node for top-down scheduling.

Implements llvm::MachineSchedStrategy.

Definition at line 307 of file VLIWMachineScheduler.cpp.

References llvm::SDep::getLatency(), llvm::SDep::getSUnit(), llvm::SUnit::isScheduled, llvm::ConvergingVLIWScheduler::VLIWSchedBoundary::MaxMinLatency, llvm::SUnit::Preds, llvm::ConvergingVLIWScheduler::VLIWSchedBoundary::releaseNode(), Top, and llvm::SUnit::TopReadyCycle.

◆ reportPackets()

unsigned llvm::ConvergingVLIWScheduler::reportPackets ( )

inline

Definition at line 238 of file VLIWMachineScheduler.h.

References Bot, llvm::VLIWResourceModel::getTotalPackets(), llvm::ConvergingVLIWScheduler::VLIWSchedBoundary::ResourceModel, and Top.

Referenced by pickNode().

◆ schedNode()

void ConvergingVLIWScheduler::schedNode	(	SUnit *	SU,
		bool	IsTopNode
	)

overridevirtual

Update the scheduler's state after scheduling a node.

This is the same node that was just returned by pickNode(). However, VLIWMachineScheduler needs to update it's state based on the current cycle before MachineSchedStrategy does.

Implements llvm::MachineSchedStrategy.

Definition at line 996 of file VLIWMachineScheduler.cpp.

References Bot, llvm::SUnit::BotReadyCycle, llvm::ConvergingVLIWScheduler::VLIWSchedBoundary::bumpNode(), llvm::ConvergingVLIWScheduler::VLIWSchedBoundary::CurrCycle, Top, and llvm::SUnit::TopReadyCycle.