HardwareUnitInfo is a wrapper class which maps to some real hardware resource. More...

#include "Target/AMDGPU/AMDGPUCoExecSchedStrategy.h"

Public Member Functions
	HardwareUnitInfo ()
unsigned	size ()
unsigned	getTotalCycles ()
void	setType (unsigned TheType)
AMDGPU::InstructionFlavor	getType () const
bool	producesCoexecWindow () const
void	setProducesCoexecWindow (bool Val)
bool	contains (SUnit *SU) const
void	setBufferSize (unsigned Size)
unsigned	getBufferSize ()
unsigned	getBufferAvailableCycle (unsigned CurrCycle)
SUnit *	getLastScheduledSU ()
SUnit *	getHigherPriority (SUnit SU, SUnit Other) const
void	reset ()
SUnit *	getNextTargetSU (bool LookDeep=false) const
void	insert (SUnit *SU, unsigned BlockingCycles)
	Insert the `SU` into AllSUs and account its `BlockingCycles` into the TotalCycles.
void	markScheduled (SUnit *SU, unsigned BlockingCycles)
	Update the state for `SU` being scheduled by removing it from the AllSUs and reducing its `BlockingCycles` from the TotalCycles.
void	finalizeCycles ()
	After we've collected all the region pressure for this HWUI, correct for any specifics of the behavior of this resource.

Detailed Description

HardwareUnitInfo is a wrapper class which maps to some real hardware resource.

This is used to model hardware resource pressure per region, and guide scheduling heuristics.

Definition at line 68 of file AMDGPUCoExecSchedStrategy.h.

Constructor & Destructor Documentation

◆ HardwareUnitInfo()

llvm::HardwareUnitInfo::HardwareUnitInfo ( )

inline

Definition at line 113 of file AMDGPUCoExecSchedStrategy.h.

Member Function Documentation

◆ contains()

bool llvm::HardwareUnitInfo::contains ( SUnit * SU ) const

inline

Definition at line 130 of file AMDGPUCoExecSchedStrategy.h.

Referenced by llvm::CandidateHeuristics::tryCriticalResource().

◆ finalizeCycles()

void HardwareUnitInfo::finalizeCycles ( )

After we've collected all the region pressure for this HWUI, correct for any specifics of the behavior of this resource.

For example, if the HardwareUnit can hold N instructions simultaneously, then there is no penalty for scheduling N instructions back to back.

Definition at line 532 of file AMDGPUCoExecSchedStrategy.cpp.

◆ getBufferAvailableCycle()

unsigned llvm::HardwareUnitInfo::getBufferAvailableCycle ( unsigned CurrCycle )

inline

Returns: the next cycle where there is space in the buffer.

Definition at line 137 of file AMDGPUCoExecSchedStrategy.h.

Referenced by llvm::CandidateHeuristics::getStallCosts().

◆ getBufferSize()

unsigned llvm::HardwareUnitInfo::getBufferSize ( )

inline

Definition at line 134 of file AMDGPUCoExecSchedStrategy.h.

Referenced by llvm::CandidateHeuristics::getStallCosts().

◆ getHigherPriority()

SUnit * llvm::HardwareUnitInfo::getHigherPriority	(	SUnit *	SU,
		SUnit *	Other ) const

inline

Returns: the SUnit with higher priority or nullptr if they are the same. This method looks through the PrioritySUs to determine if one SU is more prioritized than the other. If neither are in the PrioritySUs list, then neither have priority over each other.

Definition at line 163 of file AMDGPUCoExecSchedStrategy.h.

References llvm::Other.

Referenced by llvm::CandidateHeuristics::tryCriticalResource().

◆ getLastScheduledSU()

SUnit * llvm::HardwareUnitInfo::getLastScheduledSU ( )

inline

Returns: the most recently scheduled SU for this HardwareUnit.

Definition at line 151 of file AMDGPUCoExecSchedStrategy.h.

Referenced by llvm::CandidateHeuristics::getStallCosts().

◆ getNextTargetSU()

SUnit * HardwareUnitInfo::getNextTargetSU ( bool LookDeep = false ) const

Returns: the next SU in PrioritySUs that is not ready. If LookDeep is set, we will look beyond the PrioritySUs (if all the PrioritySUs are ready) to AllSUs to attempt to find a target SU. When looking through AllSUs we sort pick the target SU by minimal depth for top-down scheduling. getNextTargetSU is useful for determining which SU on this HardwareUnit we are trying to schedule - this info helps us determine which dependencies to schedule. LookDeep is useful if the dependencies are long latency (e.g. memory instructions). If we have many long latency dependencies, it is beneficial to enable SUs multiple levels ahead.

Definition at line 440 of file AMDGPUCoExecSchedStrategy.cpp.

Referenced by llvm::CandidateHeuristics::tryCriticalResourceDependency().