|
LLVM 20.0.0git
|
| Enumerator | |
|---|---|
| FIRST_NUMBER | |
| WrapperLarge | |
| CALL | |
| CALL_RVMARKER | |
| CALL_BTI | |
| AUTH_CALL | |
| AUTH_TC_RETURN | |
| AUTH_CALL_RVMARKER | |
| COALESCER_BARRIER | |
| VG_SAVE | |
| VG_RESTORE | |
| SMSTART | |
| SMSTOP | |
| RESTORE_ZA | |
| RESTORE_ZT | |
| SAVE_ZT | |
| CALL_ARM64EC_TO_X64 | |
| TLSDESC_CALLSEQ | |
| ADRP | |
| ADR | |
| ADDlow | |
| LOADgot | |
| RET_GLUE | |
| BRCOND | |
| CSEL | |
| CSINV | |
| CSNEG | |
| CSINC | |
| THREAD_POINTER | |
| ADC | |
| SBC | |
| PROBED_ALLOCA | |
| ABDS_PRED | |
| ABDU_PRED | |
| FADD_PRED | |
| FDIV_PRED | |
| FMA_PRED | |
| FMAX_PRED | |
| FMAXNM_PRED | |
| FMIN_PRED | |
| FMINNM_PRED | |
| FMUL_PRED | |
| FSUB_PRED | |
| HADDS_PRED | |
| HADDU_PRED | |
| MUL_PRED | |
| MULHS_PRED | |
| MULHU_PRED | |
| RHADDS_PRED | |
| RHADDU_PRED | |
| SDIV_PRED | |
| SHL_PRED | |
| SMAX_PRED | |
| SMIN_PRED | |
| SRA_PRED | |
| SRL_PRED | |
| UDIV_PRED | |
| UMAX_PRED | |
| UMIN_PRED | |
| BIC | |
| SRAD_MERGE_OP1 | |
| FABS_MERGE_PASSTHRU | |
| FCEIL_MERGE_PASSTHRU | |
| FFLOOR_MERGE_PASSTHRU | |
| FNEARBYINT_MERGE_PASSTHRU | |
| FNEG_MERGE_PASSTHRU | |
| FRECPX_MERGE_PASSTHRU | |
| FRINT_MERGE_PASSTHRU | |
| FROUND_MERGE_PASSTHRU | |
| FROUNDEVEN_MERGE_PASSTHRU | |
| FSQRT_MERGE_PASSTHRU | |
| FTRUNC_MERGE_PASSTHRU | |
| FP_ROUND_MERGE_PASSTHRU | |
| FP_EXTEND_MERGE_PASSTHRU | |
| UINT_TO_FP_MERGE_PASSTHRU | |
| SINT_TO_FP_MERGE_PASSTHRU | |
| FCVTX_MERGE_PASSTHRU | |
| FCVTZU_MERGE_PASSTHRU | |
| FCVTZS_MERGE_PASSTHRU | |
| SIGN_EXTEND_INREG_MERGE_PASSTHRU | |
| ZERO_EXTEND_INREG_MERGE_PASSTHRU | |
| ABS_MERGE_PASSTHRU | |
| NEG_MERGE_PASSTHRU | |
| SETCC_MERGE_ZERO | |
| ADDS | |
| SUBS | |
| ADCS | |
| SBCS | |
| ANDS | |
| CCMP | |
| CCMN | |
| FCCMP | |
| FCMP | |
| DUP | |
| DUPLANE8 | |
| DUPLANE16 | |
| DUPLANE32 | |
| DUPLANE64 | |
| DUPLANE128 | |
| MOVI | |
| MOVIshift | |
| MOVIedit | |
| MOVImsl | |
| FMOV | |
| MVNIshift | |
| MVNImsl | |
| BICi | |
| ORRi | |
| BSP | |
| ZIP1 | |
| ZIP2 | |
| UZP1 | |
| UZP2 | |
| TRN1 | |
| TRN2 | |
| REV16 | |
| REV32 | |
| REV64 | |
| EXT | |
| SPLICE | |
| VSHL | |
| VLSHR | |
| VASHR | |
| SQSHL_I | |
| UQSHL_I | |
| SQSHLU_I | |
| SRSHR_I | |
| URSHR_I | |
| URSHR_I_PRED | |
| RSHRNB_I | |
| VSLI | |
| VSRI | |
| CMEQ | |
| CMGE | |
| CMGT | |
| CMHI | |
| CMHS | |
| FCMEQ | |
| FCMGE | |
| FCMGT | |
| CMEQz | |
| CMGEz | |
| CMGTz | |
| CMLEz | |
| CMLTz | |
| FCMEQz | |
| FCMGEz | |
| FCMGTz | |
| FCMLEz | |
| FCMLTz | |
| FCVTXN | |
| SADDV | |
| UADDV | |
| UADDLV | |
| SADDLV | |
| SADDWT | |
| SADDWB | |
| UADDWT | |
| UADDWB | |
| ADDP | |
| SADDLP | |
| UADDLP | |
| UDOT | |
| SDOT | |
| USDOT | |
| SMINV | |
| UMINV | |
| SMAXV | |
| UMAXV | |
| SADDV_PRED | |
| UADDV_PRED | |
| SMAXV_PRED | |
| UMAXV_PRED | |
| SMINV_PRED | |
| UMINV_PRED | |
| ORV_PRED | |
| EORV_PRED | |
| ANDV_PRED | |
| CBZ | |
| CBNZ | |
| TBZ | |
| TBNZ | |
| TC_RETURN | |
| PREFETCH | |
| SITOF | |
| UITOF | |
| NVCAST | Natural vector cast. ISD::BITCAST is not natural in the big-endian world w.r.t vectors; which causes additional REV instructions to be generated to compensate for the byte-swapping. But sometimes we do need to re-interpret the data in SIMD vector registers in big-endian mode without emitting such REV instructions. |
| MRS | |
| SMULL | |
| UMULL | |
| PMULL | |
| FRECPE | |
| FRECPS | |
| FRSQRTE | |
| FRSQRTS | |
| SUNPKHI | |
| SUNPKLO | |
| UUNPKHI | |
| UUNPKLO | |
| CLASTA_N | |
| CLASTB_N | |
| LASTA | |
| LASTB | |
| TBL | |
| FADDA_PRED | |
| FADDV_PRED | |
| FMAXV_PRED | |
| FMAXNMV_PRED | |
| FMINV_PRED | |
| FMINNMV_PRED | |
| INSR | |
| PTEST | |
| PTEST_ANY | |
| PTRUE | |
| CTTZ_ELTS | |
| BITREVERSE_MERGE_PASSTHRU | |
| BSWAP_MERGE_PASSTHRU | |
| REVH_MERGE_PASSTHRU | |
| REVW_MERGE_PASSTHRU | |
| CTLZ_MERGE_PASSTHRU | |
| CTPOP_MERGE_PASSTHRU | |
| DUP_MERGE_PASSTHRU | |
| INDEX_VECTOR | |
| REINTERPRET_CAST | |
| LS64_BUILD | |
| LS64_EXTRACT | |
| LD1_MERGE_ZERO | |
| LD1S_MERGE_ZERO | |
| LDNF1_MERGE_ZERO | |
| LDNF1S_MERGE_ZERO | |
| LDFF1_MERGE_ZERO | |
| LDFF1S_MERGE_ZERO | |
| LD1RQ_MERGE_ZERO | |
| LD1RO_MERGE_ZERO | |
| SVE_LD2_MERGE_ZERO | |
| SVE_LD3_MERGE_ZERO | |
| SVE_LD4_MERGE_ZERO | |
| GLD1_MERGE_ZERO | |
| GLD1_SCALED_MERGE_ZERO | |
| GLD1_UXTW_MERGE_ZERO | |
| GLD1_SXTW_MERGE_ZERO | |
| GLD1_UXTW_SCALED_MERGE_ZERO | |
| GLD1_SXTW_SCALED_MERGE_ZERO | |
| GLD1_IMM_MERGE_ZERO | |
| GLD1Q_MERGE_ZERO | |
| GLD1Q_INDEX_MERGE_ZERO | |
| GLD1S_MERGE_ZERO | |
| GLD1S_SCALED_MERGE_ZERO | |
| GLD1S_UXTW_MERGE_ZERO | |
| GLD1S_SXTW_MERGE_ZERO | |
| GLD1S_UXTW_SCALED_MERGE_ZERO | |
| GLD1S_SXTW_SCALED_MERGE_ZERO | |
| GLD1S_IMM_MERGE_ZERO | |
| GLDFF1_MERGE_ZERO | |
| GLDFF1_SCALED_MERGE_ZERO | |
| GLDFF1_UXTW_MERGE_ZERO | |
| GLDFF1_SXTW_MERGE_ZERO | |
| GLDFF1_UXTW_SCALED_MERGE_ZERO | |
| GLDFF1_SXTW_SCALED_MERGE_ZERO | |
| GLDFF1_IMM_MERGE_ZERO | |
| GLDFF1S_MERGE_ZERO | |
| GLDFF1S_SCALED_MERGE_ZERO | |
| GLDFF1S_UXTW_MERGE_ZERO | |
| GLDFF1S_SXTW_MERGE_ZERO | |
| GLDFF1S_UXTW_SCALED_MERGE_ZERO | |
| GLDFF1S_SXTW_SCALED_MERGE_ZERO | |
| GLDFF1S_IMM_MERGE_ZERO | |
| GLDNT1_MERGE_ZERO | |
| GLDNT1_INDEX_MERGE_ZERO | |
| GLDNT1S_MERGE_ZERO | |
| ST1_PRED | |
| SST1_PRED | |
| SST1_SCALED_PRED | |
| SST1_UXTW_PRED | |
| SST1_SXTW_PRED | |
| SST1_UXTW_SCALED_PRED | |
| SST1_SXTW_SCALED_PRED | |
| SST1_IMM_PRED | |
| SST1Q_PRED | |
| SST1Q_INDEX_PRED | |
| SSTNT1_PRED | |
| SSTNT1_INDEX_PRED | |
| RDSVL | |
| REVD_MERGE_PASSTHRU | |
| ALLOCATE_ZA_BUFFER | |
| INIT_TPIDR2OBJ | |
| ASSERT_ZEXT_BOOL | |
| MRRS | |
| MSRR | |
| STRICT_FCMP | |
| STRICT_FCMPE | |
| LD2post | |
| LD3post | |
| LD4post | |
| ST2post | |
| ST3post | |
| ST4post | |
| LD1x2post | |
| LD1x3post | |
| LD1x4post | |
| ST1x2post | |
| ST1x3post | |
| ST1x4post | |
| LD1DUPpost | |
| LD2DUPpost | |
| LD3DUPpost | |
| LD4DUPpost | |
| LD1LANEpost | |
| LD2LANEpost | |
| LD3LANEpost | |
| LD4LANEpost | |
| ST2LANEpost | |
| ST3LANEpost | |
| ST4LANEpost | |
| STG | |
| STZG | |
| ST2G | |
| STZ2G | |
| LDP | |
| LDIAPP | |
| LDNP | |
| STP | |
| STILP | |
| STNP | |
| SME_ZA_LDR | |
| SME_ZA_STR | |
Definition at line 48 of file AArch64ISelLowering.h.
1.9.6