23#define FMA3GROUP(Name, Suf, Attrs) \
24 { { X86::Name##132##Suf, X86::Name##213##Suf, X86::Name##231##Suf }, Attrs },
26#define FMA3GROUP_MASKED(Name, Suf, Attrs) \
27 FMA3GROUP(Name, Suf, Attrs) \
28 FMA3GROUP(Name, Suf##k, Attrs | X86InstrFMA3Group::KMergeMasked) \
29 FMA3GROUP(Name, Suf##kz, Attrs | X86InstrFMA3Group::KZeroMasked)
31#define FMA3GROUP_PACKED_WIDTHS_Z(Name, Suf, Attrs) \
32 FMA3GROUP_MASKED(Name, Suf##Z128m, Attrs) \
33 FMA3GROUP_MASKED(Name, Suf##Z128r, Attrs) \
34 FMA3GROUP_MASKED(Name, Suf##Z256m, Attrs) \
35 FMA3GROUP_MASKED(Name, Suf##Z256r, Attrs) \
36 FMA3GROUP_MASKED(Name, Suf##Zm, Attrs) \
37 FMA3GROUP_MASKED(Name, Suf##Zr, Attrs) \
39#define FMA3GROUP_PACKED_WIDTHS_ALL(Name, Suf, Attrs) \
40 FMA3GROUP(Name, Suf##Ym, Attrs) \
41 FMA3GROUP(Name, Suf##Yr, Attrs) \
42 FMA3GROUP_PACKED_WIDTHS_Z(Name, Suf, Attrs) \
43 FMA3GROUP(Name, Suf##m, Attrs) \
44 FMA3GROUP(Name, Suf##r, Attrs)
46#define FMA3GROUP_PACKED(Name, Attrs) \
47 FMA3GROUP_PACKED_WIDTHS_ALL(Name, PD, Attrs) \
48 FMA3GROUP_PACKED_WIDTHS_Z(Name, PH, Attrs) \
49 FMA3GROUP_PACKED_WIDTHS_ALL(Name, PS, Attrs)
51#define FMA3GROUP_SCALAR_WIDTHS_Z(Name, Suf, Attrs) \
52 FMA3GROUP(Name, Suf##Zm, Attrs) \
53 FMA3GROUP_MASKED(Name, Suf##Zm_Int, Attrs | X86InstrFMA3Group::Intrinsic) \
54 FMA3GROUP(Name, Suf##Zr, Attrs) \
55 FMA3GROUP_MASKED(Name, Suf##Zr_Int, Attrs | X86InstrFMA3Group::Intrinsic) \
57#define FMA3GROUP_SCALAR_WIDTHS_ALL(Name, Suf, Attrs) \
58 FMA3GROUP_SCALAR_WIDTHS_Z(Name, Suf, Attrs) \
59 FMA3GROUP(Name, Suf##m, Attrs) \
60 FMA3GROUP(Name, Suf##m_Int, Attrs | X86InstrFMA3Group::Intrinsic) \
61 FMA3GROUP(Name, Suf##r, Attrs) \
62 FMA3GROUP(Name, Suf##r_Int, Attrs | X86InstrFMA3Group::Intrinsic)
64#define FMA3GROUP_SCALAR(Name, Attrs) \
65 FMA3GROUP_SCALAR_WIDTHS_ALL(Name, SD, Attrs) \
66 FMA3GROUP_SCALAR_WIDTHS_Z(Name, SH, Attrs) \
67 FMA3GROUP_SCALAR_WIDTHS_ALL(Name, SS, Attrs)
69#define FMA3GROUP_FULL(Name, Attrs) \
70 FMA3GROUP_PACKED(Name, Attrs) \
71 FMA3GROUP_SCALAR(Name, Attrs)
82#define FMA3GROUP_PACKED_AVX512_WIDTHS(Name, Type, Suf, Attrs) \
83 FMA3GROUP_MASKED(Name, Type##Z128##Suf, Attrs) \
84 FMA3GROUP_MASKED(Name, Type##Z256##Suf, Attrs) \
85 FMA3GROUP_MASKED(Name, Type##Z##Suf, Attrs)
87#define FMA3GROUP_PACKED_AVX512(Name, Suf, Attrs) \
88 FMA3GROUP_PACKED_AVX512_WIDTHS(Name, PD, Suf, Attrs) \
89 FMA3GROUP_PACKED_AVX512_WIDTHS(Name, PH, Suf, Attrs) \
90 FMA3GROUP_PACKED_AVX512_WIDTHS(Name, PS, Suf, Attrs)
92#define FMA3GROUP_PACKED_AVX512_ROUND(Name, Suf, Attrs) \
93 FMA3GROUP_MASKED(Name, PDZ256##Suf, Attrs) \
94 FMA3GROUP_MASKED(Name, PDZ##Suf, Attrs) \
95 FMA3GROUP_MASKED(Name, PHZ256##Suf, Attrs) \
96 FMA3GROUP_MASKED(Name, PHZ##Suf, Attrs) \
97 FMA3GROUP_MASKED(Name, PSZ256##Suf, Attrs) \
98 FMA3GROUP_MASKED(Name, PSZ##Suf, Attrs)
100#define FMA3GROUP_SCALAR_AVX512_ROUND(Name, Suf, Attrs) \
101 FMA3GROUP(Name, SDZ##Suf, Attrs) \
102 FMA3GROUP_MASKED(Name, SDZ##Suf##_Int, Attrs) \
103 FMA3GROUP(Name, SHZ##Suf, Attrs) \
104 FMA3GROUP_MASKED(Name, SHZ##Suf##_Int, Attrs) \
105 FMA3GROUP(Name, SSZ##Suf, Attrs) \
106 FMA3GROUP_MASKED(Name, SSZ##Suf##_Int, Attrs)
132 static std::atomic<bool> TableChecked(
false);
133 if (!TableChecked.load(std::memory_order_relaxed)) {
136 TableChecked.store(
true, std::memory_order_relaxed);
148 bool IsFMA3Opcode = ((BaseOpcode >= 0x96 && BaseOpcode <= 0x9F) ||
149 (BaseOpcode >= 0xA6 && BaseOpcode <= 0xAF) ||
150 (BaseOpcode >= 0xB6 && BaseOpcode <= 0xBF));
157 if (!IsFMA3Opcode || !IsFMA3Encoding || !IsFMA3Prefix)
173 unsigned FormIndex = ((BaseOpcode - 0x90) >> 4) & 0x3;
176 return Group.
Opcodes[FormIndex] < Opcode;
178 assert(
I != Table.
end() &&
I->Opcodes[FormIndex] == Opcode &&
179 "Couldn't find FMA3 opcode!");
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
static void verifyTables()
#define FMA3GROUP_PACKED_AVX512_ROUND(Name, Suf, Attrs)
#define FMA3GROUP_PACKED_AVX512(Name, Suf, Attrs)
#define FMA3GROUP_SCALAR_AVX512_ROUND(Name, Suf, Attrs)
static const X86InstrFMA3Group RoundGroups[]
static const X86InstrFMA3Group Groups[]
#define FMA3GROUP_PACKED(Name, Attrs)
static const X86InstrFMA3Group BroadcastGroups[]
#define FMA3GROUP_FULL(Name, Attrs)
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
uint8_t getBaseOpcodeFor(uint64_t TSFlags)
@ EVEX
EVEX - Specifies that this instruction use EVEX form which provides syntax support up to 32 512-bit r...
@ VEX
VEX - encoding using 0xC4/0xC5.
@ PD
PD - Prefix code for packed double precision vector floating point operations performed in the SSE re...
@ T8
T8, TA - Prefix after the 0x0F prefix.
This is an optimization pass for GlobalISel generic memory operations.
auto partition_point(R &&Range, Predicate P)
Binary search for the first iterator in a range where a predicate is false.
const X86InstrFMA3Group * getFMA3Group(unsigned Opcode, uint64_t TSFlags)
Returns a reference to a group of FMA3 opcodes to where the given Opcode is included.
bool is_sorted(R &&Range, Compare C)
Wrapper function around std::is_sorted to check if elements in a range R are sorted with respect to a...
This class is used to group {132, 213, 231} forms of FMA opcodes together.
@ Intrinsic
This bit must be set in the 'Attributes' field of FMA group if such group of FMA opcodes consists of ...
uint16_t Opcodes[3]
An array holding 3 forms of FMA opcodes.