LCOV - code coverage report | |||||||||||||||||||||||||
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Filename | Line Coverage ( hide details ) | Functions | ||||
ARMGenFastISel.inc |
|
9.8 % | 269 / 2736 | 16.3 % | 49 / 301 | |
<unnamed> | 9.8 % | 269 / 2736 | 16.3 % | 49 / 301 | ||
ARMGenGlobalISel.inc |
|
10.7 % | 24 / 224 | 25.0 % | 2 / 8 | |
<unnamed> | 10.7 % | 24 / 224 | 25.0 % | 2 / 8 | ||
ARMGenSubtargetInfo.inc |
|
21.3 % | 350 / 1642 | 57.1 % | 4 / 7 | |
<unnamed> | 21.3 % | 350 / 1642 | 57.1 % | 4 / 7 | ||
ARMGenAsmMatcher.inc |
|
44.7 % | 1134 / 2536 | 55.0 % | 11 / 20 | |
<unnamed> | 44.7 % | 1134 / 2536 | 55.0 % | 11 / 20 | ||
ARMGenRegisterInfo.inc |
|
57.4 % | 101 / 176 | 43.1 % | 28 / 65 | |
<unnamed> | 57.4 % | 101 / 176 | 43.1 % | 28 / 65 | ||
ARMGenDisassemblerTables.inc |
|
59.2 % | 3448 / 5821 | 100.0 % | 3 / 3 | |
<unnamed> | 59.2 % | 3448 / 5821 | 100.0 % | 3 / 3 | ||
ARMGenInstrInfo.inc |
|
75.0 % | 3 / 4 | 33.3 % | 1 / 3 | |
<unnamed> | 75.0 % | 3 / 4 | 33.3 % | 1 / 3 | ||
ARMGenSystemRegister.inc |
|
84.4 % | 27 / 32 | 83.3 % | 5 / 6 | |
<unnamed> | 84.4 % | 27 / 32 | 83.3 % | 5 / 6 | ||
ARMGenCallingConv.inc |
|
84.8 % | 317 / 374 | 90.9 % | 10 / 11 | |
<unnamed> | 84.8 % | 317 / 374 | 90.9 % | 10 / 11 | ||
ARMGenMCPseudoLowering.inc |
|
90.2 % | 129 / 143 | 100.0 % | 1 / 1 | |
<unnamed> | 90.2 % | 129 / 143 | 100.0 % | 1 / 1 | ||
ARMGenDAGISel.inc |
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93.1 % | 443 / 476 | 100.0 % | 4 / 4 | |
<unnamed> | 93.1 % | 443 / 476 | 100.0 % | 4 / 4 | ||
ARMGenAsmWriter.inc |
|
96.1 % | 1528 / 1590 | 100.0 % | 4 / 4 | |
<unnamed> | 96.1 % | 1528 / 1590 | 100.0 % | 4 / 4 | ||
ARMGenMCCodeEmitter.inc |
|
98.2 % | 3489 / 3553 | 100.0 % | 1 / 1 | |
<unnamed> | 98.2 % | 3489 / 3553 | 100.0 % | 1 / 1 | ||
ARMGenRegisterBank.inc |
|
100.0 % | 3 / 3 | 100.0 % | 1 / 1 | |
<unnamed> | 100.0 % | 3 / 3 | 100.0 % | 1 / 1 |
Generated by: LCOV version 1.13 |