ARMTargetTransformInfo.cpp File Reference

#include "ARMTargetTransformInfo.h"
#include "ARMSubtarget.h"
#include "MCTargetDesc/ARMAddressingModes.h"
#include "llvm/ADT/APInt.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/Analysis/LoopInfo.h"
#include "llvm/CodeGen/CostTable.h"
#include "llvm/CodeGen/ISDOpcodes.h"
#include "llvm/CodeGen/ValueTypes.h"
#include "llvm/CodeGenTypes/MachineValueType.h"
#include "llvm/IR/BasicBlock.h"
#include "llvm/IR/DataLayout.h"
#include "llvm/IR/DerivedTypes.h"
#include "llvm/IR/Instruction.h"
#include "llvm/IR/Instructions.h"
#include "llvm/IR/IntrinsicInst.h"
#include "llvm/IR/Intrinsics.h"
#include "llvm/IR/IntrinsicsARM.h"
#include "llvm/IR/PatternMatch.h"
#include "llvm/IR/Type.h"
#include "llvm/Support/Casting.h"
#include "llvm/Support/KnownBits.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/TargetParser/SubtargetFeature.h"
#include "llvm/Transforms/InstCombine/InstCombiner.h"
#include "llvm/Transforms/Utils/Local.h"
#include "llvm/Transforms/Utils/LoopUtils.h"
#include "llvm/Transforms/Vectorize/LoopVectorizationLegality.h"
#include <algorithm>
#include <cassert>
#include <cstdint>
#include <optional>
#include <utility>

Go to the source code of this file.

Macros
#define	DEBUG_TYPE   "armtti"

Functions
static Value *	simplifyNeonVld1 (const IntrinsicInst &II, unsigned MemAlign, InstCombiner::BuilderTy &Builder)
	Convert a vector load intrinsic into a simple llvm load instruction.
static Value *	isSSATMinMaxPattern (Instruction *Inst, const APInt &Imm)
static bool	isFPSatMinMaxPattern (Instruction *Inst, const APInt &Imm)
static bool	canTailPredicateInstruction (Instruction &I, int &ICmpCount)
static bool	canTailPredicateLoop (Loop *L, LoopInfo *LI, ScalarEvolution &SE, const DataLayout &DL, const LoopAccessInfo *LAI)

Variables
static cl::opt< bool >	EnableMaskedLoadStores ("enable-arm-maskedldst", cl::Hidden, cl::init(true), cl::desc("Enable the generation of masked loads and stores"))
static cl::opt< bool >	DisableLowOverheadLoops ("disable-arm-loloops", cl::Hidden, cl::init(false), cl::desc("Disable the generation of low-overhead loops"))
static cl::opt< bool >	AllowWLSLoops ("allow-arm-wlsloops", cl::Hidden, cl::init(true), cl::desc("Enable the generation of WLS loops"))
cl::opt< TailPredication::Mode >	EnableTailPredication
cl::opt< bool >	EnableMaskedGatherScatters
cl::opt< unsigned >	MVEMaxSupportedInterleaveFactor

Macro Definition Documentation

DEBUG_TYPE

#define DEBUG_TYPE   "armtti"

Definition at line 45 of file ARMTargetTransformInfo.cpp.

Function Documentation

canTailPredicateInstruction()

static bool canTailPredicateInstruction ( Instruction &  I, int &  ICmpCount  )

static

Definition at line 2233 of file ARMTargetTransformInfo.cpp.

References llvm::IntrinsicInst::getIntrinsicID(), and I.

Referenced by canTailPredicateLoop().

canTailPredicateLoop()

static bool canTailPredicateLoop ( Loop *  L, LoopInfo *  LI, ScalarEvolution &  SE, const DataLayout &  DL, const LoopAccessInfo *  LAI  )

static

Definition at line 2284 of file ARMTargetTransformInfo.cpp.

References canTailPredicateInstruction(), llvm::dbgs(), llvm::TailPredication::EnabledNoReductions, EnableMaskedGatherScatters, EnableTailPredication, llvm::findDefsUsedOutsideOfLoop(), llvm::TailPredication::ForceEnabledNoReductions, llvm::getLoadStorePointerOperand(), llvm::getLoadStoreType(), llvm::LoopAccessInfo::getPSE(), llvm::getPtrStride(), llvm::ScalarEvolution::getSCEV(), llvm::PredicatedScalarEvolution::getSE(), I, llvm::ScalarEvolution::isLoopInvariant(), LLVM_DEBUG, MVEMaxSupportedInterleaveFactor, and Ptr.

Referenced by llvm::ARMTTIImpl::preferPredicateOverEpilogue().

isFPSatMinMaxPattern()

static bool isFPSatMinMaxPattern ( Instruction *  Inst, const APInt &  Imm  )

static

Definition at line 377 of file ARMTargetTransformInfo.cpp.

References FP, llvm::APInt::getHighBitsSet(), llvm::Value::hasOneUse(), isSSATMinMaxPattern(), and llvm::Value::user_begin().

Referenced by llvm::ARMTTIImpl::getIntImmCostInst().

isSSATMinMaxPattern()

static Value * isSSATMinMaxPattern ( Instruction *  Inst, const APInt &  Imm  )

static

Definition at line 343 of file ARMTargetTransformInfo.cpp.

References llvm::CallingConv::C, llvm::SelectPatternResult::Flavor, llvm::User::getOperand(), llvm::ConstantInt::getValue(), llvm::Value::hasNUses(), LHS, llvm::PatternMatch::m_ConstantInt(), llvm::PatternMatch::match(), llvm::matchSelectPattern(), RHS, llvm::SPF_SMAX, llvm::SPF_SMIN, and llvm::Value::user_begin().

Referenced by llvm::ARMTTIImpl::getIntImmCostInst(), and isFPSatMinMaxPattern().

simplifyNeonVld1()

static Value * simplifyNeonVld1 ( const IntrinsicInst &  II, unsigned  MemAlign, InstCombiner::BuilderTy &  Builder  )

static

Convert a vector load intrinsic into a simple llvm load instruction.

This is beneficial when the underlying object being addressed comes from a constant, since we get constant-folding for free.

Definition at line 68 of file ARMTargetTransformInfo.cpp.

References llvm::IRBuilderBase::CreateAlignedLoad(), llvm::IRBuilderBase::CreateBitCast(), llvm::CallBase::getArgOperand(), llvm::Value::getType(), and llvm::isPowerOf2_32().

Referenced by llvm::ARMTTIImpl::instCombineIntrinsic().

Variable Documentation

AllowWLSLoops

cl::opt< bool > AllowWLSLoops("allow-arm-wlsloops", cl::Hidden, cl::init(true), cl::desc("Enable the generation of WLS loops")) ( "allow-arm-wlsloops"  , cl::Hidden  , cl::init(true)  , cl::desc("Enable the generation of WLS loops")    )

static

Referenced by llvm::ARMTTIImpl::isHardwareLoopProfitable().

DisableLowOverheadLoops

cl::opt< bool > DisableLowOverheadLoops("disable-arm-loloops", cl::Hidden, cl::init(false), cl::desc("Disable the generation of low-overhead loops")) ( "disable-arm-loloops"  , cl::Hidden  , cl::init(false)  , cl::desc("Disable the generation of low-overhead loops")    )

static

Referenced by llvm::ARMTTIImpl::isHardwareLoopProfitable().

EnableMaskedGatherScatters

cl::opt<bool> EnableMaskedGatherScatters

extern

Referenced by canTailPredicateLoop(), llvm::ARMTTIImpl::getGatherScatterOpCost(), and llvm::ARMTTIImpl::isLegalMaskedGather().

EnableMaskedLoadStores

cl::opt< bool > EnableMaskedLoadStores("enable-arm-maskedldst", cl::Hidden, cl::init(true), cl::desc("Enable the generation of masked loads and stores")) ( "enable-arm-maskedldst"  , cl::Hidden  , cl::init(true)  , cl::desc("Enable the generation of masked loads and stores")    )

static

Referenced by llvm::ARMTTIImpl::isLegalMaskedLoad().

EnableTailPredication

cl::opt<TailPredication::Mode> EnableTailPredication

extern

Referenced by canTailPredicateLoop(), llvm::ARMTTIImpl::getPreferredTailFoldingStyle(), and llvm::ARMTTIImpl::preferPredicateOverEpilogue().

MVEMaxSupportedInterleaveFactor

cl::opt<unsigned> MVEMaxSupportedInterleaveFactor

extern