LLVM  6.0.0svn
LiveDebugValues.cpp
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1 //===- LiveDebugValues.cpp - Tracking Debug Value MIs ---------------------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 ///
10 /// This pass implements a data flow analysis that propagates debug location
11 /// information by inserting additional DBG_VALUE instructions into the machine
12 /// instruction stream. The pass internally builds debug location liveness
13 /// ranges to determine the points where additional DBG_VALUEs need to be
14 /// inserted.
15 ///
16 /// This is a separate pass from DbgValueHistoryCalculator to facilitate
17 /// testing and improve modularity.
18 ///
19 //===----------------------------------------------------------------------===//
20 
21 #include "llvm/ADT/DenseMap.h"
23 #include "llvm/ADT/SmallPtrSet.h"
24 #include "llvm/ADT/SmallVector.h"
26 #include "llvm/ADT/Statistic.h"
27 #include "llvm/ADT/UniqueVector.h"
45 #include "llvm/IR/DebugLoc.h"
46 #include "llvm/IR/Function.h"
47 #include "llvm/IR/Module.h"
48 #include "llvm/MC/MCRegisterInfo.h"
49 #include "llvm/Pass.h"
50 #include "llvm/Support/Casting.h"
51 #include "llvm/Support/Compiler.h"
52 #include "llvm/Support/Debug.h"
54 #include <algorithm>
55 #include <cassert>
56 #include <cstdint>
57 #include <functional>
58 #include <queue>
59 #include <utility>
60 #include <vector>
61 
62 using namespace llvm;
63 
64 #define DEBUG_TYPE "livedebugvalues"
65 
66 STATISTIC(NumInserted, "Number of DBG_VALUE instructions inserted");
67 
68 // \brief If @MI is a DBG_VALUE with debug value described by a defined
69 // register, returns the number of this register. In the other case, returns 0.
70 static unsigned isDbgValueDescribedByReg(const MachineInstr &MI) {
71  assert(MI.isDebugValue() && "expected a DBG_VALUE");
72  assert(MI.getNumOperands() == 4 && "malformed DBG_VALUE");
73  // If location of variable is described using a register (directly
74  // or indirectly), this register is always a first operand.
75  return MI.getOperand(0).isReg() ? MI.getOperand(0).getReg() : 0;
76 }
77 
78 namespace {
79 
80 class LiveDebugValues : public MachineFunctionPass {
81 private:
82  const TargetRegisterInfo *TRI;
83  const TargetInstrInfo *TII;
84  const TargetFrameLowering *TFI;
86 
87  /// Keeps track of lexical scopes associated with a user value's source
88  /// location.
89  class UserValueScopes {
90  DebugLoc DL;
93 
94  public:
95  UserValueScopes(DebugLoc D, LexicalScopes &L) : DL(std::move(D)), LS(L) {}
96 
97  /// Return true if current scope dominates at least one machine
98  /// instruction in a given machine basic block.
99  bool dominates(MachineBasicBlock *MBB) {
100  if (LBlocks.empty())
101  LS.getMachineBasicBlocks(DL, LBlocks);
102  return LBlocks.count(MBB) != 0 || LS.dominates(DL, MBB);
103  }
104  };
105 
106  /// Based on std::pair so it can be used as an index into a DenseMap.
107  using DebugVariableBase =
108  std::pair<const DILocalVariable *, const DILocation *>;
109  /// A potentially inlined instance of a variable.
110  struct DebugVariable : public DebugVariableBase {
111  DebugVariable(const DILocalVariable *Var, const DILocation *InlinedAt)
112  : DebugVariableBase(Var, InlinedAt) {}
113 
114  const DILocalVariable *getVar() const { return this->first; }
115  const DILocation *getInlinedAt() const { return this->second; }
116 
117  bool operator<(const DebugVariable &DV) const {
118  if (getVar() == DV.getVar())
119  return getInlinedAt() < DV.getInlinedAt();
120  return getVar() < DV.getVar();
121  }
122  };
123 
124  /// A pair of debug variable and value location.
125  struct VarLoc {
126  const DebugVariable Var;
127  const MachineInstr &MI; ///< Only used for cloning a new DBG_VALUE.
128  mutable UserValueScopes UVS;
129  enum { InvalidKind = 0, RegisterKind } Kind = InvalidKind;
130 
131  /// The value location. Stored separately to avoid repeatedly
132  /// extracting it from MI.
133  union {
134  uint64_t RegNo;
135  uint64_t Hash;
136  } Loc;
137 
138  VarLoc(const MachineInstr &MI, LexicalScopes &LS)
139  : Var(MI.getDebugVariable(), MI.getDebugLoc()->getInlinedAt()), MI(MI),
140  UVS(MI.getDebugLoc(), LS) {
141  static_assert((sizeof(Loc) == sizeof(uint64_t)),
142  "hash does not cover all members of Loc");
143  assert(MI.isDebugValue() && "not a DBG_VALUE");
144  assert(MI.getNumOperands() == 4 && "malformed DBG_VALUE");
145  if (int RegNo = isDbgValueDescribedByReg(MI)) {
146  Kind = RegisterKind;
147  Loc.RegNo = RegNo;
148  }
149  }
150 
151  /// If this variable is described by a register, return it,
152  /// otherwise return 0.
153  unsigned isDescribedByReg() const {
154  if (Kind == RegisterKind)
155  return Loc.RegNo;
156  return 0;
157  }
158 
159  /// Determine whether the lexical scope of this value's debug location
160  /// dominates MBB.
161  bool dominates(MachineBasicBlock &MBB) const { return UVS.dominates(&MBB); }
162 
163 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
164  LLVM_DUMP_METHOD void dump() const { MI.dump(); }
165 #endif
166 
167  bool operator==(const VarLoc &Other) const {
168  return Var == Other.Var && Loc.Hash == Other.Loc.Hash;
169  }
170 
171  /// This operator guarantees that VarLocs are sorted by Variable first.
172  bool operator<(const VarLoc &Other) const {
173  if (Var == Other.Var)
174  return Loc.Hash < Other.Loc.Hash;
175  return Var < Other.Var;
176  }
177  };
178 
179  using VarLocMap = UniqueVector<VarLoc>;
180  using VarLocSet = SparseBitVector<>;
182  struct SpillDebugPair {
183  MachineInstr *SpillInst;
184  MachineInstr *DebugInst;
185  };
186  using SpillMap = SmallVector<SpillDebugPair, 4>;
187 
188  /// This holds the working set of currently open ranges. For fast
189  /// access, this is done both as a set of VarLocIDs, and a map of
190  /// DebugVariable to recent VarLocID. Note that a DBG_VALUE ends all
191  /// previous open ranges for the same variable.
192  class OpenRangesSet {
193  VarLocSet VarLocs;
195 
196  public:
197  const VarLocSet &getVarLocs() const { return VarLocs; }
198 
199  /// Terminate all open ranges for Var by removing it from the set.
200  void erase(DebugVariable Var) {
201  auto It = Vars.find(Var);
202  if (It != Vars.end()) {
203  unsigned ID = It->second;
204  VarLocs.reset(ID);
205  Vars.erase(It);
206  }
207  }
208 
209  /// Terminate all open ranges listed in \c KillSet by removing
210  /// them from the set.
211  void erase(const VarLocSet &KillSet, const VarLocMap &VarLocIDs) {
212  VarLocs.intersectWithComplement(KillSet);
213  for (unsigned ID : KillSet)
214  Vars.erase(VarLocIDs[ID].Var);
215  }
216 
217  /// Insert a new range into the set.
218  void insert(unsigned VarLocID, DebugVariableBase Var) {
219  VarLocs.set(VarLocID);
220  Vars.insert({Var, VarLocID});
221  }
222 
223  /// Empty the set.
224  void clear() {
225  VarLocs.clear();
226  Vars.clear();
227  }
228 
229  /// Return whether the set is empty or not.
230  bool empty() const {
231  assert(Vars.empty() == VarLocs.empty() && "open ranges are inconsistent");
232  return VarLocs.empty();
233  }
234  };
235 
236  bool isSpillInstruction(const MachineInstr &MI, MachineFunction *MF,
237  unsigned &Reg);
238  int extractSpillBaseRegAndOffset(const MachineInstr &MI, unsigned &Reg);
239 
240  void transferDebugValue(const MachineInstr &MI, OpenRangesSet &OpenRanges,
241  VarLocMap &VarLocIDs);
242  void transferSpillInst(MachineInstr &MI, OpenRangesSet &OpenRanges,
243  VarLocMap &VarLocIDs, SpillMap &Spills);
244  void transferRegisterDef(MachineInstr &MI, OpenRangesSet &OpenRanges,
245  const VarLocMap &VarLocIDs);
246  bool transferTerminatorInst(MachineInstr &MI, OpenRangesSet &OpenRanges,
247  VarLocInMBB &OutLocs, const VarLocMap &VarLocIDs);
248  bool transfer(MachineInstr &MI, OpenRangesSet &OpenRanges,
249  VarLocInMBB &OutLocs, VarLocMap &VarLocIDs, SpillMap &Spills,
250  bool transferSpills);
251 
252  bool join(MachineBasicBlock &MBB, VarLocInMBB &OutLocs, VarLocInMBB &InLocs,
253  const VarLocMap &VarLocIDs,
255 
256  bool ExtendRanges(MachineFunction &MF);
257 
258 public:
259  static char ID;
260 
261  /// Default construct and initialize the pass.
262  LiveDebugValues();
263 
264  /// Tell the pass manager which passes we depend on and what
265  /// information we preserve.
266  void getAnalysisUsage(AnalysisUsage &AU) const override;
267 
268  MachineFunctionProperties getRequiredProperties() const override {
271  }
272 
273  /// Print to ostream with a message.
274  void printVarLocInMBB(const MachineFunction &MF, const VarLocInMBB &V,
275  const VarLocMap &VarLocIDs, const char *msg,
276  raw_ostream &Out) const;
277 
278  /// Calculate the liveness information for the given machine function.
279  bool runOnMachineFunction(MachineFunction &MF) override;
280 };
281 
282 } // end anonymous namespace
283 
284 //===----------------------------------------------------------------------===//
285 // Implementation
286 //===----------------------------------------------------------------------===//
287 
288 char LiveDebugValues::ID = 0;
289 
291 
292 INITIALIZE_PASS(LiveDebugValues, DEBUG_TYPE, "Live DEBUG_VALUE analysis",
293  false, false)
294 
295 /// Default construct and initialize the pass.
296 LiveDebugValues::LiveDebugValues() : MachineFunctionPass(ID) {
298 }
299 
300 /// Tell the pass manager which passes we depend on and what information we
301 /// preserve.
302 void LiveDebugValues::getAnalysisUsage(AnalysisUsage &AU) const {
303  AU.setPreservesCFG();
305 }
306 
307 //===----------------------------------------------------------------------===//
308 // Debug Range Extension Implementation
309 //===----------------------------------------------------------------------===//
310 
311 #ifndef NDEBUG
312 void LiveDebugValues::printVarLocInMBB(const MachineFunction &MF,
313  const VarLocInMBB &V,
314  const VarLocMap &VarLocIDs,
315  const char *msg,
316  raw_ostream &Out) const {
317  Out << '\n' << msg << '\n';
318  for (const MachineBasicBlock &BB : MF) {
319  const auto &L = V.lookup(&BB);
320  Out << "MBB: " << BB.getName() << ":\n";
321  for (unsigned VLL : L) {
322  const VarLoc &VL = VarLocIDs[VLL];
323  Out << " Var: " << VL.Var.getVar()->getName();
324  Out << " MI: ";
325  VL.dump();
326  }
327  }
328  Out << "\n";
329 }
330 #endif
331 
332 /// Given a spill instruction, extract the register and offset used to
333 /// address the spill location in a target independent way.
334 int LiveDebugValues::extractSpillBaseRegAndOffset(const MachineInstr &MI,
335  unsigned &Reg) {
336  assert(MI.hasOneMemOperand() &&
337  "Spill instruction does not have exactly one memory operand?");
338  auto MMOI = MI.memoperands_begin();
339  const PseudoSourceValue *PVal = (*MMOI)->getPseudoValue();
341  "Inconsistent memory operand in spill instruction");
342  int FI = cast<FixedStackPseudoSourceValue>(PVal)->getFrameIndex();
343  const MachineBasicBlock *MBB = MI.getParent();
344  return TFI->getFrameIndexReference(*MBB->getParent(), FI, Reg);
345 }
346 
347 /// End all previous ranges related to @MI and start a new range from @MI
348 /// if it is a DBG_VALUE instr.
349 void LiveDebugValues::transferDebugValue(const MachineInstr &MI,
350  OpenRangesSet &OpenRanges,
351  VarLocMap &VarLocIDs) {
352  if (!MI.isDebugValue())
353  return;
354  const DILocalVariable *Var = MI.getDebugVariable();
355  const DILocation *DebugLoc = MI.getDebugLoc();
356  const DILocation *InlinedAt = DebugLoc->getInlinedAt();
357  assert(Var->isValidLocationForIntrinsic(DebugLoc) &&
358  "Expected inlined-at fields to agree");
359 
360  // End all previous ranges of Var.
361  DebugVariable V(Var, InlinedAt);
362  OpenRanges.erase(V);
363 
364  // Add the VarLoc to OpenRanges from this DBG_VALUE.
365  // TODO: Currently handles DBG_VALUE which has only reg as location.
366  if (isDbgValueDescribedByReg(MI)) {
367  VarLoc VL(MI, LS);
368  unsigned ID = VarLocIDs.insert(VL);
369  OpenRanges.insert(ID, VL.Var);
370  }
371 }
372 
373 /// A definition of a register may mark the end of a range.
374 void LiveDebugValues::transferRegisterDef(MachineInstr &MI,
375  OpenRangesSet &OpenRanges,
376  const VarLocMap &VarLocIDs) {
377  MachineFunction *MF = MI.getMF();
378  const TargetLowering *TLI = MF->getSubtarget().getTargetLowering();
379  unsigned SP = TLI->getStackPointerRegisterToSaveRestore();
380  SparseBitVector<> KillSet;
381  for (const MachineOperand &MO : MI.operands()) {
382  // Determine whether the operand is a register def. Assume that call
383  // instructions never clobber SP, because some backends (e.g., AArch64)
384  // never list SP in the regmask.
385  if (MO.isReg() && MO.isDef() && MO.getReg() &&
386  TRI->isPhysicalRegister(MO.getReg()) &&
387  !(MI.isCall() && MO.getReg() == SP)) {
388  // Remove ranges of all aliased registers.
389  for (MCRegAliasIterator RAI(MO.getReg(), TRI, true); RAI.isValid(); ++RAI)
390  for (unsigned ID : OpenRanges.getVarLocs())
391  if (VarLocIDs[ID].isDescribedByReg() == *RAI)
392  KillSet.set(ID);
393  } else if (MO.isRegMask()) {
394  // Remove ranges of all clobbered registers. Register masks don't usually
395  // list SP as preserved. While the debug info may be off for an
396  // instruction or two around callee-cleanup calls, transferring the
397  // DEBUG_VALUE across the call is still a better user experience.
398  for (unsigned ID : OpenRanges.getVarLocs()) {
399  unsigned Reg = VarLocIDs[ID].isDescribedByReg();
400  if (Reg && Reg != SP && MO.clobbersPhysReg(Reg))
401  KillSet.set(ID);
402  }
403  }
404  }
405  OpenRanges.erase(KillSet, VarLocIDs);
406 }
407 
408 /// Decide if @MI is a spill instruction and return true if it is. We use 2
409 /// criteria to make this decision:
410 /// - Is this instruction a store to a spill slot?
411 /// - Is there a register operand that is both used and killed?
412 /// TODO: Store optimization can fold spills into other stores (including
413 /// other spills). We do not handle this yet (more than one memory operand).
414 bool LiveDebugValues::isSpillInstruction(const MachineInstr &MI,
415  MachineFunction *MF, unsigned &Reg) {
416  const MachineFrameInfo &FrameInfo = MF->getFrameInfo();
417  int FI;
418  const MachineMemOperand *MMO;
419 
420  // TODO: Handle multiple stores folded into one.
421  if (!MI.hasOneMemOperand())
422  return false;
423 
424  // To identify a spill instruction, use the same criteria as in AsmPrinter.
425  if (!((TII->isStoreToStackSlotPostFE(MI, FI) ||
426  TII->hasStoreToStackSlot(MI, MMO, FI)) &&
427  FrameInfo.isSpillSlotObjectIndex(FI)))
428  return false;
429 
430  // In a spill instruction generated by the InlineSpiller the spilled register
431  // has its kill flag set. Return false if we don't find such a register.
432  Reg = 0;
433  for (const MachineOperand &MO : MI.operands()) {
434  if (MO.isReg() && MO.isUse() && MO.isKill()) {
435  Reg = MO.getReg();
436  break;
437  }
438  }
439  return Reg != 0;
440 }
441 
442 /// A spilled register may indicate that we have to end the current range of
443 /// a variable and create a new one for the spill location.
444 /// We don't want to insert any instructions in transfer(), so we just create
445 /// the DBG_VALUE witout inserting it and keep track of it in @Spills.
446 /// It will be inserted into the BB when we're done iterating over the
447 /// instructions.
448 void LiveDebugValues::transferSpillInst(MachineInstr &MI,
449  OpenRangesSet &OpenRanges,
450  VarLocMap &VarLocIDs,
451  SpillMap &Spills) {
452  unsigned Reg;
453  MachineFunction *MF = MI.getMF();
454  if (!isSpillInstruction(MI, MF, Reg))
455  return;
456 
457  // Check if the register is the location of a debug value.
458  for (unsigned ID : OpenRanges.getVarLocs()) {
459  if (VarLocIDs[ID].isDescribedByReg() == Reg) {
460  DEBUG(dbgs() << "Spilling Register " << PrintReg(Reg, TRI) << '('
461  << VarLocIDs[ID].Var.getVar()->getName() << ")\n");
462 
463  // Create a DBG_VALUE instruction to describe the Var in its spilled
464  // location, but don't insert it yet to avoid invalidating the
465  // iterator in our caller.
466  unsigned SpillBase;
467  int SpillOffset = extractSpillBaseRegAndOffset(MI, SpillBase);
468  const MachineInstr *DMI = &VarLocIDs[ID].MI;
469  auto *SpillExpr = DIExpression::prepend(
470  DMI->getDebugExpression(), DIExpression::NoDeref, SpillOffset);
471  MachineInstr *SpDMI =
472  BuildMI(*MF, DMI->getDebugLoc(), DMI->getDesc(), true, SpillBase,
473  DMI->getDebugVariable(), SpillExpr);
474  DEBUG(dbgs() << "Creating DBG_VALUE inst for spill: ";
475  SpDMI->print(dbgs(), false, TII));
476 
477  // The newly created DBG_VALUE instruction SpDMI must be inserted after
478  // MI. Keep track of the pairing.
479  SpillDebugPair MIP = {&MI, SpDMI};
480  Spills.push_back(MIP);
481 
482  // End all previous ranges of Var.
483  OpenRanges.erase(VarLocIDs[ID].Var);
484 
485  // Add the VarLoc to OpenRanges.
486  VarLoc VL(*SpDMI, LS);
487  unsigned SpillLocID = VarLocIDs.insert(VL);
488  OpenRanges.insert(SpillLocID, VL.Var);
489  return;
490  }
491  }
492 }
493 
494 /// Terminate all open ranges at the end of the current basic block.
495 bool LiveDebugValues::transferTerminatorInst(MachineInstr &MI,
496  OpenRangesSet &OpenRanges,
497  VarLocInMBB &OutLocs,
498  const VarLocMap &VarLocIDs) {
499  bool Changed = false;
500  const MachineBasicBlock *CurMBB = MI.getParent();
501  if (!(MI.isTerminator() || (&MI == &CurMBB->instr_back())))
502  return false;
503 
504  if (OpenRanges.empty())
505  return false;
506 
507  DEBUG(for (unsigned ID : OpenRanges.getVarLocs()) {
508  // Copy OpenRanges to OutLocs, if not already present.
509  dbgs() << "Add to OutLocs: "; VarLocIDs[ID].dump();
510  });
511  VarLocSet &VLS = OutLocs[CurMBB];
512  Changed = VLS |= OpenRanges.getVarLocs();
513  OpenRanges.clear();
514  return Changed;
515 }
516 
517 /// This routine creates OpenRanges and OutLocs.
518 bool LiveDebugValues::transfer(MachineInstr &MI, OpenRangesSet &OpenRanges,
519  VarLocInMBB &OutLocs, VarLocMap &VarLocIDs,
520  SpillMap &Spills, bool transferSpills) {
521  bool Changed = false;
522  transferDebugValue(MI, OpenRanges, VarLocIDs);
523  transferRegisterDef(MI, OpenRanges, VarLocIDs);
524  if (transferSpills)
525  transferSpillInst(MI, OpenRanges, VarLocIDs, Spills);
526  Changed = transferTerminatorInst(MI, OpenRanges, OutLocs, VarLocIDs);
527  return Changed;
528 }
529 
530 /// This routine joins the analysis results of all incoming edges in @MBB by
531 /// inserting a new DBG_VALUE instruction at the start of the @MBB - if the same
532 /// source variable in all the predecessors of @MBB reside in the same location.
533 bool LiveDebugValues::join(MachineBasicBlock &MBB, VarLocInMBB &OutLocs,
534  VarLocInMBB &InLocs, const VarLocMap &VarLocIDs,
536  DEBUG(dbgs() << "join MBB: " << MBB.getName() << "\n");
537  bool Changed = false;
538 
539  VarLocSet InLocsT; // Temporary incoming locations.
540 
541  // For all predecessors of this MBB, find the set of VarLocs that
542  // can be joined.
543  int NumVisited = 0;
544  for (auto p : MBB.predecessors()) {
545  // Ignore unvisited predecessor blocks. As we are processing
546  // the blocks in reverse post-order any unvisited block can
547  // be considered to not remove any incoming values.
548  if (!Visited.count(p))
549  continue;
550  auto OL = OutLocs.find(p);
551  // Join is null in case of empty OutLocs from any of the pred.
552  if (OL == OutLocs.end())
553  return false;
554 
555  // Just copy over the Out locs to incoming locs for the first visited
556  // predecessor, and for all other predecessors join the Out locs.
557  if (!NumVisited)
558  InLocsT = OL->second;
559  else
560  InLocsT &= OL->second;
561  NumVisited++;
562  }
563 
564  // Filter out DBG_VALUES that are out of scope.
565  VarLocSet KillSet;
566  for (auto ID : InLocsT)
567  if (!VarLocIDs[ID].dominates(MBB))
568  KillSet.set(ID);
569  InLocsT.intersectWithComplement(KillSet);
570 
571  // As we are processing blocks in reverse post-order we
572  // should have processed at least one predecessor, unless it
573  // is the entry block which has no predecessor.
574  assert((NumVisited || MBB.pred_empty()) &&
575  "Should have processed at least one predecessor");
576  if (InLocsT.empty())
577  return false;
578 
579  VarLocSet &ILS = InLocs[&MBB];
580 
581  // Insert DBG_VALUE instructions, if not already inserted.
582  VarLocSet Diff = InLocsT;
583  Diff.intersectWithComplement(ILS);
584  for (auto ID : Diff) {
585  // This VarLoc is not found in InLocs i.e. it is not yet inserted. So, a
586  // new range is started for the var from the mbb's beginning by inserting
587  // a new DBG_VALUE. transfer() will end this range however appropriate.
588  const VarLoc &DiffIt = VarLocIDs[ID];
589  const MachineInstr *DMI = &DiffIt.MI;
590  MachineInstr *MI =
591  BuildMI(MBB, MBB.instr_begin(), DMI->getDebugLoc(), DMI->getDesc(),
592  DMI->isIndirectDebugValue(), DMI->getOperand(0).getReg(),
593  DMI->getDebugVariable(), DMI->getDebugExpression());
594  if (DMI->isIndirectDebugValue())
595  MI->getOperand(1).setImm(DMI->getOperand(1).getImm());
596  DEBUG(dbgs() << "Inserted: "; MI->dump(););
597  ILS.set(ID);
598  ++NumInserted;
599  Changed = true;
600  }
601  return Changed;
602 }
603 
604 /// Calculate the liveness information for the given machine function and
605 /// extend ranges across basic blocks.
606 bool LiveDebugValues::ExtendRanges(MachineFunction &MF) {
607  DEBUG(dbgs() << "\nDebug Range Extension\n");
608 
609  bool Changed = false;
610  bool OLChanged = false;
611  bool MBBJoined = false;
612 
613  VarLocMap VarLocIDs; // Map VarLoc<>unique ID for use in bitvectors.
614  OpenRangesSet OpenRanges; // Ranges that are open until end of bb.
615  VarLocInMBB OutLocs; // Ranges that exist beyond bb.
616  VarLocInMBB InLocs; // Ranges that are incoming after joining.
617  SpillMap Spills; // DBG_VALUEs associated with spills.
618 
621  std::priority_queue<unsigned int, std::vector<unsigned int>,
622  std::greater<unsigned int>>
623  Worklist;
624  std::priority_queue<unsigned int, std::vector<unsigned int>,
625  std::greater<unsigned int>>
626  Pending;
627 
628  // Initialize every mbb with OutLocs.
629  // We are not looking at any spill instructions during the initial pass
630  // over the BBs. The LiveDebugVariables pass has already created DBG_VALUE
631  // instructions for spills of registers that are known to be user variables
632  // within the BB in which the spill occurs.
633  for (auto &MBB : MF)
634  for (auto &MI : MBB)
635  transfer(MI, OpenRanges, OutLocs, VarLocIDs, Spills,
636  /*transferSpills=*/false);
637 
638  DEBUG(printVarLocInMBB(MF, OutLocs, VarLocIDs, "OutLocs after initialization",
639  dbgs()));
640 
642  unsigned int RPONumber = 0;
643  for (auto RI = RPOT.begin(), RE = RPOT.end(); RI != RE; ++RI) {
644  OrderToBB[RPONumber] = *RI;
645  BBToOrder[*RI] = RPONumber;
646  Worklist.push(RPONumber);
647  ++RPONumber;
648  }
649  // This is a standard "union of predecessor outs" dataflow problem.
650  // To solve it, we perform join() and transfer() using the two worklist method
651  // until the ranges converge.
652  // Ranges have converged when both worklists are empty.
654  while (!Worklist.empty() || !Pending.empty()) {
655  // We track what is on the pending worklist to avoid inserting the same
656  // thing twice. We could avoid this with a custom priority queue, but this
657  // is probably not worth it.
659  DEBUG(dbgs() << "Processing Worklist\n");
660  while (!Worklist.empty()) {
661  MachineBasicBlock *MBB = OrderToBB[Worklist.top()];
662  Worklist.pop();
663  MBBJoined = join(*MBB, OutLocs, InLocs, VarLocIDs, Visited);
664  Visited.insert(MBB);
665  if (MBBJoined) {
666  MBBJoined = false;
667  Changed = true;
668  // Now that we have started to extend ranges across BBs we need to
669  // examine spill instructions to see whether they spill registers that
670  // correspond to user variables.
671  for (auto &MI : *MBB)
672  OLChanged |= transfer(MI, OpenRanges, OutLocs, VarLocIDs, Spills,
673  /*transferSpills=*/true);
674 
675  // Add any DBG_VALUE instructions necessitated by spills.
676  for (auto &SP : Spills)
677  MBB->insertAfter(MachineBasicBlock::iterator(*SP.SpillInst),
678  SP.DebugInst);
679  Spills.clear();
680 
681  DEBUG(printVarLocInMBB(MF, OutLocs, VarLocIDs,
682  "OutLocs after propagating", dbgs()));
683  DEBUG(printVarLocInMBB(MF, InLocs, VarLocIDs,
684  "InLocs after propagating", dbgs()));
685 
686  if (OLChanged) {
687  OLChanged = false;
688  for (auto s : MBB->successors())
689  if (OnPending.insert(s).second) {
690  Pending.push(BBToOrder[s]);
691  }
692  }
693  }
694  }
695  Worklist.swap(Pending);
696  // At this point, pending must be empty, since it was just the empty
697  // worklist
698  assert(Pending.empty() && "Pending should be empty");
699  }
700 
701  DEBUG(printVarLocInMBB(MF, OutLocs, VarLocIDs, "Final OutLocs", dbgs()));
702  DEBUG(printVarLocInMBB(MF, InLocs, VarLocIDs, "Final InLocs", dbgs()));
703  return Changed;
704 }
705 
706 bool LiveDebugValues::runOnMachineFunction(MachineFunction &MF) {
707  if (!MF.getFunction()->getSubprogram())
708  // LiveDebugValues will already have removed all DBG_VALUEs.
709  return false;
710 
711  // Skip functions from NoDebug compilation units.
712  if (MF.getFunction()->getSubprogram()->getUnit()->getEmissionKind() ==
714  return false;
715 
716  TRI = MF.getSubtarget().getRegisterInfo();
717  TII = MF.getSubtarget().getInstrInfo();
718  TFI = MF.getSubtarget().getFrameLowering();
719  LS.initialize(MF);
720 
721  bool Changed = ExtendRanges(MF);
722  return Changed;
723 }
static PassRegistry * getPassRegistry()
getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...
instr_iterator instr_begin()
bool isCall(QueryType Type=AnyInBundle) const
Definition: MachineInstr.h:458
const MachineFunction * getMF() const
Return the function that contains the basic block that this instruction belongs to.
Compute iterated dominance frontiers using a linear time algorithm.
Definition: AllocatorList.h:24
#define LLVM_DUMP_METHOD
Mark debug helper function definitions like dump() that should not be stripped from debug builds...
Definition: Compiler.h:449
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
void set(unsigned Idx)
bool dominates(const DILocation *DL, MachineBasicBlock *MBB)
dominates - Return true if DebugLoc&#39;s lexical scope dominates at least one machine instruction&#39;s lexi...
const DebugLoc & getDebugLoc() const
Returns the debug location id of this MachineInstr.
Definition: MachineInstr.h:268
unsigned getReg() const
getReg - Returns the register number.
MachineInstr & instr_back()
virtual const TargetLowering * getTargetLowering() const
unsigned second
STATISTIC(NumFunctions, "Total number of functions")
A debug info location.
Definition: DebugLoc.h:34
iterator_range< mop_iterator > operands()
Definition: MachineInstr.h:332
A description of a memory reference used in the backend.
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
const HexagonInstrInfo * TII
RegisterKind
unsigned getNumOperands() const
Access to explicit operands of the instruction.
Definition: MachineInstr.h:293
Reg
All possible values of the reg field in the ModR/M byte.
bool isTerminator(QueryType Type=AnyInBundle) const
Returns true if this instruction part of the terminator for a basic block.
Definition: MachineInstr.h:474
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted...
std::string join(IteratorT Begin, IteratorT End, StringRef Separator)
Joins the strings in the range [Begin, End), adding Separator between the elements.
Definition: StringExtras.h:327
This class defines information used to lower LLVM code to legal SelectionDAG operators that the targe...
ELFYAML::ELF_STO Other
Definition: ELFYAML.cpp:736
const MCInstrDesc & getDesc() const
Returns the target instruction descriptor of this MachineInstr.
Definition: MachineInstr.h:287
INITIALIZE_PASS(LiveDebugValues, DEBUG_TYPE, "Live DEBUG_VALUE analysis", false, false) LiveDebugValues
Default construct and initialize the pass.
virtual const TargetInstrInfo * getInstrInfo() const
Debug location.
Printable PrintReg(unsigned Reg, const TargetRegisterInfo *TRI=nullptr, unsigned SubRegIdx=0)
Prints virtual and physical registers with or without a TRI instance.
void initializeLiveDebugValuesPass(PassRegistry &)
TargetInstrInfo - Interface to description of machine instruction set.
MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.
#define DEBUG_TYPE
void dump(const SparseBitVector< ElementSize > &LHS, raw_ostream &out)
StringRef getName() const
Return the name of the corresponding LLVM basic block, or an empty string.
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
DISubprogram * getSubprogram() const
Get the attached subprogram.
Definition: Metadata.cpp:1497
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
LLVM_NODISCARD bool empty() const
Definition: SmallPtrSet.h:92
std::pair< iterator, bool > insert(PtrType Ptr)
Inserts Ptr if and only if there is no element in the container equal to Ptr.
Definition: SmallPtrSet.h:371
bool isValidLocationForIntrinsic(const DILocation *DL) const
Check that a location is valid for this variable.
MCRegAliasIterator enumerates all registers aliasing Reg.
Represent the analysis usage information of a pass.
bool hasOneMemOperand() const
Return true if this instruction has exactly one MachineMemOperand.
Definition: MachineInstr.h:404
char & LiveDebugValuesID
LiveDebugValues pass.
void setImm(int64_t immVal)
size_type count(ConstPtrType Ptr) const
count - Return 1 if the specified pointer is in the set, 0 otherwise.
Definition: SmallPtrSet.h:382
iterator_range< pred_iterator > predecessors()
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
void getMachineBasicBlocks(const DILocation *DL, SmallPtrSetImpl< const MachineBasicBlock *> &MBBs)
getMachineBasicBlocks - Populate given set using machine basic blocks which have machine instructions...
static unsigned isDescribedByReg(const MachineInstr &MI)
const DIExpression * getDebugExpression() const
Return the complex address expression referenced by this DBG_VALUE instruction.
unsigned first
SmallPtrSet - This class implements a set which is optimized for holding SmallSize or less elements...
Definition: SmallPtrSet.h:418
mmo_iterator memoperands_begin() const
Access to memory operands of the instruction.
Definition: MachineInstr.h:389
bool isDebugValue() const
Definition: MachineInstr.h:816
MachineOperand class - Representation of each machine instruction operand.
This is a &#39;vector&#39; (really, a variable-sized array), optimized for the case when the array is small...
Definition: SmallVector.h:864
Module.h This file contains the declarations for the Module class.
Information about stack frame layout on the target.
static unsigned isDbgValueDescribedByReg(const MachineInstr &MI)
static GCRegistry::Add< StatepointGC > D("statepoint-example", "an example strategy for statepoint")
void setPreservesCFG()
This function should be called by the pass, iff they do not:
Definition: Pass.cpp:285
int64_t getImm() const
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition: Debug.cpp:132
Special value supplied for machine level alias analysis.
static void clear(coro::Shape &Shape)
Definition: Coroutines.cpp:210
const MachineBasicBlock * getParent() const
Definition: MachineInstr.h:139
MachineFunctionProperties & set(Property P)
Representation of each machine instruction.
Definition: MachineInstr.h:59
const MachineFunction * getParent() const
Return the MachineFunction containing this basic block.
LexicalScopes - This class provides interface to collect and use lexical scoping information from mac...
virtual const TargetFrameLowering * getFrameLowering() const
bool isReg() const
isReg - Tests if this is a MO_Register operand.
const Function * getFunction() const
getFunction - Return the LLVM function that this machine code represents
const unsigned Kind
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
bool operator<(int64_t V1, const APSInt &V2)
Definition: APSInt.h:326
unsigned getStackPointerRegisterToSaveRestore() const
If a physical register, this specifies the register that llvm.savestack/llvm.restorestack should save...
const DILocalVariable * getDebugVariable() const
Return the debug variable referenced by this DBG_VALUE instruction.
static DIExpression * prepend(const DIExpression *DIExpr, bool Deref, int64_t Offset=0, bool StackValue=false)
Prepend DIExpr with a deref and offset operation and optionally turn it into a stack value...
This class implements an extremely fast bulk output stream that can only output to a stream...
Definition: raw_ostream.h:44
#define DEBUG(X)
Definition: Debug.h:118
IRTranslator LLVM IR MI
bool operator==(uint64_t V1, const APInt &V2)
Definition: APInt.h:1946
const MachineOperand & getOperand(unsigned i) const
Definition: MachineInstr.h:295
bool isIndirectDebugValue() const
A DBG_VALUE is indirect iff the first operand is a register and the second operand is an immediate...
Definition: MachineInstr.h:820
UniqueVector - This class produces a sequential ID number (base 1) for each unique entry that is adde...
Definition: UniqueVector.h:25
bool isSpillSlotObjectIndex(int ObjectIdx) const
Returns true if the specified index corresponds to a spill slot.
Properties which a MachineFunction may have at a given point in time.
This file describes how to lower LLVM code to machine code.