LLVM  7.0.0svn
MCRegisterInfo.cpp
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1 //===- MC/MCRegisterInfo.cpp - Target Register Description ----------------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file implements MCRegisterInfo functions.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #include "llvm/MC/MCRegisterInfo.h"
15 #include "llvm/ADT/DenseMap.h"
17 #include <algorithm>
18 #include <cassert>
19 #include <cstdint>
20 
21 using namespace llvm;
22 
23 unsigned MCRegisterInfo::getMatchingSuperReg(unsigned Reg, unsigned SubIdx,
24  const MCRegisterClass *RC) const {
25  for (MCSuperRegIterator Supers(Reg, this); Supers.isValid(); ++Supers)
26  if (RC->contains(*Supers) && Reg == getSubReg(*Supers, SubIdx))
27  return *Supers;
28  return 0;
29 }
30 
31 unsigned MCRegisterInfo::getSubReg(unsigned Reg, unsigned Idx) const {
32  assert(Idx && Idx < getNumSubRegIndices() &&
33  "This is not a subregister index");
34  // Get a pointer to the corresponding SubRegIndices list. This list has the
35  // name of each sub-register in the same order as MCSubRegIterator.
36  const uint16_t *SRI = SubRegIndices + get(Reg).SubRegIndices;
37  for (MCSubRegIterator Subs(Reg, this); Subs.isValid(); ++Subs, ++SRI)
38  if (*SRI == Idx)
39  return *Subs;
40  return 0;
41 }
42 
43 unsigned MCRegisterInfo::getSubRegIndex(unsigned Reg, unsigned SubReg) const {
44  assert(SubReg && SubReg < getNumRegs() && "This is not a register");
45  // Get a pointer to the corresponding SubRegIndices list. This list has the
46  // name of each sub-register in the same order as MCSubRegIterator.
47  const uint16_t *SRI = SubRegIndices + get(Reg).SubRegIndices;
48  for (MCSubRegIterator Subs(Reg, this); Subs.isValid(); ++Subs, ++SRI)
49  if (*Subs == SubReg)
50  return *SRI;
51  return 0;
52 }
53 
54 unsigned MCRegisterInfo::getSubRegIdxSize(unsigned Idx) const {
55  assert(Idx && Idx < getNumSubRegIndices() &&
56  "This is not a subregister index");
57  return SubRegIdxRanges[Idx].Size;
58 }
59 
60 unsigned MCRegisterInfo::getSubRegIdxOffset(unsigned Idx) const {
61  assert(Idx && Idx < getNumSubRegIndices() &&
62  "This is not a subregister index");
63  return SubRegIdxRanges[Idx].Offset;
64 }
65 
66 int MCRegisterInfo::getDwarfRegNum(unsigned RegNum, bool isEH) const {
67  const DwarfLLVMRegPair *M = isEH ? EHL2DwarfRegs : L2DwarfRegs;
68  unsigned Size = isEH ? EHL2DwarfRegsSize : L2DwarfRegsSize;
69 
70  if (!M)
71  return -1;
72  DwarfLLVMRegPair Key = { RegNum, 0 };
73  const DwarfLLVMRegPair *I = std::lower_bound(M, M+Size, Key);
74  if (I == M+Size || I->FromReg != RegNum)
75  return -1;
76  return I->ToReg;
77 }
78 
79 int MCRegisterInfo::getLLVMRegNum(unsigned RegNum, bool isEH) const {
80  const DwarfLLVMRegPair *M = isEH ? EHDwarf2LRegs : Dwarf2LRegs;
81  unsigned Size = isEH ? EHDwarf2LRegsSize : Dwarf2LRegsSize;
82 
83  if (!M)
84  return -1;
85  DwarfLLVMRegPair Key = { RegNum, 0 };
86  const DwarfLLVMRegPair *I = std::lower_bound(M, M+Size, Key);
87  assert(I != M+Size && I->FromReg == RegNum && "Invalid RegNum");
88  return I->ToReg;
89 }
90 
91 int MCRegisterInfo::getLLVMRegNumFromEH(unsigned RegNum) const {
92  const DwarfLLVMRegPair *M = EHDwarf2LRegs;
93  unsigned Size = EHDwarf2LRegsSize;
94 
95  if (!M)
96  return -1;
97  DwarfLLVMRegPair Key = { RegNum, 0 };
98  const DwarfLLVMRegPair *I = std::lower_bound(M, M+Size, Key);
99  if (I == M+Size || I->FromReg != RegNum)
100  return -1;
101  return I->ToReg;
102 }
103 
105  // On ELF platforms, DWARF EH register numbers are the same as DWARF
106  // other register numbers. On Darwin x86, they differ and so need to be
107  // mapped. The .cfi_* directives accept integer literals as well as
108  // register names and should generate exactly what the assembly code
109  // asked for, so there might be DWARF/EH register numbers that don't have
110  // a corresponding LLVM register number at all. So if we can't map the
111  // EH register number to an LLVM register number, assume it's just a
112  // valid DWARF register number as is.
113  int LRegNum = getLLVMRegNumFromEH(RegNum);
114  if (LRegNum != -1)
115  return getDwarfRegNum(LRegNum, false);
116  return RegNum;
117 }
118 
119 int MCRegisterInfo::getSEHRegNum(unsigned RegNum) const {
120  const DenseMap<unsigned, int>::const_iterator I = L2SEHRegs.find(RegNum);
121  if (I == L2SEHRegs.end()) return (int)RegNum;
122  return I->second;
123 }
124 
125 int MCRegisterInfo::getCodeViewRegNum(unsigned RegNum) const {
126  if (L2CVRegs.empty())
127  report_fatal_error("target does not implement codeview register mapping");
128  const DenseMap<unsigned, int>::const_iterator I = L2CVRegs.find(RegNum);
129  if (I == L2CVRegs.end())
130  report_fatal_error("unknown codeview register");
131  return I->second;
132 }
LLVM_ATTRIBUTE_NORETURN void report_fatal_error(Error Err, bool gen_crash_diag=true)
Report a serious error, calling any installed error handler.
Definition: Error.cpp:115
Compute iterated dominance frontiers using a linear time algorithm.
Definition: AllocatorList.h:24
unsigned getSubRegIndex(unsigned RegNo, unsigned SubRegNo) const
For a given register pair, return the sub-register index if the second register is a sub-register of ...
unsigned Reg
int getLLVMRegNumFromEH(unsigned RegNum) const
Map a DWARF EH register back to a target register (same as getLLVMRegNum(RegNum, true)) but return -1...
int getDwarfRegNumFromDwarfEHRegNum(unsigned RegNum) const
Map a target EH register number to an equivalent DWARF register number.
MCSuperRegIterator enumerates all super-registers of Reg.
bool contains(unsigned Reg) const
contains - Return true if the specified register is included in this register class.
unsigned SubReg
int getDwarfRegNum(unsigned RegNum, bool isEH) const
Map a target register to an equivalent dwarf register number.
Key
PAL metadata keys.
auto lower_bound(R &&Range, ForwardIt I) -> decltype(adl_begin(Range))
Provide wrappers to std::lower_bound which take ranges instead of having to pass begin/end explicitly...
Definition: STLExtras.h:1004
MCRegisterClass - Base class of TargetRegisterClass.
iterator find(const_arg_type_t< KeyT > Val)
Definition: DenseMap.h:146
unsigned getNumRegs() const
Return the number of registers this target has (useful for sizing arrays holding per register informa...
unsigned getMatchingSuperReg(unsigned Reg, unsigned SubIdx, const MCRegisterClass *RC) const
Return a super-register of the specified register Reg so its sub-register of index SubIdx is Reg...
unsigned getSubReg(unsigned Reg, unsigned Idx) const
Returns the physical register number of sub-register "Index" for physical register RegNo...
unsigned getSubRegIdxOffset(unsigned Idx) const
Get the offset of the bit range covered by a sub-register index.
MCSubRegIterator enumerates all sub-registers of Reg.
DwarfLLVMRegPair - Emitted by tablegen so Dwarf<->LLVM reg mappings can be performed with a binary se...
bool isValid() const
isValid - returns true if this iterator is not yet at the end.
int getCodeViewRegNum(unsigned RegNum) const
Map a target register to an equivalent CodeView register number.
#define I(x, y, z)
Definition: MD5.cpp:58
iterator end()
Definition: DenseMap.h:79
unsigned getNumSubRegIndices() const
Return the number of sub-register indices understood by the target.
LLVM_NODISCARD bool empty() const
Definition: DenseMap.h:93
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
int getSEHRegNum(unsigned RegNum) const
Map a target register to an equivalent SEH register number.
constexpr char Size[]
Key for Kernel::Arg::Metadata::mSize.
unsigned getSubRegIdxSize(unsigned Idx) const
Get the size of the bit range covered by a sub-register index.
int getLLVMRegNum(unsigned RegNum, bool isEH) const
Map a dwarf register back to a target register.