LLVM  7.0.0svn
WebAssemblyMCTargetDesc.h
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1 //==- WebAssemblyMCTargetDesc.h - WebAssembly Target Descriptions -*- C++ -*-=//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 ///
10 /// \file
11 /// This file provides WebAssembly-specific target descriptions.
12 ///
13 //===----------------------------------------------------------------------===//
14 
15 #ifndef LLVM_LIB_TARGET_WEBASSEMBLY_MCTARGETDESC_WEBASSEMBLYMCTARGETDESC_H
16 #define LLVM_LIB_TARGET_WEBASSEMBLY_MCTARGETDESC_WEBASSEMBLYMCTARGETDESC_H
17 
18 #include "llvm/BinaryFormat/Wasm.h"
19 #include "llvm/MC/MCInstrDesc.h"
20 #include "llvm/Support/DataTypes.h"
21 #include <memory>
22 
23 namespace llvm {
24 
25 class MCAsmBackend;
26 class MCCodeEmitter;
27 class MCContext;
28 class MCInstrInfo;
29 class MCObjectTargetWriter;
30 class MCSubtargetInfo;
31 class MVT;
32 class Target;
33 class Triple;
34 class raw_pwrite_stream;
35 
38 
39 MCCodeEmitter *createWebAssemblyMCCodeEmitter(const MCInstrInfo &MCII);
40 
41 MCAsmBackend *createWebAssemblyAsmBackend(const Triple &TT);
42 
43 std::unique_ptr<MCObjectTargetWriter>
44 createWebAssemblyELFObjectWriter(bool Is64Bit, uint8_t OSABI);
45 
46 std::unique_ptr<MCObjectTargetWriter>
48 
49 namespace WebAssembly {
51  /// Basic block label in a branch construct.
53  /// Local index.
55  /// Global index.
57  /// 32-bit integer immediates.
59  /// 64-bit integer immediates.
61  /// 32-bit floating-point immediates.
63  /// 64-bit floating-point immediates.
65  /// 32-bit unsigned function indices.
67  /// 32-bit unsigned memory offsets.
69  /// p2align immediate for load and store address alignment.
71  /// signature immediate for block/loop.
73  /// type signature immediate for call_indirect.
75 };
76 } // end namespace WebAssembly
77 
78 namespace WebAssemblyII {
79 enum {
80  // For variadic instructions, this flag indicates whether an operand
81  // in the variable_ops range is an immediate value.
83  // For immediate values in the variable_ops range, this flag indicates
84  // whether the value represents a control-flow label.
86 };
87 } // end namespace WebAssemblyII
88 
89 } // end namespace llvm
90 
91 // Defines symbolic names for WebAssembly registers. This defines a mapping from
92 // register name to register number.
93 //
94 #define GET_REGINFO_ENUM
95 #include "WebAssemblyGenRegisterInfo.inc"
96 
97 // Defines symbolic names for the WebAssembly instructions.
98 //
99 #define GET_INSTRINFO_ENUM
100 #include "WebAssemblyGenInstrInfo.inc"
101 
102 #define GET_SUBTARGETINFO_ENUM
103 #include "WebAssemblyGenSubtargetInfo.inc"
104 
105 namespace llvm {
106 namespace WebAssembly {
107 
108 /// Return the default p2align value for a load or store with the given opcode.
109 inline unsigned GetDefaultP2Align(unsigned Opcode) {
110  switch (Opcode) {
111  case WebAssembly::LOAD8_S_I32:
112  case WebAssembly::LOAD8_U_I32:
113  case WebAssembly::LOAD8_S_I64:
114  case WebAssembly::LOAD8_U_I64:
115  case WebAssembly::ATOMIC_LOAD8_U_I32:
116  case WebAssembly::ATOMIC_LOAD8_U_I64:
117  case WebAssembly::STORE8_I32:
118  case WebAssembly::STORE8_I64:
119  return 0;
120  case WebAssembly::LOAD16_S_I32:
121  case WebAssembly::LOAD16_U_I32:
122  case WebAssembly::LOAD16_S_I64:
123  case WebAssembly::LOAD16_U_I64:
124  case WebAssembly::ATOMIC_LOAD16_U_I32:
125  case WebAssembly::ATOMIC_LOAD16_U_I64:
126  case WebAssembly::STORE16_I32:
127  case WebAssembly::STORE16_I64:
128  return 1;
129  case WebAssembly::LOAD_I32:
130  case WebAssembly::LOAD_F32:
131  case WebAssembly::STORE_I32:
132  case WebAssembly::STORE_F32:
133  case WebAssembly::LOAD32_S_I64:
134  case WebAssembly::LOAD32_U_I64:
135  case WebAssembly::STORE32_I64:
136  case WebAssembly::ATOMIC_LOAD_I32:
137  case WebAssembly::ATOMIC_LOAD32_U_I64:
138  return 2;
139  case WebAssembly::LOAD_I64:
140  case WebAssembly::LOAD_F64:
141  case WebAssembly::STORE_I64:
142  case WebAssembly::STORE_F64:
143  case WebAssembly::ATOMIC_LOAD_I64:
144  return 3;
145  default:
146  llvm_unreachable("Only loads and stores have p2align values");
147  }
148 }
149 
150 /// The operand number of the load or store address in load/store instructions.
151 static const unsigned LoadAddressOperandNo = 3;
152 static const unsigned StoreAddressOperandNo = 2;
153 
154 /// The operand number of the load or store p2align in load/store instructions.
155 static const unsigned LoadP2AlignOperandNo = 1;
156 static const unsigned StoreP2AlignOperandNo = 0;
157 
158 /// This is used to indicate block signatures.
159 enum class ExprType : unsigned {
160  Void = 0x40,
161  I32 = 0x7F,
162  I64 = 0x7E,
163  F32 = 0x7D,
164  F64 = 0x7C,
165  I8x16 = 0x7B,
166  I16x8 = 0x7A,
167  I32x4 = 0x79,
168  F32x4 = 0x78,
169  B8x16 = 0x77,
170  B16x8 = 0x76,
171  B32x4 = 0x75,
172  ExceptRef = 0x68
173 };
174 
175 /// Instruction opcodes emitted via means other than CodeGen.
176 static const unsigned Nop = 0x01;
177 static const unsigned End = 0x0b;
178 
179 wasm::ValType toValType(const MVT &Ty);
180 
181 } // end namespace WebAssembly
182 } // end namespace llvm
183 
184 #endif
static const unsigned LoadP2AlignOperandNo
The operand number of the load or store p2align in load/store instructions.
32-bit floating-point immediates.
static const unsigned LoadAddressOperandNo
The operand number of the load or store address in load/store instructions.
Compute iterated dominance frontiers using a linear time algorithm.
Definition: AllocatorList.h:24
std::unique_ptr< MCObjectTargetWriter > createWebAssemblyWasmObjectWriter(bool Is64Bit)
32-bit unsigned memory offsets.
Basic block label in a branch construct.
static const unsigned StoreP2AlignOperandNo
signature immediate for block/loop.
wasm::ValType toValType(const MVT &Ty)
Machine Value Type.
MCCodeEmitter * createWebAssemblyMCCodeEmitter(const MCInstrInfo &MCII)
static const unsigned End
unsigned GetDefaultP2Align(unsigned Opcode)
Return the default p2align value for a load or store with the given opcode.
type signature immediate for call_indirect.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
std::unique_ptr< MCObjectTargetWriter > createWebAssemblyELFObjectWriter(bool Is64Bit, uint8_t OSABI)
ExprType
This is used to indicate block signatures.
MCAsmBackend * createWebAssemblyAsmBackend(const Triple &TT)
static const unsigned StoreAddressOperandNo
64-bit floating-point immediates.
32-bit unsigned function indices.
p2align immediate for load and store address alignment.
static const unsigned Nop
Instruction opcodes emitted via means other than CodeGen.
Target & getTheWebAssemblyTarget32()
Target & getTheWebAssemblyTarget64()