LLVM  6.0.0svn
WebAssemblyMCTargetDesc.h
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1 //==- WebAssemblyMCTargetDesc.h - WebAssembly Target Descriptions -*- C++ -*-=//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 ///
10 /// \file
11 /// \brief This file provides WebAssembly-specific target descriptions.
12 ///
13 //===----------------------------------------------------------------------===//
14 
15 #ifndef LLVM_LIB_TARGET_WEBASSEMBLY_MCTARGETDESC_WEBASSEMBLYMCTARGETDESC_H
16 #define LLVM_LIB_TARGET_WEBASSEMBLY_MCTARGETDESC_WEBASSEMBLYMCTARGETDESC_H
17 
18 #include "llvm/BinaryFormat/Wasm.h"
19 #include "llvm/MC/MCInstrDesc.h"
20 #include "llvm/Support/DataTypes.h"
21 #include <memory>
22 
23 namespace llvm {
24 
25 class MCAsmBackend;
26 class MCCodeEmitter;
27 class MCContext;
28 class MCInstrInfo;
29 class MCObjectWriter;
30 class MCSubtargetInfo;
31 class MVT;
32 class Target;
33 class Triple;
34 class raw_pwrite_stream;
35 
38 
39 MCCodeEmitter *createWebAssemblyMCCodeEmitter(const MCInstrInfo &MCII);
40 
41 MCAsmBackend *createWebAssemblyAsmBackend(const Triple &TT);
42 
43 std::unique_ptr<MCObjectWriter>
44 createWebAssemblyELFObjectWriter(raw_pwrite_stream &OS,
45  bool Is64Bit, uint8_t OSABI);
46 
47 std::unique_ptr<MCObjectWriter>
48 createWebAssemblyWasmObjectWriter(raw_pwrite_stream &OS,
49  bool Is64Bit);
50 
51 namespace WebAssembly {
53  /// Basic block label in a branch construct.
55  /// Local index.
57  /// Global index.
59  /// 32-bit integer immediates.
61  /// 64-bit integer immediates.
63  /// 32-bit floating-point immediates.
65  /// 64-bit floating-point immediates.
67  /// 32-bit unsigned function indices.
69  /// 32-bit unsigned memory offsets.
71  /// p2align immediate for load and store address alignment.
73  /// signature immediate for block/loop.
75  /// type signature immediate for call_indirect.
77 };
78 } // end namespace WebAssembly
79 
80 namespace WebAssemblyII {
81 enum {
82  // For variadic instructions, this flag indicates whether an operand
83  // in the variable_ops range is an immediate value.
85  // For immediate values in the variable_ops range, this flag indicates
86  // whether the value represents a control-flow label.
88 };
89 } // end namespace WebAssemblyII
90 
91 } // end namespace llvm
92 
93 // Defines symbolic names for WebAssembly registers. This defines a mapping from
94 // register name to register number.
95 //
96 #define GET_REGINFO_ENUM
97 #include "WebAssemblyGenRegisterInfo.inc"
98 
99 // Defines symbolic names for the WebAssembly instructions.
100 //
101 #define GET_INSTRINFO_ENUM
102 #include "WebAssemblyGenInstrInfo.inc"
103 
104 #define GET_SUBTARGETINFO_ENUM
105 #include "WebAssemblyGenSubtargetInfo.inc"
106 
107 namespace llvm {
108 namespace WebAssembly {
109 
110 /// Return the default p2align value for a load or store with the given opcode.
111 inline unsigned GetDefaultP2Align(unsigned Opcode) {
112  switch (Opcode) {
113  case WebAssembly::LOAD8_S_I32:
114  case WebAssembly::LOAD8_U_I32:
115  case WebAssembly::LOAD8_S_I64:
116  case WebAssembly::LOAD8_U_I64:
117  case WebAssembly::ATOMIC_LOAD8_U_I32:
118  case WebAssembly::ATOMIC_LOAD8_U_I64:
119  case WebAssembly::STORE8_I32:
120  case WebAssembly::STORE8_I64:
121  return 0;
122  case WebAssembly::LOAD16_S_I32:
123  case WebAssembly::LOAD16_U_I32:
124  case WebAssembly::LOAD16_S_I64:
125  case WebAssembly::LOAD16_U_I64:
126  case WebAssembly::ATOMIC_LOAD16_U_I32:
127  case WebAssembly::ATOMIC_LOAD16_U_I64:
128  case WebAssembly::STORE16_I32:
129  case WebAssembly::STORE16_I64:
130  return 1;
131  case WebAssembly::LOAD_I32:
132  case WebAssembly::LOAD_F32:
133  case WebAssembly::STORE_I32:
134  case WebAssembly::STORE_F32:
135  case WebAssembly::LOAD32_S_I64:
136  case WebAssembly::LOAD32_U_I64:
137  case WebAssembly::STORE32_I64:
138  case WebAssembly::ATOMIC_LOAD_I32:
139  case WebAssembly::ATOMIC_LOAD32_U_I64:
140  return 2;
141  case WebAssembly::LOAD_I64:
142  case WebAssembly::LOAD_F64:
143  case WebAssembly::STORE_I64:
144  case WebAssembly::STORE_F64:
145  case WebAssembly::ATOMIC_LOAD_I64:
146  return 3;
147  default:
148  llvm_unreachable("Only loads and stores have p2align values");
149  }
150 }
151 
152 /// The operand number of the load or store address in load/store instructions.
153 static const unsigned LoadAddressOperandNo = 3;
154 static const unsigned StoreAddressOperandNo = 2;
155 
156 /// The operand number of the load or store p2align in load/store instructions.
157 static const unsigned LoadP2AlignOperandNo = 1;
158 static const unsigned StoreP2AlignOperandNo = 0;
159 
160 /// This is used to indicate block signatures.
161 enum class ExprType {
162  Void = -0x40,
163  I32 = -0x01,
164  I64 = -0x02,
165  F32 = -0x03,
166  F64 = -0x04,
167  I8x16 = -0x05,
168  I16x8 = -0x06,
169  I32x4 = -0x07,
170  F32x4 = -0x08,
171  B8x16 = -0x09,
172  B16x8 = -0x0a,
173  B32x4 = -0x0b
174 };
175 
176 /// Instruction opcodes emitted via means other than CodeGen.
177 static const unsigned Nop = 0x01;
178 static const unsigned End = 0x0b;
179 
180 wasm::ValType toValType(const MVT &Ty);
181 
182 } // end namespace WebAssembly
183 } // end namespace llvm
184 
185 #endif
static const unsigned LoadP2AlignOperandNo
The operand number of the load or store p2align in load/store instructions.
32-bit floating-point immediates.
static const unsigned LoadAddressOperandNo
The operand number of the load or store address in load/store instructions.
Compute iterated dominance frontiers using a linear time algorithm.
Definition: AllocatorList.h:24
32-bit unsigned memory offsets.
Basic block label in a branch construct.
static const unsigned StoreP2AlignOperandNo
signature immediate for block/loop.
ExprType
This is used to indicate block signatures.
wasm::ValType toValType(const MVT &Ty)
std::unique_ptr< MCObjectWriter > createWebAssemblyWasmObjectWriter(raw_pwrite_stream &OS, bool Is64Bit)
Machine Value Type.
MCCodeEmitter * createWebAssemblyMCCodeEmitter(const MCInstrInfo &MCII)
static const unsigned End
unsigned GetDefaultP2Align(unsigned Opcode)
Return the default p2align value for a load or store with the given opcode.
type signature immediate for call_indirect.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
std::unique_ptr< MCObjectWriter > createWebAssemblyELFObjectWriter(raw_pwrite_stream &OS, bool Is64Bit, uint8_t OSABI)
MCAsmBackend * createWebAssemblyAsmBackend(const Triple &TT)
static const unsigned StoreAddressOperandNo
64-bit floating-point immediates.
32-bit unsigned function indices.
p2align immediate for load and store address alignment.
static const unsigned Nop
Instruction opcodes emitted via means other than CodeGen.
Target & getTheWebAssemblyTarget32()
Target & getTheWebAssemblyTarget64()