#include "AArch64MCLFIRewriter.h"#include "AArch64AddressingModes.h"#include "MCTargetDesc/AArch64MCTargetDesc.h"#include "Utils/AArch64BaseInfo.h"#include "llvm/ADT/Twine.h"#include "llvm/MC/MCInst.h"#include "llvm/MC/MCInstrDesc.h"#include "llvm/MC/MCInstrInfo.h"#include "llvm/MC/MCStreamer.h"#include "llvm/MC/MCSubtargetInfo.h"#include "AArch64GenSystemOperands.inc"Go to the source code of this file.
Classes | |
| struct | llvm::AArch64::LFIVariantEntry |
| struct | llvm::AArch64::PairVariantEntry |
| struct | llvm::AArch64::SIMDPostEntry |
| struct | llvm::AArch64::MemInfoEntry |
Namespaces | |
| namespace | llvm |
| This is an optimization pass for GlobalISel generic memory operations. | |
| namespace | llvm::AArch64 |
Macros | |
| #define | GET_LFIVariantTable_DECL |
| #define | GET_PairVariantTable_DECL |
| #define | GET_SIMDPostTable_DECL |
| #define | GET_MemInfoTable_DECL |
| #define | GET_LFIVariantTable_IMPL |
| #define | GET_PairVariantTable_IMPL |
| #define | GET_SIMDPostTable_IMPL |
| #define | GET_MemInfoTable_IMPL |
Enumerations | |
| enum | llvm::AArch64::LFIAddrMode : uint8_t { llvm::AArch64::LFI_AM_Ui = 0 , llvm::AArch64::LFI_AM_RoW = 1 , llvm::AArch64::LFI_AM_RoX = 2 , llvm::AArch64::LFI_AM_Pre = 3 , llvm::AArch64::LFI_AM_Post = 4 } |
Functions | |
| static bool | isSyscall (const MCInst &Inst) |
| static bool | isPrivilegedTP (int64_t Reg) |
| static bool | isTPRead (const MCInst &Inst) |
| static bool | isTPWrite (const MCInst &Inst) |
| static bool | isPrivilegedTPAccess (const MCInst &Inst) |
| static bool | isFakeMemAccess (const MCInst &Inst) |
| static bool | mayPrefetch (const MCInst &Inst) |
| static bool | isVASysOp (const MCInst &Inst) |
| static MCInst | replaceRegAt (const MCInst &Inst, unsigned Idx, MCRegister NewReg) |
| static unsigned | convertVariantToRoW (unsigned Op, unsigned ExpectedMode) |
| static unsigned | convertRoXToRoW (unsigned Op, unsigned &Shift) |
| static bool | getRoWShift (unsigned Op, unsigned &Shift) |
| static unsigned | convertPrePostToBase (unsigned Op, bool &IsPre, bool &IsNoOffset) |
Variables | |
| static constexpr MCRegister | LFIBaseReg = AArch64::X27 |
| static constexpr MCRegister | LFIAddrReg = AArch64::X28 |
| static constexpr MCRegister | LFIScratchReg = AArch64::X26 |
| static constexpr MCRegister | LFICtxReg = AArch64::X25 |
| static constexpr unsigned | LFITPOffset = 2 |
| static constexpr int | LFISyscallOffset = -8 |
Macro Definition Documentation
◆ GET_LFIVariantTable_DECL
| #define GET_LFIVariantTable_DECL |
Definition at line 64 of file AArch64MCLFIRewriter.cpp.
◆ GET_LFIVariantTable_IMPL
| #define GET_LFIVariantTable_IMPL |
Definition at line 68 of file AArch64MCLFIRewriter.cpp.
◆ GET_MemInfoTable_DECL
| #define GET_MemInfoTable_DECL |
Definition at line 67 of file AArch64MCLFIRewriter.cpp.
◆ GET_MemInfoTable_IMPL
| #define GET_MemInfoTable_IMPL |
Definition at line 71 of file AArch64MCLFIRewriter.cpp.
◆ GET_PairVariantTable_DECL
| #define GET_PairVariantTable_DECL |
Definition at line 65 of file AArch64MCLFIRewriter.cpp.
◆ GET_PairVariantTable_IMPL
| #define GET_PairVariantTable_IMPL |
Definition at line 69 of file AArch64MCLFIRewriter.cpp.
◆ GET_SIMDPostTable_DECL
| #define GET_SIMDPostTable_DECL |
Definition at line 66 of file AArch64MCLFIRewriter.cpp.
◆ GET_SIMDPostTable_IMPL
| #define GET_SIMDPostTable_IMPL |
Definition at line 70 of file AArch64MCLFIRewriter.cpp.
Function Documentation
◆ convertPrePostToBase()
Definition at line 221 of file AArch64MCLFIRewriter.cpp.
References E().
Referenced by llvm::isLFIPrePostMemAccess().
◆ convertRoXToRoW()
Definition at line 198 of file AArch64MCLFIRewriter.cpp.
References E(), and llvm::AArch64::LFI_AM_RoX.
◆ convertVariantToRoW()
Definition at line 191 of file AArch64MCLFIRewriter.cpp.
References E().
Referenced by llvm::isLFIPrePostMemAccess().
◆ getRoWShift()
Definition at line 207 of file AArch64MCLFIRewriter.cpp.
References E(), and llvm::AArch64::LFI_AM_RoW.
◆ isFakeMemAccess()
Definition at line 125 of file AArch64MCLFIRewriter.cpp.
References llvm::MCInst::getOpcode().
◆ isPrivilegedTP()
|
static |
Definition at line 96 of file AArch64MCLFIRewriter.cpp.
References Reg.
Referenced by isPrivilegedTPAccess().
◆ isPrivilegedTPAccess()
Definition at line 111 of file AArch64MCLFIRewriter.cpp.
References llvm::MCOperand::getImm(), llvm::MCInst::getOpcode(), llvm::MCInst::getOperand(), and isPrivilegedTP().
◆ isSyscall()
Definition at line 92 of file AArch64MCLFIRewriter.cpp.
References llvm::MCInst::getOpcode().
◆ isTPRead()
Definition at line 101 of file AArch64MCLFIRewriter.cpp.
References llvm::MCOperand::getImm(), llvm::MCInst::getOpcode(), and llvm::MCInst::getOperand().
◆ isTPWrite()
Definition at line 106 of file AArch64MCLFIRewriter.cpp.
References llvm::MCOperand::getImm(), llvm::MCInst::getOpcode(), and llvm::MCInst::getOperand().
◆ isVASysOp()
Definition at line 155 of file AArch64MCLFIRewriter.cpp.
References llvm::MCOperand::getImm(), llvm::MCInst::getOpcode(), and llvm::MCInst::getOperand().
◆ mayPrefetch()
Definition at line 140 of file AArch64MCLFIRewriter.cpp.
References llvm::MCInst::getOpcode().
◆ replaceRegAt()
|
static |
Definition at line 175 of file AArch64MCLFIRewriter.cpp.
References assert().
Variable Documentation
◆ LFIAddrReg
|
staticconstexpr |
Definition at line 79 of file AArch64MCLFIRewriter.cpp.
◆ LFIBaseReg
|
staticconstexpr |
Definition at line 78 of file AArch64MCLFIRewriter.cpp.
◆ LFICtxReg
|
staticconstexpr |
Definition at line 81 of file AArch64MCLFIRewriter.cpp.
◆ LFIScratchReg
|
staticconstexpr |
Definition at line 80 of file AArch64MCLFIRewriter.cpp.
◆ LFISyscallOffset
|
staticconstexpr |
Definition at line 90 of file AArch64MCLFIRewriter.cpp.
◆ LFITPOffset
|
staticconstexpr |
Definition at line 86 of file AArch64MCLFIRewriter.cpp.
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