GlobalISel pass that selects divergent i1 phis as lane mask phis. More...

#include "AMDGPU.h"
#include "SILowerI1Copies.h"
#include "llvm/CodeGen/GlobalISel/MachineIRBuilder.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineUniformityAnalysis.h"
#include "llvm/InitializePasses.h"

Macros
#define	DEBUG_TYPE "amdgpu-global-isel-divergence-lowering"

Functions
	INITIALIZE_PASS_BEGIN (AMDGPUGlobalISelDivergenceLowering, DEBUG_TYPE, "AMDGPU GlobalISel divergence lowering", false, false) INITIALIZE_PASS_END(AMDGPUGlobalISelDivergenceLowering

Variables
	DEBUG_TYPE

AMDGPU GlobalISel divergence	lowering

AMDGPU GlobalISel divergence	false

Detailed Description

GlobalISel pass that selects divergent i1 phis as lane mask phis.

Lane mask merging uses same algorithm as SDAG in SILowerI1Copies. Handles all cases of temporal divergence. For divergent non-phi i1 and uniform i1 uses outside of the cycle this pass currently depends on LCSSA to insert phis with one incoming.

Definition in file AMDGPUGlobalISelDivergenceLowering.cpp.