LLVM 24.0.0git
AMDGPUTargetParser.h
Go to the documentation of this file.
1//===-- AMDGPUTargetParser - Parser for AMDGPU features ---------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file implements a target parser to recognise AMDGPU hardware features.
10//
11//===----------------------------------------------------------------------===//
12
13#ifndef LLVM_TARGETPARSER_AMDGPUTARGETPARSER_H
14#define LLVM_TARGETPARSER_AMDGPUTARGETPARSER_H
15
16#include "llvm/ADT/Bitset.h"
17#include "llvm/ADT/StringMap.h"
18#include "llvm/ADT/StringRef.h"
21#include <cstdint>
22#include <optional>
23#include <string>
24#include <utility>
25
26namespace llvm {
27
28class raw_ostream;
29template <typename T> class SmallVectorImpl;
30class Triple;
31
32namespace AMDGPU {
33
34/// GPU kinds supported by the AMDGPU target.
36 // Not specified processor.
38
39#define GET_R600_GPU_ENUM
40#include "llvm/TargetParser/R600TargetParserDef.inc"
41
42#define GET_AMDGPU_GPU_ENUM
43#include "llvm/TargetParser/AMDGPUTargetParserDef.inc"
44};
45
46/// One enumerator per frontend-visible feature bit; NUM_FEATURES is the count.
47enum AMDGPUFeature : unsigned {
48#define GET_AMDGPU_FEATURE_ENUM
49#include "llvm/TargetParser/AMDGPUTargetParserDef.inc"
50};
51
53
54/// Instruction set architecture version.
55struct IsaVersion {
59
60 bool operator==(const IsaVersion &Other) const {
61 return Major == Other.Major && Minor == Other.Minor &&
62 Stepping == Other.Stepping;
63 }
64 bool operator!=(const IsaVersion &Other) const { return !(*this == Other); }
65};
66
67// This isn't comprehensive for now, just things that are needed from the
68// frontend driver.
71
72 // Has fma instructions.
74};
75
76// GFX6+ features. This isn't comprehensive for now, just things that are needed
77// from the frontend driver.
80
81 // Common features.
84
85 // Wavefront 32 is available.
87
88 // Xnack is available.
89 FEATURE_XNACK = 1 << 3,
90
91 // Sram-ecc is available.
93
94 // WGP mode is supported.
95 FEATURE_WGP = 1 << 5,
96
97 // Xnack on/off modes are supported.
99
100 // VI SGPR initialization bug requiring a fixed SGPR allocation size.
102};
103
109
111
112/// The canonical GPU name for a variant name.
114
116
117/// Returns the preferred subarch for a GPU name \p CPU, or NoSubArch if
118/// unrecognized.
120
122
123/// Return true if subarch \p A is compatible with subarch \p B, i.e. they are
124/// equal or one is the major-family subarch of the other (e.g. AMDGPUSubArch9
125/// is compatible with AMDGPUSubArch900). NoSubArch is compatible with anything.
126LLVM_ABI bool isSubArchCompatible(const Triple &A, const Triple &B);
128
129/// Return true if the GPU \p AK is usable with the triple subarch \p SubArch.
130/// A NoSubArch triple (legacy "amdgcn") accepts any GPU. Otherwise the GPU's
131/// subarch must equal \p SubArch, or \p SubArch must be the major-family
132/// subarch of the GPU (e.g. the amdgpu9 triple accepts gfx900).
133LLVM_ABI bool isCPUValidForSubArch(Triple::SubArchType SubArch, GPUKind AK);
134
135/// Convenience overload of isCPUValidForSubArch taking a GPU name \p CPU, which
136/// is parsed via parseArchAMDGCN. An unrecognized name is never valid.
138
139/// Return true if \p AK is a pseudo target (e.g. "generic"/"generic-hsa"): a
140/// recognized AMDGCN GPU that represents no concrete hardware and has no
141/// subarch of its own. Such targets are resolved by the backend as a default
142/// device but are not valid as an explicit -mcpu.
143LLVM_ABI bool isPseudoTarget(GPUKind AK);
144
145/// Convenience overload of isPseudoTarget taking a GPU name \p CPU, which is
146/// parsed via parseArchAMDGCN.
148
149/// Returns the effective triple appropriate to use when linking \p B into \p A
150/// by merging the subarches in case of inexact match.
151///
152/// In cases where isSubArchCompatible would return / false, returns \p B. This
153/// assumes that the non-arch triple components are the same
154LLVM_ABI std::string mergeSubArch(const Triple &A, const Triple &B);
155
158
159/// Returns the canonical GPU name for an AMDGPU subarch, e.g.
160/// AMDGPUSubArch1030 -> "gfx1030", AMDGPUSubArch9 -> "gfx9-generic",
161/// AMDGPUSubArch6 -> "gfx600". Returns "" for NoSubArch or a non-AMDGPU
162/// subarch. The major-only subarches map to their generic/lowest
163/// representative, matching the default subtarget for an unspecified -mcpu.
165
166/// Returns the triple subarch name for an AMDGPU subarch, e.g.
167/// AMDGPUSubArch900 -> "amdgpu9.00". Returns "amdgpu" for NoSubArch.
171LLVM_ABI GPUKind parseArchR600(StringRef CPU);
173/// \deprecated Use getFeatureBitset and test the relevant FEAT_* bits instead.
174/// The legacy ArchFeatureKind bitfield is being removed.
175LLVM_DEPRECATED("use getFeatureBitset instead", "getFeatureBitset")
176LLVM_ABI unsigned getArchAttrAMDGCN(GPUKind AK);
177LLVM_DEPRECATED("use getFeatureBitset instead", "getFeatureBitset")
178LLVM_ABI unsigned getArchAttrAMDGCN(Triple::SubArchType SubArch);
180
181/// Returns \p AK's feature bitset, or an empty bitset if unknown.
183
184/// Appends the feature name of each bit set in \p Features to \p Names.
186 SmallVectorImpl<StringRef> &Names);
187
188/// Append the valid AMDGCN GPU names to \p Values. If \p SubArch is not
189/// NoSubArch, only GPUs compatible with that subarch (see isCPUValidForSubArch)
190/// are appended.
191LLVM_ABI void
193 Triple::SubArchType SubArch = Triple::NoSubArch);
195
196LLVM_ABI IsaVersion getIsaVersion(StringRef GPU);
197LLVM_ABI IsaVersion getIsaVersion(Triple::SubArchType SubArch);
198
200
201LLVM_ABI unsigned getTotalNumSGPRs(GPUKind AK);
203
204LLVM_ABI unsigned getAddressableNumSGPRs(GPUKind AK);
206
207LLVM_ABI unsigned getSGPRAllocGranule(GPUKind AK);
209
210/// \returns VGPR allocation granularity for \p AK, in registers. \p IsWave32
211/// selects the wavefront size, which is a per-kernel mode rather than a
212/// property of the GPU. This does not account for dynamic VGPR mode, where the
213/// block size chosen by the caller is the granule.
214LLVM_ABI unsigned getVGPRAllocGranule(GPUKind AK, bool IsWave32);
216 bool IsWave32);
217
218/// \returns Maximum LDS in bytes a single work-group can address. This is a
219/// fixed hardware cap and does not depend on how many SIMDs a work-group runs
220/// on.
222LLVM_ABI unsigned
224
225/// \returns Number of LDS banks per compute unit.
226LLVM_ABI unsigned getLDSBankCount(GPUKind AK);
228
229/// \returns Number of SIMDs a work-group's waves run on. All four SIMDs of the
230/// functional block in full-SIMD mode, half of them otherwise.
231constexpr unsigned getNumWorkGroupSIMDs(bool FullSIMDMode) {
232 return FullSIMDMode ? 4 : 2;
233}
234
235/// \returns Minimum number of waves per execution unit.
236constexpr unsigned getMinWavesPerEU() { return 1; }
237
238/// \returns Maximum number of waves per execution unit without any kind of
239/// limitation.
240LLVM_ABI unsigned getMaxWavesPerEU(GPUKind AK);
242
243/// \returns Minimum flat work group size.
244constexpr unsigned getMinFlatWorkGroupSize() { return 1; }
245
246/// \returns Maximum flat work group size.
247constexpr unsigned getMaxFlatWorkGroupSize() {
248 // Some subtargets allow encoding 2048, but this isn't tested or supported.
249 return 1024;
250}
251
252/// Fills Features map with default values for given target GPU.
253/// \p Features contains overriding target features and this function returns
254/// default target features with entries overridden by \p Features.
255LLVM_ABI std::pair<FeatureError, StringRef>
257
259
261private:
262 GPUKind Arch;
263 std::string TargetTripleString;
264 TargetIDSetting XnackSetting;
265 TargetIDSetting SramEccSetting;
266 bool IsAMDHSA;
267
268public:
269 TargetID(GPUKind Arch, const Triple &TT, TargetIDSetting XnackSetting,
270 TargetIDSetting SramEccSetting);
271
272 /// Construct a TargetID from a triple \p TT and the processor+features string
273 /// e.g. "gfx90a", "gfx90a:xnack+:sramecc-", "".
274 TargetID(const Triple &TT, StringRef TargetIDStr);
275
276 ~TargetID() = default;
277
278 /// \return True if the current xnack setting is not "Unsupported".
279 bool isXnackSupported() const {
280 return XnackSetting != TargetIDSetting::Unsupported;
281 }
282
283 /// \returns True if the current xnack setting is "On" or "Any".
284 bool isXnackOnOrAny() const {
285 return XnackSetting == TargetIDSetting::On ||
286 XnackSetting == TargetIDSetting::Any;
287 }
288
289 /// \returns True if current xnack setting is "On" or "Off",
290 /// false otherwise.
291 bool isXnackOnOrOff() const {
292 return getXnackSetting() == TargetIDSetting::On ||
293 getXnackSetting() == TargetIDSetting::Off;
294 }
295
296 /// \returns The current xnack TargetIDSetting, possible options are
297 /// "Unsupported", "Any", "Off", and "On".
298 TargetIDSetting getXnackSetting() const { return XnackSetting; }
299
300 /// Sets xnack setting to \p NewXnackSetting.
301 void setXnackSetting(TargetIDSetting NewXnackSetting) {
302 XnackSetting = NewXnackSetting;
303 }
304
305 /// \return True if the current sramecc setting is not "Unsupported".
306 bool isSramEccSupported() const {
307 return SramEccSetting != TargetIDSetting::Unsupported;
308 }
309
310 /// \returns True if the current sramecc setting is "On" or "Any".
311 bool isSramEccOnOrAny() const {
312 return SramEccSetting == TargetIDSetting::On ||
313 SramEccSetting == TargetIDSetting::Any;
314 }
315
316 /// \returns True if current sramecc setting is "On" or "Off",
317 /// false otherwise.
318 bool isSramEccOnOrOff() const {
319 return getSramEccSetting() == TargetIDSetting::On ||
320 getSramEccSetting() == TargetIDSetting::Off;
321 }
322
323 /// \returns The current sramecc TargetIDSetting, possible options are
324 /// "Unsupported", "Any", "Off", and "On".
325 TargetIDSetting getSramEccSetting() const { return SramEccSetting; }
326
327 /// Sets sramecc setting to \p NewSramEccSetting.
328 void setSramEccSetting(TargetIDSetting NewSramEccSetting) {
329 SramEccSetting = NewSramEccSetting;
330 }
331
332 GPUKind getGPUKind() const { return Arch; }
333
334 StringRef getTargetTripleString() const { return TargetTripleString; }
335
336 /// \returns True if this is an AMDHSA target.
337 bool isAMDHSA() const { return IsAMDHSA; }
338
339 /// Parse and validate a TargetID for triple \p TT from the processor+features
340 /// string \p ProcAndFeatures (e.g. "gfx90a", "gfx90a:xnack+:sramecc-", "").
341 /// Returns std::nullopt if the triple is not AMDGCN, the processor is
342 /// unrecognized, or a feature modifier is invalid for the processor.
343 static std::optional<TargetID> parse(const Triple &TT,
344 StringRef ProcAndFeatures);
345
346 /// Parse and validate a TargetID from a full
347 /// "<triple>-<processor>:<features>" directive string.
348 static std::optional<TargetID>
349 parseTargetIDString(StringRef TargetIDDirective);
350
351 /// Returns true if \p Other denotes the same target as *this, i.e. the same
352 /// processor and xnack/sramecc settings on a compatible triple. This is a
353 /// semantic equality that looks through spelling differences.
354 bool isEquivalent(const TargetID &Other) const;
355
356 /// Returns true if a device image for *this can provide the device code for a
357 /// request for \p Other. This is directional and models logical-linking
358 /// compatibility.
359 bool providesFor(const TargetID &Other) const;
360
361 void print(raw_ostream &OS) const;
362
363 std::string toString() const;
364
365 /// Print the canonical processor name followed by any explicit xnack and
366 /// sramecc feature modifiers (e.g. "gfx908:sramecc-:xnack+"), without the
367 /// triple prefix.
368 void printCanonicalTargetIDString(raw_ostream &OS) const;
369
370 /// \returns the canonical processor name followed by any explicit xnack and
371 /// sramecc feature modifiers order (e.g. "gfx908:sramecc-:xnack+"), without
372 /// the triple prefix.
373 std::string getCanonicalFeatureString() const;
374
375 bool operator==(const TargetID &Other) const;
376 bool operator!=(const TargetID &Other) const { return !(*this == Other); }
377};
378
380 TargetID.print(OS);
381 return OS;
382}
383
384} // namespace AMDGPU
385
386} // namespace llvm
387
388#endif
aarch64 promote const
This file defines the StringMap class.
static void print(raw_ostream &Out, object::Archive::Kind Kind, T Val)
static GCRegistry::Add< ErlangGC > A("erlang", "erlang-compatible garbage collector")
static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")
#define LLVM_DEPRECATED(MSG, FIX)
Definition Compiler.h:260
#define LLVM_ABI
Definition Compiler.h:215
static llvm::Error parse(GsymDataExtractor &Data, uint64_t BaseAddr, LineEntryCallback const &Callback)
Definition LineTable.cpp:54
static const char * toString(MIToken::TokenKind TokenKind)
Definition MIParser.cpp:607
bool operator==(const MergedFunctionsInfo &LHS, const MergedFunctionsInfo &RHS)
#define T
void setSramEccSetting(TargetIDSetting NewSramEccSetting)
Sets sramecc setting to NewSramEccSetting.
void print(raw_ostream &OS) const
TargetIDSetting getXnackSetting() const
bool operator!=(const TargetID &Other) const
StringRef getTargetTripleString() const
TargetID(GPUKind Arch, const Triple &TT, TargetIDSetting XnackSetting, TargetIDSetting SramEccSetting)
void setXnackSetting(TargetIDSetting NewXnackSetting)
Sets xnack setting to NewXnackSetting.
TargetIDSetting getSramEccSetting() const
This is a constexpr reimplementation of a subset of std::bitset.
Definition Bitset.h:30
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
StringMap - This is an unconventional map that is specialized for handling keys that are "strings",...
Definition StringMap.h:129
Represent a constant reference to a string, i.e.
Definition StringRef.h:56
Triple - Helper class for working with autoconf configuration names.
Definition Triple.h:48
This class implements an extremely fast bulk output stream that can only output to a stream.
Definition raw_ostream.h:53
LLVM_ABI StringRef getArchNameR600(GPUKind AK)
LLVM_ABI void fillValidArchListAMDGCN(SmallVectorImpl< StringRef > &Values, Triple::SubArchType SubArch=Triple::NoSubArch)
Append the valid AMDGCN GPU names to Values.
LLVM_ABI unsigned getMaxWavesPerEU(GPUKind AK)
LLVM_ABI StringRef getCanonicalArchName(const Triple &T, StringRef Arch)
LLVM_ABI StringRef getBaseArchNameAMDGCN(GPUKind AK)
The canonical GPU name for a variant name.
constexpr unsigned getMaxFlatWorkGroupSize()
LLVM_ABI void fillValidArchListR600(SmallVectorImpl< StringRef > &Values)
constexpr unsigned getNumWorkGroupSIMDs(bool FullSIMDMode)
LLVM_ABI R600FeatureKind getArchAttrR600(GPUKind AK)
constexpr unsigned getMinFlatWorkGroupSize()
LLVM_ABI std::string mergeSubArch(const Triple &A, const Triple &B)
Returns the effective triple appropriate to use when linking B into A by merging the subarches in cas...
LLVM_ABI bool isCPUValidForSubArch(Triple::SubArchType SubArch, GPUKind AK)
Return true if the GPU AK is usable with the triple subarch SubArch.
LLVM_ABI bool isSubArchCompatible(const Triple &A, const Triple &B)
Return true if subarch A is compatible with subarch B, i.e.
LLVM_ABI unsigned getLDSBankCount(GPUKind AK)
LLVM_ABI unsigned getMaxHWAddressableLocalMemorySize(GPUKind AK)
LLVM_ABI StringRef getArchFamilyNameAMDGCN(GPUKind AK)
LLVM_ABI StringRef getSubArchName(Triple::SubArchType SubArch)
Returns the triple subarch name for an AMDGPU subarch, e.g.
LLVM_ABI unsigned getAddressableNumSGPRs(GPUKind AK)
LLVM_ABI IsaVersion getIsaVersion(StringRef GPU)
LLVM_ABI unsigned getTotalNumSGPRs(GPUKind AK)
GPUKind
GPU kinds supported by the AMDGPU target.
Bitset< NUM_FEATURES > AMDGPUFeatureBitset
LLVM_ABI Triple::SubArchType getSubArchFromGPUName(StringRef CPU)
Returns the preferred subarch for a GPU name CPU, or NoSubArch if unrecognized.
LLVM_ABI unsigned getSGPRAllocGranule(GPUKind AK)
LLVM_ABI Triple::SubArchType getSubArch(GPUKind AK)
LLVM_ABI StringRef getArchNameFromSubArch(Triple::SubArchType SubArch)
Returns the canonical GPU name for an AMDGPU subarch, e.g.
LLVM_ABI unsigned getVGPRAllocGranule(GPUKind AK, bool IsWave32)
constexpr unsigned getMinWavesPerEU()
LLVM_ABI GPUKind parseArchAMDGCN(StringRef CPU)
AMDGPUFeature
One enumerator per frontend-visible feature bit; NUM_FEATURES is the count.
raw_ostream & operator<<(raw_ostream &OS, const TargetID &TargetID)
LLVM_ABI bool isPseudoTarget(GPUKind AK)
Return true if AK is a pseudo target (e.g.
LLVM_ABI GPUKind getGPUKindFromSubArch(Triple::SubArchType SubArch)
LLVM_ABI std::pair< FeatureError, StringRef > fillAMDGPUFeatureMap(StringRef GPU, const Triple &T, StringMap< bool > &Features)
Fills Features map with default values for given target GPU.
LLVM_ABI void getFeatureNames(const AMDGPUFeatureBitset &Features, SmallVectorImpl< StringRef > &Names)
Appends the feature name of each bit set in Features to Names.
LLVM_ABI StringRef getArchNameAMDGCN(GPUKind AK)
LLVM_ABI unsigned getArchAttrAMDGCN(GPUKind AK)
LLVM_ABI Triple::SubArchType getMajorSubArch(Triple::SubArchType SubArch)
LLVM_ABI const AMDGPUFeatureBitset & getFeatureBitset(GPUKind AK)
Returns AK's feature bitset, or an empty bitset if unknown.
LLVM_ABI GPUKind parseArchR600(StringRef CPU)
This is an optimization pass for GlobalISel generic memory operations.
RelativeUniformCounterPtr Values
Definition InstrProf.h:91
Instruction set architecture version.
bool operator==(const IsaVersion &Other) const
bool operator!=(const IsaVersion &Other) const