84 if (&Subtarget == &NewSubtarget)
87 Names2InstrOpCodes.clear();
89 Names2RegMasks.clear();
90 Names2SubRegIndices.clear();
91 Names2TargetIndices.clear();
92 Names2DirectTargetFlags.clear();
93 Names2BitmaskTargetFlags.clear();
94 Names2MMOTargetFlags.clear();
96 initNames2RegClasses();
100void PerTargetMIParsingState::initNames2Regs() {
101 if (!Names2Regs.empty())
105 Names2Regs.insert(std::make_pair(
"noreg", 0));
107 assert(
TRI &&
"Expected target register info");
109 for (
unsigned I = 0, E =
TRI->getNumRegs();
I < E; ++
I) {
114 assert(WasInserted &&
"Expected registers to be unique case-insensitively");
121 auto RegInfo = Names2Regs.find(
RegName);
122 if (RegInfo == Names2Regs.end())
124 Reg = RegInfo->getValue();
130 const auto *
TRI = Subtarget.getRegisterInfo();
131 std::optional<uint8_t> FV =
TRI->getVRegFlagValue(FlagName);
138void PerTargetMIParsingState::initNames2InstrOpCodes() {
139 if (!Names2InstrOpCodes.
empty())
142 assert(
TII &&
"Expected target instruction info");
143 for (
unsigned I = 0, E =
TII->getNumOpcodes();
I < E; ++
I)
149 initNames2InstrOpCodes();
150 auto InstrInfo = Names2InstrOpCodes.find(InstrName);
151 if (InstrInfo == Names2InstrOpCodes.end())
153 OpCode = InstrInfo->getValue();
157void PerTargetMIParsingState::initNames2RegMasks() {
158 if (!Names2RegMasks.
empty())
161 assert(
TRI &&
"Expected target register info");
165 for (
size_t I = 0, E = RegMasks.
size();
I < E; ++
I)
167 std::make_pair(
StringRef(RegMaskNames[
I]).lower(), RegMasks[
I]));
171 initNames2RegMasks();
172 auto RegMaskInfo = Names2RegMasks.find(Identifier);
173 if (RegMaskInfo == Names2RegMasks.end())
175 return RegMaskInfo->getValue();
178void PerTargetMIParsingState::initNames2SubRegIndices() {
179 if (!Names2SubRegIndices.
empty())
182 for (
unsigned I = 1, E =
TRI->getNumSubRegIndices();
I < E; ++
I)
183 Names2SubRegIndices.
insert(
184 std::make_pair(
TRI->getSubRegIndexName(
I),
I));
188 initNames2SubRegIndices();
189 auto SubRegInfo = Names2SubRegIndices.find(Name);
190 if (SubRegInfo == Names2SubRegIndices.end())
192 return SubRegInfo->getValue();
195void PerTargetMIParsingState::initNames2TargetIndices() {
196 if (!Names2TargetIndices.
empty())
199 assert(
TII &&
"Expected target instruction info");
200 auto Indices =
TII->getSerializableTargetIndices();
201 for (
const auto &
I : Indices)
206 initNames2TargetIndices();
207 auto IndexInfo = Names2TargetIndices.find(Name);
208 if (IndexInfo == Names2TargetIndices.end())
210 Index = IndexInfo->second;
214void PerTargetMIParsingState::initNames2DirectTargetFlags() {
215 if (!Names2DirectTargetFlags.
empty())
219 assert(
TII &&
"Expected target instruction info");
220 auto Flags =
TII->getSerializableDirectMachineOperandTargetFlags();
221 for (
const auto &
I : Flags)
222 Names2DirectTargetFlags.
insert(
228 initNames2DirectTargetFlags();
229 auto FlagInfo = Names2DirectTargetFlags.find(Name);
230 if (FlagInfo == Names2DirectTargetFlags.end())
232 Flag = FlagInfo->second;
236void PerTargetMIParsingState::initNames2BitmaskTargetFlags() {
237 if (!Names2BitmaskTargetFlags.
empty())
241 assert(
TII &&
"Expected target instruction info");
242 auto Flags =
TII->getSerializableBitmaskMachineOperandTargetFlags();
243 for (
const auto &
I : Flags)
244 Names2BitmaskTargetFlags.
insert(
250 initNames2BitmaskTargetFlags();
251 auto FlagInfo = Names2BitmaskTargetFlags.find(Name);
252 if (FlagInfo == Names2BitmaskTargetFlags.end())
254 Flag = FlagInfo->second;
258void PerTargetMIParsingState::initNames2MMOTargetFlags() {
259 if (!Names2MMOTargetFlags.
empty())
263 assert(
TII &&
"Expected target instruction info");
264 auto Flags =
TII->getSerializableMachineMemOperandTargetFlags();
265 for (
const auto &
I : Flags)
271 initNames2MMOTargetFlags();
272 auto FlagInfo = Names2MMOTargetFlags.find(Name);
273 if (FlagInfo == Names2MMOTargetFlags.end())
275 Flag = FlagInfo->second;
279void PerTargetMIParsingState::initNames2RegClasses() {
280 if (!Names2RegClasses.
empty())
284 for (
unsigned I = 0, E =
TRI->getNumRegClasses();
I < E; ++
I) {
285 const auto *RC =
TRI->getRegClass(
I);
291void PerTargetMIParsingState::initNames2RegBanks() {
292 if (!Names2RegBanks.empty())
295 const RegisterBankInfo *RBI = Subtarget.getRegBankInfo();
303 Names2RegBanks.insert(
304 std::make_pair(StringRef(RegBank.getName()).lower(), &RegBank));
310 auto RegClassInfo = Names2RegClasses.find(Name);
311 if (RegClassInfo == Names2RegClasses.end())
313 return RegClassInfo->getValue();
317 auto RegBankInfo = Names2RegBanks.find(Name);
318 if (RegBankInfo == Names2RegBanks.end())
320 return RegBankInfo->getValue();
333 Info->
VReg =
MRI.createIncompleteVirtualRegister();
334 I.first->second = Info;
336 return *
I.first->second;
345 Info->
VReg =
MF.getRegInfo().createIncompleteVirtualRegister(
RegName);
346 I.first->second = Info;
348 return *
I.first->second;
356 Slots2Values.
insert(std::make_pair(
unsigned(Slot), V));
364 for (
const auto &Arg :
F.args())
366 for (
const auto &BB :
F) {
368 for (
const auto &
I : BB)
383struct ParsedMachineOperand {
387 std::optional<unsigned> TiedDefIdx;
391 std::optional<unsigned> &TiedDefIdx)
392 : Operand(Operand), Begin(Begin), End(End), TiedDefIdx(TiedDefIdx) {
395 "Only used register operands can be tied");
402 StringRef
Source, CurrentSource;
405 PerFunctionMIParsingState &PFS;
407 DenseMap<unsigned, const BasicBlock *> Slots2BasicBlocks;
410 MIParser(PerFunctionMIParsingState &PFS, SMDiagnostic &
Error,
412 MIParser(PerFunctionMIParsingState &PFS, SMDiagnostic &
Error,
413 StringRef Source, SMRange SourceRange);
417 void lex(
unsigned SkipChar = 0);
422 bool error(
const Twine &Msg);
430 parseBasicBlockDefinitions(DenseMap<unsigned, MachineBasicBlock *> &MBBSlots);
431 bool parseBasicBlocks();
433 bool parseStandaloneMBB(MachineBasicBlock *&
MBB);
435 bool parseStandaloneVirtualRegister(VRegInfo *&
Info);
437 bool parseStandaloneStackObject(
int &FI);
438 bool parseStandaloneMDNode(MDNode *&Node);
440 bool parseMDTuple(MDNode *&MD,
bool IsDistinct);
441 bool parseMDNodeVector(SmallVectorImpl<Metadata *> &Elts);
445 parseBasicBlockDefinition(DenseMap<unsigned, MachineBasicBlock *> &MBBSlots);
446 bool parseBasicBlock(MachineBasicBlock &
MBB,
447 MachineBasicBlock *&AddFalthroughFrom);
448 bool parseBasicBlockLiveins(MachineBasicBlock &
MBB);
449 bool parseBasicBlockSuccessors(MachineBasicBlock &
MBB);
452 bool parseVirtualRegister(VRegInfo *&
Info);
453 bool parseNamedVirtualRegister(VRegInfo *&
Info);
454 bool parseRegister(
Register &
Reg, VRegInfo *&VRegInfo);
455 bool parseRegisterFlag(
unsigned &Flags);
456 bool parseRegisterClassOrBank(VRegInfo &RegInfo);
457 bool parseSubRegisterIndex(
unsigned &
SubReg);
458 bool parseRegisterTiedDefIndex(
unsigned &TiedDefIdx);
459 bool parseRegisterOperand(MachineOperand &Dest,
460 std::optional<unsigned> &TiedDefIdx,
462 bool parseImmediateOperand(MachineOperand &Dest);
467 bool parseTypedImmediateOperand(MachineOperand &Dest);
468 bool parseFPImmediateOperand(MachineOperand &Dest);
470 bool parseMBBOperand(MachineOperand &Dest);
471 bool parseStackFrameIndex(
int &FI);
472 bool parseStackObjectOperand(MachineOperand &Dest);
473 bool parseFixedStackFrameIndex(
int &FI);
474 bool parseFixedStackObjectOperand(MachineOperand &Dest);
476 bool parseGlobalAddressOperand(MachineOperand &Dest);
477 bool parseConstantPoolIndexOperand(MachineOperand &Dest);
478 bool parseSubRegisterIndexOperand(MachineOperand &Dest);
479 bool parseJumpTableIndexOperand(MachineOperand &Dest);
480 bool parseExternalSymbolOperand(MachineOperand &Dest);
481 bool parseMCSymbolOperand(MachineOperand &Dest);
483 bool parseDIExpression(MDNode *&Expr);
484 bool parseDILocation(MDNode *&Expr);
485 bool parseMetadataOperand(MachineOperand &Dest);
486 bool parseCFIOffset(
int &
Offset);
487 bool parseCFIRegister(
unsigned &
Reg);
489 bool parseCFIEscapeValues(std::string& Values);
490 bool parseCFIOperand(MachineOperand &Dest);
491 bool parseIRBlock(BasicBlock *&BB,
const Function &
F);
492 bool parseBlockAddressOperand(MachineOperand &Dest);
493 bool parseIntrinsicOperand(MachineOperand &Dest);
494 bool parsePredicateOperand(MachineOperand &Dest);
495 bool parseShuffleMaskOperand(MachineOperand &Dest);
496 bool parseTargetIndexOperand(MachineOperand &Dest);
497 bool parseDbgInstrRefOperand(MachineOperand &Dest);
498 bool parseCustomRegisterMaskOperand(MachineOperand &Dest);
499 bool parseLiveoutRegisterMaskOperand(MachineOperand &Dest);
500 bool parseMachineOperand(
const unsigned OpCode,
const unsigned OpIdx,
501 MachineOperand &Dest,
502 std::optional<unsigned> &TiedDefIdx);
503 bool parseMachineOperandAndTargetFlags(
const unsigned OpCode,
504 const unsigned OpIdx,
505 MachineOperand &Dest,
506 std::optional<unsigned> &TiedDefIdx);
507 bool parseOffset(int64_t &
Offset);
508 bool parseIRBlockAddressTaken(BasicBlock *&BB);
510 bool parseAddrspace(
unsigned &Addrspace);
511 bool parseSectionID(std::optional<MBBSectionID> &SID);
512 bool parseBBID(std::optional<UniqueBBID> &BBID);
513 bool parseCallFrameSize(
unsigned &CallFrameSize);
514 bool parseOperandsOffset(MachineOperand &
Op);
517 bool parseMemoryPseudoSourceValue(
const PseudoSourceValue *&PSV);
518 bool parseMachinePointerInfo(MachinePointerInfo &Dest);
521 bool parseMachineMemoryOperand(MachineMemOperand *&Dest);
522 bool parsePreOrPostInstrSymbol(MCSymbol *&Symbol);
523 bool parseHeapAllocMarker(MDNode *&Node);
524 bool parsePCSections(MDNode *&Node);
526 bool parseTargetImmMnemonic(
const unsigned OpCode,
const unsigned OpIdx,
527 MachineOperand &Dest,
const MIRFormatter &MF);
538 bool getUint64(uint64_t &Result);
554 bool parseInstruction(
unsigned &OpCode,
unsigned &Flags);
556 bool assignRegisterTies(MachineInstr &
MI,
560 const MCInstrDesc &MCID);
563 const BasicBlock *getIRBlock(
unsigned Slot,
const Function &
F);
566 MCSymbol *getOrCreateMCSymbol(StringRef Name);
570 bool parseStringConstant(std::string &Result);
587 SourceRange(SourceRange), PFS(PFS) {}
589void MIParser::lex(
unsigned SkipChar) {
591 CurrentSource.substr(SkipChar), Token,
595bool MIParser::error(
const Twine &Msg) {
return error(Token.location(), Msg); }
615 assert(SourceRange.isValid() &&
"Invalid source range");
637 return "<unknown token>";
642 if (Token.isNot(TokenKind))
649 if (Token.isNot(TokenKind))
656bool MIParser::parseSectionID(std::optional<MBBSectionID> &SID) {
662 return error(
"Unknown Section ID");
665 const StringRef &S = Token.stringValue();
666 if (S ==
"Exception")
668 else if (S ==
"Cold")
671 return error(
"Unknown Section ID");
678bool MIParser::parseBBID(std::optional<UniqueBBID> &BBID) {
682 unsigned CloneID = 0;
684 return error(
"Unknown BB ID");
688 return error(
"Unknown Clone ID");
691 BBID = {BaseID, CloneID};
696bool MIParser::parseCallFrameSize(
unsigned &CallFrameSize) {
701 return error(
"Unknown call frame size");
702 CallFrameSize =
Value;
707bool MIParser::parseBasicBlockDefinition(
713 auto Loc = Token.location();
714 auto Name = Token.stringValue();
716 bool MachineBlockAddressTaken =
false;
718 bool IsLandingPad =
false;
719 bool IsInlineAsmBrIndirectTarget =
false;
720 bool IsEHFuncletEntry =
false;
721 std::optional<MBBSectionID> SectionID;
722 uint64_t Alignment = 0;
723 std::optional<UniqueBBID> BBID;
724 unsigned CallFrameSize = 0;
729 switch (Token.kind()) {
731 MachineBlockAddressTaken =
true;
735 if (parseIRBlockAddressTaken(AddressTakenIRBlock))
743 IsInlineAsmBrIndirectTarget =
true;
747 IsEHFuncletEntry =
true;
757 if (parseIRBlock(BB, MF.getFunction()))
762 if (parseSectionID(SectionID))
770 if (parseCallFrameSize(CallFrameSize))
785 MF.getFunction().getValueSymbolTable()->lookup(Name));
788 "' is not defined in the function '" +
791 auto *
MBB = MF.CreateMachineBasicBlock(BB, BBID);
793 bool WasInserted = MBBSlots.
insert(std::make_pair(
ID,
MBB)).second;
795 return error(
Loc,
Twine(
"redefinition of machine basic block with id #") +
799 if (MachineBlockAddressTaken)
801 if (AddressTakenIRBlock)
814bool MIParser::parseBasicBlockDefinitions(
820 if (Token.isErrorOrEOF())
821 return Token.isError();
823 return error(
"expected a basic block definition before instructions");
824 unsigned BraceDepth = 0;
826 if (parseBasicBlockDefinition(MBBSlots))
828 bool IsAfterNewline =
false;
832 Token.isErrorOrEOF())
835 return error(
"basic block definition should be located at the start of "
838 IsAfterNewline =
true;
841 IsAfterNewline =
false;
846 return error(
"extraneous closing brace ('}')");
852 if (!Token.isError() && BraceDepth)
853 return error(
"expected '}'");
854 }
while (!Token.isErrorOrEOF());
855 return Token.isError();
863 if (Token.isNewlineOrEOF())
867 return error(
"expected a named register");
869 if (parseNamedRegister(
Reg))
877 return error(
"expected a lane mask");
879 "Use correct get-function for lane mask");
882 return error(
"invalid lane mask value");
896 if (Token.isNewlineOrEOF())
900 return error(
"expected a machine basic block reference");
909 return error(
"expected an integer literal after '('");
943 bool ExplicitSuccessors =
false;
946 if (parseBasicBlockSuccessors(
MBB))
948 ExplicitSuccessors =
true;
950 if (parseBasicBlockLiveins(
MBB))
956 if (!Token.isNewlineOrEOF())
957 return error(
"expected line break at the end of a list");
962 bool IsInBundle =
false;
986 return error(
"nested instruction bundles are not allowed");
995 assert(Token.isNewlineOrEOF() &&
"MI is not fully parsed");
1000 if (!ExplicitSuccessors) {
1007 if (IsFallthrough) {
1008 AddFalthroughFrom = &
MBB;
1017bool MIParser::parseBasicBlocks() {
1022 if (Token.isErrorOrEOF())
1023 return Token.isError();
1032 if (AddFalthroughFrom) {
1036 AddFalthroughFrom =
nullptr;
1038 if (parseBasicBlock(*
MBB, AddFalthroughFrom))
1051 while (Token.isRegister() || Token.isRegisterFlag()) {
1052 auto Loc = Token.location();
1053 std::optional<unsigned> TiedDefIdx;
1054 if (parseRegisterOperand(MO, TiedDefIdx,
true))
1057 ParsedMachineOperand(MO,
Loc, Token.location(), TiedDefIdx));
1066 if (Token.isError() || parseInstruction(OpCode, Flags))
1079 auto Loc = Token.location();
1080 std::optional<unsigned> TiedDefIdx;
1081 if (parseMachineOperandAndTargetFlags(OpCode, Operands.
size(), MO, TiedDefIdx))
1084 ParsedMachineOperand(MO,
Loc, Token.location(), TiedDefIdx));
1089 return error(
"expected ',' before the next machine operand");
1093 MCSymbol *PreInstrSymbol =
nullptr;
1095 if (parsePreOrPostInstrSymbol(PreInstrSymbol))
1097 MCSymbol *PostInstrSymbol =
nullptr;
1099 if (parsePreOrPostInstrSymbol(PostInstrSymbol))
1101 MDNode *HeapAllocMarker =
nullptr;
1103 if (parseHeapAllocMarker(HeapAllocMarker))
1105 MDNode *PCSections =
nullptr;
1107 if (parsePCSections(PCSections))
1110 unsigned CFIType = 0;
1114 return error(
"expected an integer literal after 'cfi-type'");
1132 unsigned InstrNum = 0;
1136 return error(
"expected an integer literal after 'debug-instr-number'");
1153 if (parseDILocation(Node))
1156 return error(
"expected a metadata node after 'debug-location'");
1158 return error(
"referenced metadata is not a DILocation");
1166 while (!Token.isNewlineOrEOF()) {
1168 if (parseMachineMemoryOperand(
MemOp))
1171 if (Token.isNewlineOrEOF())
1176 return error(
"expected ',' before the next machine memory operand");
1181 const auto &
MCID = MF.getSubtarget().getInstrInfo()->get(OpCode);
1182 if (!
MCID.isVariadic()) {
1184 if (verifyImplicitOperands(Operands,
MCID))
1188 MI = MF.CreateMachineInstr(
MCID, DebugLocation,
true);
1189 MI->setFlags(Flags);
1193 for (
const auto &Operand : Operands)
1194 MI->addOperand(MF, Operand.Operand);
1196 if (assignRegisterTies(*
MI, Operands))
1199 MI->setPreInstrSymbol(MF, PreInstrSymbol);
1200 if (PostInstrSymbol)
1201 MI->setPostInstrSymbol(MF, PostInstrSymbol);
1202 if (HeapAllocMarker)
1203 MI->setHeapAllocMarker(MF, HeapAllocMarker);
1205 MI->setPCSections(MF, PCSections);
1207 MI->setCFIType(MF, CFIType);
1209 MI->setDeactivationSymbol(MF, DS);
1210 if (!MemOperands.
empty())
1211 MI->setMemRefs(MF, MemOperands);
1213 MI->setDebugInstrNum(InstrNum);
1220 return error(
"expected a machine basic block reference");
1226 "expected end of string after the machine basic block reference");
1230bool MIParser::parseStandaloneNamedRegister(
Register &
Reg) {
1233 return error(
"expected a named register");
1234 if (parseNamedRegister(
Reg))
1238 return error(
"expected end of string after the register reference");
1242bool MIParser::parseStandaloneVirtualRegister(
VRegInfo *&
Info) {
1245 return error(
"expected a virtual register");
1246 if (parseVirtualRegister(
Info))
1250 return error(
"expected end of string after the register reference");
1254bool MIParser::parseStandaloneRegister(
Register &
Reg) {
1258 return error(
"expected either a named or virtual register");
1266 return error(
"expected end of string after the register reference");
1270bool MIParser::parseStandaloneStackObject(
int &FI) {
1273 return error(
"expected a stack object");
1274 if (parseStackFrameIndex(FI))
1277 return error(
"expected end of string after the stack object reference");
1281bool MIParser::parseStandaloneMDNode(
MDNode *&Node) {
1287 if (parseDIExpression(Node))
1290 if (parseDILocation(Node))
1293 return error(
"expected a metadata node");
1295 return error(
"expected end of string after the metadata node");
1299bool MIParser::parseMachineMetadata() {
1302 return error(
"expected a metadata node");
1306 return error(
"expected metadata id after '!'");
1317 return error(
"expected a metadata node");
1321 if (parseMDTuple(MD, IsDistinct))
1324 auto FI = PFS.MachineForwardRefMDNodes.find(
ID);
1325 if (FI != PFS.MachineForwardRefMDNodes.end()) {
1326 FI->second.first->replaceAllUsesWith(MD);
1327 PFS.MachineForwardRefMDNodes.erase(FI);
1329 assert(PFS.MachineMetadataNodes[
ID] == MD &&
"Tracking VH didn't work");
1331 auto [It,
Inserted] = PFS.MachineMetadataNodes.try_emplace(
ID);
1333 return error(
"Metadata id is already used");
1334 It->second.reset(MD);
1340bool MIParser::parseMDTuple(
MDNode *&MD,
bool IsDistinct) {
1342 if (parseMDNodeVector(Elts))
1351 return error(
"expected '{' here");
1372 return error(
"expected end of metadata node");
1380bool MIParser::parseMetadata(
Metadata *&MD) {
1382 return error(
"expected '!' here");
1387 if (parseStringConstant(Str))
1394 return error(
"expected metadata id after '!'");
1396 SMLoc Loc = mapSMLoc(Token.location());
1403 auto NodeInfo = PFS.IRSlots.MetadataNodes.find(
ID);
1404 if (NodeInfo != PFS.IRSlots.MetadataNodes.end()) {
1405 MD = NodeInfo->second.get();
1409 NodeInfo = PFS.MachineMetadataNodes.find(
ID);
1410 if (NodeInfo != PFS.MachineMetadataNodes.end()) {
1411 MD = NodeInfo->second.get();
1415 auto &FwdRef = PFS.MachineForwardRefMDNodes[
ID];
1416 FwdRef = std::make_pair(
1418 PFS.MachineMetadataNodes[
ID].reset(FwdRef.first.get());
1419 MD = FwdRef.first.get();
1426 return MO.
isDef() ?
"implicit-def" :
"implicit";
1431 assert(
Reg.isPhysical() &&
"expected phys reg");
1438 for (
const auto &
I : Operands) {
1459 const auto *
TRI = MF.getSubtarget().getRegisterInfo();
1460 assert(
TRI &&
"Expected target register info");
1461 for (
const auto &
I : ImplicitOperands) {
1464 return error(Operands.
empty() ? Token.location() : Operands.
back().End,
1465 Twine(
"missing implicit register operand '") +
1472bool MIParser::parseInstruction(
unsigned &OpCode,
unsigned &Flags) {
1541 return error(
"expected a machine instruction");
1542 StringRef InstrName = Token.stringValue();
1543 if (PFS.Target.parseInstrName(InstrName, OpCode))
1544 return error(
Twine(
"unknown machine instruction name '") + InstrName +
"'");
1552 if (PFS.Target.getRegisterByName(Name,
Reg))
1553 return error(
Twine(
"unknown register name '") + Name +
"'");
1557bool MIParser::parseNamedVirtualRegister(
VRegInfo *&
Info) {
1562 Info = &PFS.getVRegInfoNamed(Name);
1568 return parseNamedVirtualRegister(
Info);
1573 Info = &PFS.getVRegInfo(
ID);
1578 switch (Token.kind()) {
1583 return parseNamedRegister(
Reg);
1586 if (parseVirtualRegister(
Info))
1596bool MIParser::parseRegisterClassOrBank(
VRegInfo &RegInfo) {
1598 return error(
"expected '_', register class, or register bank name");
1607 switch (RegInfo.
Kind) {
1613 return error(
Loc,
Twine(
"conflicting register classes, previously: ") +
1622 return error(
Loc,
"register class specification on generic register");
1630 RegBank = PFS.Target.getRegBank(Name);
1632 return error(
Loc,
"expected '_', register class, or register bank name");
1637 switch (RegInfo.
Kind) {
1643 return error(
Loc,
"conflicting generic register banks");
1649 return error(
Loc,
"register bank specification on normal register");
1654bool MIParser::parseRegisterFlag(
unsigned &Flags) {
1655 const unsigned OldFlags =
Flags;
1656 switch (Token.kind()) {
1690 if (OldFlags == Flags)
1693 return error(
"duplicate '" + Token.stringValue() +
"' register flag");
1698bool MIParser::parseSubRegisterIndex(
unsigned &
SubReg) {
1702 return error(
"expected a subregister index after '.'");
1703 auto Name = Token.stringValue();
1704 SubReg = PFS.Target.getSubRegIndex(Name);
1706 return error(
Twine(
"use of unknown subregister index '") + Name +
"'");
1711bool MIParser::parseRegisterTiedDefIndex(
unsigned &TiedDefIdx) {
1715 return error(
"expected an integer literal after 'tied-def'");
1727 for (
unsigned I = 0,
E = Operands.
size();
I !=
E; ++
I) {
1728 if (!Operands[
I].TiedDefIdx)
1732 unsigned DefIdx = *Operands[
I].TiedDefIdx;
1734 return error(Operands[
I].Begin,
1735 Twine(
"use of invalid tied-def operand index '" +
1736 Twine(DefIdx) +
"'; instruction has only ") +
1738 const auto &DefOperand = Operands[DefIdx].Operand;
1739 if (!DefOperand.isReg() || !DefOperand.isDef())
1741 return error(Operands[
I].Begin,
1742 Twine(
"use of invalid tied-def operand index '") +
1743 Twine(DefIdx) +
"'; the operand #" +
Twine(DefIdx) +
1744 " isn't a defined register");
1746 for (
const auto &TiedPair : TiedRegisterPairs) {
1747 if (TiedPair.first == DefIdx)
1748 return error(Operands[
I].Begin,
1749 Twine(
"the tied-def operand #") +
Twine(DefIdx) +
1750 " is already tied with another register operand");
1752 TiedRegisterPairs.push_back(std::make_pair(DefIdx,
I));
1756 for (
const auto &TiedPair : TiedRegisterPairs)
1757 MI.tieOperands(TiedPair.first, TiedPair.second);
1762 std::optional<unsigned> &TiedDefIdx,
1765 while (Token.isRegisterFlag()) {
1766 if (parseRegisterFlag(Flags))
1769 if (!Token.isRegister())
1770 return error(
"expected a register after register flags");
1773 if (parseRegister(
Reg, RegInfo))
1778 if (parseSubRegisterIndex(
SubReg))
1781 return error(
"subregister index expects a virtual register");
1785 return error(
"register class specification expects a virtual register");
1787 if (parseRegisterClassOrBank(*RegInfo))
1794 if (!parseRegisterTiedDefIndex(Idx))
1799 if (parseLowLevelType(Token.location(), Ty))
1800 return error(
"expected tied-def or low-level type after '('");
1805 if (
MRI.getType(
Reg).isValid() &&
MRI.getType(
Reg) != Ty)
1806 return error(
"inconsistent type for generic virtual register");
1810 MRI.noteNewVirtualRegister(
Reg);
1816 return error(
"unexpected type on physical register");
1819 if (parseLowLevelType(Token.location(), Ty))
1825 if (
MRI.getType(
Reg).isValid() &&
MRI.getType(
Reg) != Ty)
1826 return error(
"inconsistent type for generic virtual register");
1836 return error(
"generic virtual registers must have a type");
1841 return error(
"cannot have a killed def operand");
1844 return error(
"cannot have a dead use operand");
1858 const APSInt &
Int = Token.integerValue();
1859 if (
auto SImm =
Int.trySExtValue();
Int.isSigned() && SImm.has_value())
1861 else if (
auto UImm =
Int.tryZExtValue(); !
Int.isSigned() && UImm.has_value())
1864 return error(
"integer literal is too large to be an immediate operand");
1869bool MIParser::parseTargetImmMnemonic(
const unsigned OpCode,
1870 const unsigned OpIdx,
1874 auto Loc = Token.location();
1880 Len += Token.range().size();
1889 Src =
StringRef(
Loc, Len + Token.stringValue().size());
1894 ->
bool { return error(Loc, Msg); }))
1906 auto Source = StringValue.
str();
1911 return ErrCB(
Loc + Err.getColumnNo(), Err.getMessage());
1917 return ::parseIRConstant(
1918 Loc, StringValue, PFS,
C,
1945 if (Token.range().front() ==
's' || Token.range().front() ==
'p') {
1948 return error(
"expected integers after 's'/'p' type character");
1951 if (Token.range().front() ==
's') {
1955 return error(
"invalid size for scalar type");
1962 }
else if (Token.range().front() ==
'p') {
1966 return error(
"invalid address space number");
1975 return error(
Loc,
"expected sN, pA, <M x sN>, <M x pA>, <vscale x M x sN>, "
1976 "or <vscale x M x pA> for GlobalISel type");
1984 return error(
"expected <vscale x M x sN> or <vscale x M x pA>");
1988 auto GetError = [
this, &HasVScale,
Loc]() {
1991 Loc,
"expected <vscale x M x sN> or <vscale M x pA> for vector type");
1992 return error(
Loc,
"expected <M x sN> or <M x pA> for vector type");
1997 uint64_t NumElements = Token.integerValue().getZExtValue();
1999 return error(
"invalid number of vector elements");
2007 if (Token.range().front() !=
's' && Token.range().front() !=
'p')
2012 return error(
"expected integers after 's'/'p' type character");
2014 if (Token.range().front() ==
's') {
2017 return error(
"invalid size for scalar element in vector");
2019 }
else if (Token.range().front() ==
'p') {
2023 return error(
"invalid address space number");
2042 if (TypeStr.
front() !=
'i' && TypeStr.
front() !=
's' &&
2043 TypeStr.
front() !=
'p')
2045 "a typed immediate operand should start with one of 'i', 's', or 'p'");
2048 return error(
"expected integers after 'i'/'s'/'p' type character");
2050 auto Loc = Token.location();
2054 !(Token.range() ==
"true" || Token.range() ==
"false"))
2055 return error(
"expected an integer literal");
2065 auto Loc = Token.location();
2069 return error(
"expected a floating point literal");
2080 assert(S[0] ==
'0' && tolower(S[1]) ==
'x');
2082 if (!isxdigit(S[2]))
2085 APInt A(V.size()*4, V, 16);
2089 unsigned NumBits = (
A == 0) ? 32 :
A.getActiveBits();
2100 return ErrCB(Token.
location(),
"expected 32-bit integer (too large)");
2108 if (
A.getBitWidth() > 32)
2109 return ErrCB(Token.
location(),
"expected 32-bit integer (too large)");
2110 Result =
A.getZExtValue();
2116bool MIParser::getUnsigned(
unsigned &Result) {
2117 return ::getUnsigned(
2129 auto MBBInfo = PFS.MBBSlots.find(
Number);
2130 if (MBBInfo == PFS.MBBSlots.end())
2131 return error(
Twine(
"use of undefined machine basic block #") +
2133 MBB = MBBInfo->second;
2136 if (!Token.stringValue().empty() && Token.stringValue() !=
MBB->
getName())
2138 " isn't '" + Token.stringValue() +
"'");
2151bool MIParser::parseStackFrameIndex(
int &FI) {
2156 auto ObjectInfo = PFS.StackObjectSlots.find(
ID);
2157 if (ObjectInfo == PFS.StackObjectSlots.end())
2161 if (
const auto *Alloca =
2162 MF.getFrameInfo().getObjectAllocation(ObjectInfo->second))
2163 Name = Alloca->getName();
2164 if (!Token.stringValue().empty() && Token.stringValue() != Name)
2166 "' isn't '" + Token.stringValue() +
"'");
2168 FI = ObjectInfo->second;
2174 if (parseStackFrameIndex(FI))
2180bool MIParser::parseFixedStackFrameIndex(
int &FI) {
2185 auto ObjectInfo = PFS.FixedStackObjectSlots.find(
ID);
2186 if (ObjectInfo == PFS.FixedStackObjectSlots.end())
2187 return error(
Twine(
"use of undefined fixed stack object '%fixed-stack.") +
2190 FI = ObjectInfo->second;
2194bool MIParser::parseFixedStackObjectOperand(
MachineOperand &Dest) {
2196 if (parseFixedStackFrameIndex(FI))
2205 switch (Token.
kind()) {
2210 return ErrCB(Token.
location(),
Twine(
"use of undefined global value '") +
2211 Token.
range() +
"'");
2220 return ErrCB(Token.
location(),
Twine(
"use of undefined global value '@") +
2221 Twine(GVIdx) +
"'");
2230bool MIParser::parseGlobalValue(
GlobalValue *&GV) {
2231 return ::parseGlobalValue(
2244 if (parseOperandsOffset(Dest))
2249bool MIParser::parseConstantPoolIndexOperand(
MachineOperand &Dest) {
2256 return error(
"use of undefined constant '%const." +
Twine(
ID) +
"'");
2259 if (parseOperandsOffset(Dest))
2269 auto JumpTableEntryInfo = PFS.JumpTableSlots.find(
ID);
2270 if (JumpTableEntryInfo == PFS.JumpTableSlots.end())
2271 return error(
"use of undefined jump table '%jump-table." +
Twine(
ID) +
"'");
2279 const char *
Symbol = MF.createExternalSymbolName(Token.stringValue());
2282 if (parseOperandsOffset(Dest))
2292 if (parseOperandsOffset(Dest))
2297bool MIParser::parseSubRegisterIndexOperand(
MachineOperand &Dest) {
2300 unsigned SubRegIndex = PFS.Target.getSubRegIndex(Token.stringValue());
2301 if (SubRegIndex == 0)
2302 return error(
Twine(
"unknown subregister index '") + Name +
"'");
2308bool MIParser::parseMDNode(
MDNode *&Node) {
2311 auto Loc = Token.location();
2314 return error(
"expected metadata id after '!'");
2318 auto NodeInfo = PFS.IRSlots.MetadataNodes.find(
ID);
2319 if (NodeInfo == PFS.IRSlots.MetadataNodes.end()) {
2320 NodeInfo = PFS.MachineMetadataNodes.find(
ID);
2321 if (NodeInfo == PFS.MachineMetadataNodes.end())
2325 Node = NodeInfo->second.get();
2329bool MIParser::parseDIExpression(
MDNode *&Expr) {
2332 CurrentSource,
Read,
Error, *PFS.MF.getFunction().getParent(),
2334 CurrentSource = CurrentSource.substr(
Read);
2341bool MIParser::parseDILocation(
MDNode *&
Loc) {
2345 bool HaveLine =
false;
2347 unsigned Column = 0;
2349 MDNode *InlinedAt =
nullptr;
2350 bool ImplicitCode =
false;
2351 uint64_t AtomGroup = 0;
2352 uint64_t AtomRank = 0;
2360 if (Token.stringValue() ==
"line") {
2365 Token.integerValue().isSigned())
2366 return error(
"expected unsigned integer");
2367 Line = Token.integerValue().getZExtValue();
2372 if (Token.stringValue() ==
"column") {
2377 Token.integerValue().isSigned())
2378 return error(
"expected unsigned integer");
2379 Column = Token.integerValue().getZExtValue();
2383 if (Token.stringValue() ==
"scope") {
2388 return error(
"expected metadata node");
2390 return error(
"expected DIScope node");
2393 if (Token.stringValue() ==
"inlinedAt") {
2401 if (parseDILocation(InlinedAt))
2404 return error(
"expected metadata node");
2406 return error(
"expected DILocation node");
2409 if (Token.stringValue() ==
"isImplicitCode") {
2414 return error(
"expected true/false");
2418 if (Token.stringValue() ==
"true")
2419 ImplicitCode =
true;
2420 else if (Token.stringValue() ==
"false")
2421 ImplicitCode =
false;
2423 return error(
"expected true/false");
2427 if (Token.stringValue() ==
"atomGroup") {
2432 Token.integerValue().isSigned())
2433 return error(
"expected unsigned integer");
2434 AtomGroup = Token.integerValue().getZExtValue();
2438 if (Token.stringValue() ==
"atomRank") {
2443 Token.integerValue().isSigned())
2444 return error(
"expected unsigned integer");
2445 AtomRank = Token.integerValue().getZExtValue();
2450 return error(
Twine(
"invalid DILocation argument '") +
2451 Token.stringValue() +
"'");
2459 return error(
"DILocation requires line number");
2461 return error(
"DILocation requires a scope");
2464 InlinedAt, ImplicitCode, AtomGroup, AtomRank);
2474 if (parseDIExpression(Node))
2481bool MIParser::parseCFIOffset(
int &
Offset) {
2483 return error(
"expected a cfi offset");
2484 if (Token.integerValue().getSignificantBits() > 32)
2485 return error(
"expected a 32 bit integer (the cfi offset is too large)");
2486 Offset = (int)Token.integerValue().getExtValue();
2491bool MIParser::parseCFIRegister(
unsigned &
Reg) {
2493 return error(
"expected a cfi register");
2495 if (parseNamedRegister(LLVMReg))
2497 const auto *
TRI = MF.getSubtarget().getRegisterInfo();
2498 assert(
TRI &&
"Expected target register info");
2499 int DwarfReg =
TRI->getDwarfRegNum(LLVMReg,
true);
2501 return error(
"invalid DWARF register");
2502 Reg = (unsigned)DwarfReg;
2507bool MIParser::parseCFIAddressSpace(
unsigned &
AddressSpace) {
2509 return error(
"expected a cfi address space literal");
2510 if (Token.integerValue().isSigned())
2511 return error(
"expected an unsigned integer (cfi address space)");
2517bool MIParser::parseCFIEscapeValues(std::string &Values) {
2520 return error(
"expected a hexadecimal literal");
2524 if (
Value > UINT8_MAX)
2525 return error(
"expected a 8-bit integer (too large)");
2526 Values.push_back(
static_cast<uint8_t
>(
Value));
2533 auto Kind = Token.kind();
2541 if (parseCFIRegister(
Reg))
2556 CFIIndex = MF.addFrameInst(
2560 if (parseCFIRegister(
Reg))
2566 if (parseCFIOffset(
Offset))
2572 if (parseCFIOffset(
Offset))
2574 CFIIndex = MF.addFrameInst(
2596 if (parseCFIRegister(
Reg))
2604 if (parseCFIRegister(
Reg))
2611 parseCFIRegister(Reg2))
2630 if (parseCFIEscapeValues(Values))
2644 switch (Token.kind()) {
2647 F.getValueSymbolTable()->lookup(Token.stringValue()));
2649 return error(
Twine(
"use of undefined IR block '") + Token.range() +
"'");
2653 unsigned SlotNumber = 0;
2656 BB =
const_cast<BasicBlock *
>(getIRBlock(SlotNumber,
F));
2658 return error(
Twine(
"use of undefined IR block '%ir-block.") +
2659 Twine(SlotNumber) +
"'");
2675 return error(
"expected a global value");
2681 return error(
"expected an IR function reference");
2687 return error(
"expected an IR block reference");
2688 if (parseIRBlock(BB, *
F))
2694 if (parseOperandsOffset(Dest))
2703 return error(
"expected syntax intrinsic(@llvm.whatever)");
2706 return error(
"expected syntax intrinsic(@llvm.whatever)");
2708 std::string
Name = std::string(Token.stringValue());
2712 return error(
"expected ')' to terminate intrinsic name");
2717 return error(
"unknown intrinsic name");
2729 return error(
"expected syntax intpred(whatever) or floatpred(whatever");
2732 return error(
"whatever");
2755 return error(
"invalid floating-point predicate");
2770 return error(
"invalid integer predicate");
2776 return error(
"predicate should be terminated by ')'.");
2786 return error(
"expected syntax shufflemask(<integer or undef>, ...)");
2793 const APSInt &
Int = Token.integerValue();
2796 return error(
"expected integer constant");
2802 return error(
"shufflemask should be terminated by ')'.");
2804 if (ShufMask.
size() < 2)
2805 return error(
"shufflemask should have > 1 element");
2817 return error(
"expected syntax dbg-instr-ref(<unsigned>, <unsigned>)");
2820 return error(
"expected unsigned integer for instruction index");
2821 uint64_t InstrIdx = Token.integerValue().getZExtValue();
2822 assert(InstrIdx <= std::numeric_limits<unsigned>::max() &&
2823 "Instruction reference's instruction index is too large");
2827 return error(
"expected syntax dbg-instr-ref(<unsigned>, <unsigned>)");
2830 return error(
"expected unsigned integer for operand index");
2831 uint64_t
OpIdx = Token.integerValue().getZExtValue();
2832 assert(
OpIdx <= std::numeric_limits<unsigned>::max() &&
2833 "Instruction reference's operand index is too large");
2837 return error(
"expected syntax dbg-instr-ref(<unsigned>, <unsigned>)");
2849 return error(
"expected the name of the target index");
2851 if (PFS.Target.getTargetIndex(Token.stringValue(), Index))
2852 return error(
"use of undefined target index '" + Token.stringValue() +
"'");
2857 if (parseOperandsOffset(Dest))
2862bool MIParser::parseCustomRegisterMaskOperand(
MachineOperand &Dest) {
2863 assert(Token.stringValue() ==
"CustomRegMask" &&
"Expected a custom RegMask");
2868 uint32_t *
Mask = MF.allocateRegMask();
2872 return error(
"expected a named register");
2874 if (parseNamedRegister(
Reg))
2889bool MIParser::parseLiveoutRegisterMaskOperand(
MachineOperand &Dest) {
2891 uint32_t *
Mask = MF.allocateRegMask();
2897 return error(
"expected a named register");
2899 if (parseNamedRegister(
Reg))
2914bool MIParser::parseMachineOperand(
const unsigned OpCode,
const unsigned OpIdx,
2916 std::optional<unsigned> &TiedDefIdx) {
2917 switch (Token.kind()) {
2932 return parseRegisterOperand(Dest, TiedDefIdx);
2934 return parseImmediateOperand(Dest);
2942 return parseFPImmediateOperand(Dest);
2944 return parseMBBOperand(Dest);
2946 return parseStackObjectOperand(Dest);
2948 return parseFixedStackObjectOperand(Dest);
2951 return parseGlobalAddressOperand(Dest);
2953 return parseConstantPoolIndexOperand(Dest);
2955 return parseJumpTableIndexOperand(Dest);
2957 return parseExternalSymbolOperand(Dest);
2959 return parseMCSymbolOperand(Dest);
2961 return parseSubRegisterIndexOperand(Dest);
2964 return parseMetadataOperand(Dest);
2982 return parseCFIOperand(Dest);
2984 return parseBlockAddressOperand(Dest);
2986 return parseIntrinsicOperand(Dest);
2988 return parseTargetIndexOperand(Dest);
2990 return parseLiveoutRegisterMaskOperand(Dest);
2993 return parsePredicateOperand(Dest);
2995 return parseShuffleMaskOperand(Dest);
2997 return parseDbgInstrRefOperand(Dest);
3001 if (
const auto *RegMask = PFS.Target.getRegMask(Token.stringValue())) {
3005 }
else if (Token.stringValue() ==
"CustomRegMask") {
3006 return parseCustomRegisterMaskOperand(Dest);
3008 return parseTypedImmediateOperand(Dest);
3010 const auto *
TII = MF.getSubtarget().getInstrInfo();
3011 if (
const auto *Formatter =
TII->getMIRFormatter()) {
3012 return parseTargetImmMnemonic(OpCode,
OpIdx, Dest, *Formatter);
3018 return error(
"expected a machine operand");
3023bool MIParser::parseMachineOperandAndTargetFlags(
3025 std::optional<unsigned> &TiedDefIdx) {
3027 bool HasTargetFlags =
false;
3029 HasTargetFlags =
true;
3034 return error(
"expected the name of the target flag");
3035 if (PFS.Target.getDirectTargetFlag(Token.stringValue(), TF)) {
3036 if (PFS.Target.getBitmaskTargetFlag(Token.stringValue(), TF))
3037 return error(
"use of undefined target flag '" + Token.stringValue() +
3044 return error(
"expected the name of the target flag");
3045 unsigned BitFlag = 0;
3046 if (PFS.Target.getBitmaskTargetFlag(Token.stringValue(), BitFlag))
3047 return error(
"use of undefined target flag '" + Token.stringValue() +
3056 auto Loc = Token.location();
3057 if (parseMachineOperand(OpCode,
OpIdx, Dest, TiedDefIdx))
3059 if (!HasTargetFlags)
3062 return error(
Loc,
"register operands can't have target flags");
3067bool MIParser::parseOffset(int64_t &
Offset) {
3074 return error(
"expected an integer literal after '" + Sign +
"'");
3075 if (Token.integerValue().getSignificantBits() > 64)
3076 return error(
"expected 64-bit integer (too large)");
3077 Offset = Token.integerValue().getExtValue();
3084bool MIParser::parseIRBlockAddressTaken(
BasicBlock *&BB) {
3088 return error(
"expected basic block after 'ir_block_address_taken'");
3090 if (parseIRBlock(BB, MF.getFunction()))
3097bool MIParser::parseAlignment(uint64_t &Alignment) {
3101 return error(
"expected an integer literal after 'align'");
3102 if (getUint64(Alignment))
3107 return error(
"expected a power-of-2 literal after 'align'");
3112bool MIParser::parseAddrspace(
unsigned &Addrspace) {
3116 return error(
"expected an integer literal after 'addrspace'");
3133 switch (Token.
kind()) {
3139 unsigned SlotNumber = 0;
3167 return ErrCB(Token.
location(),
Twine(
"use of undefined IR value '") + Token.
range() +
"'");
3171bool MIParser::parseIRValue(
const Value *&V) {
3172 return ::parseIRValue(
3178bool MIParser::getUint64(uint64_t &Result) {
3179 if (Token.hasIntegerValue()) {
3180 if (Token.integerValue().getActiveBits() > 64)
3181 return error(
"expected 64-bit integer (too large)");
3182 Result = Token.integerValue().getZExtValue();
3189 if (
A.getBitWidth() > 64)
3190 return error(
"expected 64-bit integer (too large)");
3197bool MIParser::getHexUint(
APInt &Result) {
3198 return ::getHexUint(Token, Result);
3202 const auto OldFlags =
Flags;
3203 switch (Token.kind()) {
3218 if (PFS.Target.getMMOTargetFlag(Token.stringValue(), TF))
3219 return error(
"use of undefined target MMO flag '" + Token.stringValue() +
3227 if (OldFlags == Flags)
3230 return error(
"duplicate '" + Token.stringValue() +
"' memory operand flag");
3236 switch (Token.kind()) {
3238 PSV = MF.getPSVManager().getStack();
3241 PSV = MF.getPSVManager().getGOT();
3244 PSV = MF.getPSVManager().getJumpTable();
3247 PSV = MF.getPSVManager().getConstantPool();
3251 if (parseFixedStackFrameIndex(FI))
3253 PSV = MF.getPSVManager().getFixedStack(FI);
3259 if (parseStackFrameIndex(FI))
3261 PSV = MF.getPSVManager().getFixedStack(FI);
3267 switch (Token.kind()) {
3273 PSV = MF.getPSVManager().getGlobalValueCallEntry(GV);
3277 PSV = MF.getPSVManager().getExternalSymbolCallEntry(
3278 MF.createExternalSymbolName(Token.stringValue()));
3282 "expected a global value or an external symbol after 'call-entry'");
3287 const auto *
TII = MF.getSubtarget().getInstrInfo();
3288 if (
const auto *Formatter =
TII->getMIRFormatter()) {
3289 if (Formatter->parseCustomPseudoSourceValue(
3290 Token.stringValue(), MF, PFS, PSV,
3292 return error(Loc, Msg);
3296 return error(
"unable to parse target custom pseudo source value");
3312 if (parseMemoryPseudoSourceValue(PSV))
3325 return error(
"expected an IR value reference");
3326 const Value *
V =
nullptr;
3329 if (V && !
V->getType()->isPointerTy())
3330 return error(
"expected a pointer IR value");
3345 return error(
"expected '(' in syncscope");
3348 if (parseStringConstant(SSN))
3351 SSID =
Context.getOrInsertSyncScopeID(SSN);
3353 return error(
"expected ')' in syncscope");
3359bool MIParser::parseOptionalAtomicOrdering(
AtomicOrdering &Order) {
3378 return error(
"expected an atomic scope, ordering or a size specification");
3385 while (Token.isMemoryOperandFlag()) {
3386 if (parseMemoryOperandFlag(Flags))
3390 (Token.stringValue() !=
"load" && Token.stringValue() !=
"store"))
3391 return error(
"expected 'load' or 'store' memory operation");
3392 if (Token.stringValue() ==
"load")
3406 if (parseOptionalScope(MF.getFunction().getContext(), SSID))
3411 if (parseOptionalAtomicOrdering(Order))
3414 if (parseOptionalAtomicOrdering(FailureOrder))
3420 return error(
"expected memory LLT, the size integer literal or 'unknown-size' after "
3421 "memory operation");
3426 if (getUint64(
Size))
3437 if (parseLowLevelType(Token.location(), MemoryType))
3450 if (Token.stringValue() != Word)
3451 return error(
Twine(
"expected '") + Word +
"'");
3454 if (parseMachinePointerInfo(Ptr))
3457 uint64_t BaseAlignment =
3464 switch (Token.kind()) {
3470 if (Ptr.
Offset & (Alignment - 1)) {
3475 return error(
"specified alignment is more aligned than offset");
3477 BaseAlignment = Alignment;
3516 return error(
"expected 'align' or '!tbaa' or '!alias.scope' or "
3517 "'!noalias' or '!range' or '!noalias.addrspace'");
3522 Dest = MF.getMachineMemOperand(Ptr, Flags, MemoryType,
Align(BaseAlignment),
3523 AAInfo,
Range, SSID, Order, FailureOrder);
3527bool MIParser::parsePreOrPostInstrSymbol(
MCSymbol *&Symbol) {
3530 "Invalid token for a pre- post-instruction symbol!");
3533 return error(
"expected a symbol after 'pre-instr-symbol'");
3534 Symbol = getOrCreateMCSymbol(Token.stringValue());
3540 return error(
"expected ',' before the next machine operand");
3545bool MIParser::parseHeapAllocMarker(
MDNode *&Node) {
3547 "Invalid token for a heap alloc marker!");
3552 return error(
"expected a MDNode after 'heap-alloc-marker'");
3557 return error(
"expected ',' before the next machine operand");
3562bool MIParser::parsePCSections(
MDNode *&Node) {
3564 "Invalid token for a PC sections!");
3569 return error(
"expected a MDNode after 'pcsections'");
3574 return error(
"expected ',' before the next machine operand");
3584 for (
const auto &BB :
F) {
3590 Slots2BasicBlocks.
insert(std::make_pair(
unsigned(Slot), &BB));
3597 return Slots2BasicBlocks.
lookup(Slot);
3600const BasicBlock *MIParser::getIRBlock(
unsigned Slot) {
3601 if (Slots2BasicBlocks.empty())
3607 if (&
F == &MF.getFunction())
3608 return getIRBlock(Slot);
3620 return MF.getContext().getOrCreateSymbol(Name);
3623bool MIParser::parseStringConstant(std::string &Result) {
3625 return error(
"expected string constant");
3626 Result = std::string(Token.stringValue());
3634 return MIParser(PFS,
Error, Src).parseBasicBlockDefinitions(PFS.
MBBSlots);
3639 return MIParser(PFS,
Error, Src).parseBasicBlocks();
3645 return MIParser(PFS,
Error, Src).parseStandaloneMBB(
MBB);
3651 return MIParser(PFS,
Error, Src).parseStandaloneRegister(Reg);
3657 return MIParser(PFS,
Error, Src).parseStandaloneNamedRegister(Reg);
3663 return MIParser(PFS,
Error, Src).parseStandaloneVirtualRegister(Info);
3669 return MIParser(PFS,
Error, Src).parseStandaloneStackObject(FI);
3674 return MIParser(PFS,
Error, Src).parseStandaloneMDNode(
Node);
3679 return MIParser(PFS,
Error, Src, SrcRange).parseMachineMetadata();
3687 ErrorCallback(
Loc, Msg);
3691 return ::parseIRValue(Token, PFS, V, ErrorCallback);
unsigned const MachineRegisterInfo * MRI
assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")
This file defines the StringMap class.
This file implements a class to represent arbitrary precision integral constant values and operations...
This file implements the APSInt class, which is a simple class that represents an arbitrary sized int...
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
Atomic ordering constants.
static GCRegistry::Add< ErlangGC > A("erlang", "erlang-compatible garbage collector")
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
Analysis containing CSE Info
This file contains the declarations for the subclasses of Constant, which represent the different fla...
static Error parseAlignment(StringRef Str, Align &Alignment, StringRef Name, bool AllowZero=false)
Attempts to parse an alignment component of a specification.
This file defines the DenseMap class.
const HexagonInstrInfo * TII
Module.h This file contains the declarations for the Module class.
A common definition of LaneBitmask for use in TableGen and CodeGen.
static llvm::Error parse(DataExtractor &Data, uint64_t BaseAddr, LineEntryCallback const &Callback)
Implement a low-level type suitable for MachineInstr level instruction selection.
static const char * printImplicitRegisterFlag(const MachineOperand &MO)
static const BasicBlock * getIRBlockFromSlot(unsigned Slot, const DenseMap< unsigned, const BasicBlock * > &Slots2BasicBlocks)
static std::string getRegisterName(const TargetRegisterInfo *TRI, Register Reg)
static bool parseIRConstant(StringRef::iterator Loc, StringRef StringValue, PerFunctionMIParsingState &PFS, const Constant *&C, ErrorCallbackType ErrCB)
static void initSlots2Values(const Function &F, DenseMap< unsigned, const Value * > &Slots2Values)
Creates the mapping from slot numbers to function's unnamed IR values.
static bool parseIRValue(const MIToken &Token, PerFunctionMIParsingState &PFS, const Value *&V, ErrorCallbackType ErrCB)
static bool verifyScalarSize(uint64_t Size)
static bool getUnsigned(const MIToken &Token, unsigned &Result, ErrorCallbackType ErrCB)
static bool getHexUint(const MIToken &Token, APInt &Result)
static bool verifyVectorElementCount(uint64_t NumElts)
static void mapValueToSlot(const Value *V, ModuleSlotTracker &MST, DenseMap< unsigned, const Value * > &Slots2Values)
static void initSlots2BasicBlocks(const Function &F, DenseMap< unsigned, const BasicBlock * > &Slots2BasicBlocks)
function_ref< bool(StringRef::iterator Loc, const Twine &)> ErrorCallbackType
static bool isImplicitOperandIn(const MachineOperand &ImplicitOperand, ArrayRef< ParsedMachineOperand > Operands)
Return true if the parsed machine operands contain a given machine operand.
static bool parseGlobalValue(const MIToken &Token, PerFunctionMIParsingState &PFS, GlobalValue *&GV, ErrorCallbackType ErrCB)
static bool verifyAddrSpace(uint64_t AddrSpace)
Register const TargetRegisterInfo * TRI
Promote Memory to Register
MachineInstr unsigned OpIdx
ConstantRange Range(APInt(BitWidth, Low), APInt(BitWidth, High))
static bool parseMetadata(const StringRef &Input, uint64_t &FunctionHash, uint32_t &Attributes)
Parse Input that contains metadata.
This file defines the SmallVector class.
This file implements the StringSwitch template, which mimics a switch() statement whose cases are str...
Class for arbitrary precision integers.
uint64_t getZExtValue() const
Get zero extended value.
uint64_t getLimitedValue(uint64_t Limit=UINT64_MAX) const
If this value is smaller than the specified limit, return it, otherwise return the limit value.
An arbitrary precision integer that knows its signedness.
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
const T & back() const
back - Get the last element.
size_t size() const
size - Get the array size.
bool empty() const
empty - Check if the array is empty.
LLVM Basic Block Representation.
static LLVM_ABI BlockAddress * get(Function *F, BasicBlock *BB)
Return a BlockAddress for the specified function and basic block.
static BranchProbability getRaw(uint32_t N)
Predicate
This enumeration lists the possible predicates for CmpInst subclasses.
@ FCMP_OEQ
0 0 0 1 True if ordered and equal
@ FCMP_TRUE
1 1 1 1 Always true (always folded)
@ ICMP_SLT
signed less than
@ ICMP_SLE
signed less or equal
@ FCMP_OLT
0 1 0 0 True if ordered and less than
@ FCMP_ULE
1 1 0 1 True if unordered, less than, or equal
@ FCMP_OGT
0 0 1 0 True if ordered and greater than
@ FCMP_OGE
0 0 1 1 True if ordered and greater than or equal
@ ICMP_UGE
unsigned greater or equal
@ ICMP_UGT
unsigned greater than
@ ICMP_SGT
signed greater than
@ FCMP_ULT
1 1 0 0 True if unordered or less than
@ FCMP_ONE
0 1 1 0 True if ordered and operands are unequal
@ FCMP_UEQ
1 0 0 1 True if unordered or equal
@ ICMP_ULT
unsigned less than
@ FCMP_UGT
1 0 1 0 True if unordered or greater than
@ FCMP_OLE
0 1 0 1 True if ordered and less than or equal
@ FCMP_ORD
0 1 1 1 True if ordered (no nans)
@ ICMP_SGE
signed greater or equal
@ FCMP_UNE
1 1 1 0 True if unordered or not equal
@ ICMP_ULE
unsigned less or equal
@ FCMP_UGE
1 0 1 1 True if unordered, greater than, or equal
@ FCMP_FALSE
0 0 0 0 Always false (always folded)
@ FCMP_UNO
1 0 0 0 True if unordered: isnan(X) | isnan(Y)
static bool isFPPredicate(Predicate P)
static bool isIntPredicate(Predicate P)
This is an important base class in LLVM.
A parsed version of the target data layout string in and methods for querying it.
ValueT lookup(const_arg_type_t< KeyT > Val) const
lookup - Return the entry for the specified key, or a default constructed value if no such entry exis...
std::pair< iterator, bool > insert(const std::pair< KeyT, ValueT > &KV)
static constexpr ElementCount get(ScalarTy MinVal, bool Scalable)
Lightweight error class with error context and mandatory checking.
ValueSymbolTable * getValueSymbolTable()
getSymbolTable() - Return the symbol table if any, otherwise nullptr.
Module * getParent()
Get the module that this global value is contained inside of...
static constexpr LLT vector(ElementCount EC, unsigned ScalarSizeInBits)
Get a low-level vector of some number of elements and element width.
static constexpr LLT scalar(unsigned SizeInBits)
Get a low-level scalar or aggregate "bag of bits".
static constexpr LLT pointer(unsigned AddressSpace, unsigned SizeInBits)
Get a low-level pointer in the given address space.
static constexpr LLT token()
Get a low-level token; just a scalar with zero bits (or no size).
This is an important class for using LLVM in a threaded context.
static MCCFIInstruction createDefCfaRegister(MCSymbol *L, unsigned Register, SMLoc Loc={})
.cfi_def_cfa_register modifies a rule for computing CFA.
static MCCFIInstruction createUndefined(MCSymbol *L, unsigned Register, SMLoc Loc={})
.cfi_undefined From now on the previous value of Register can't be restored anymore.
static MCCFIInstruction createRestore(MCSymbol *L, unsigned Register, SMLoc Loc={})
.cfi_restore says that the rule for Register is now the same as it was at the beginning of the functi...
static MCCFIInstruction createLLVMDefAspaceCfa(MCSymbol *L, unsigned Register, int64_t Offset, unsigned AddressSpace, SMLoc Loc)
.cfi_llvm_def_aspace_cfa defines the rule for computing the CFA to be the result of evaluating the DW...
static MCCFIInstruction createRegister(MCSymbol *L, unsigned Register1, unsigned Register2, SMLoc Loc={})
.cfi_register Previous value of Register1 is saved in register Register2.
static MCCFIInstruction cfiDefCfa(MCSymbol *L, unsigned Register, int64_t Offset, SMLoc Loc={})
.cfi_def_cfa defines a rule for computing CFA as: take address from Register and add Offset to it.
static MCCFIInstruction createOffset(MCSymbol *L, unsigned Register, int64_t Offset, SMLoc Loc={})
.cfi_offset Previous value of Register is saved at offset Offset from CFA.
static MCCFIInstruction createNegateRAStateWithPC(MCSymbol *L, SMLoc Loc={})
.cfi_negate_ra_state_with_pc AArch64 negate RA state with PC.
static MCCFIInstruction createNegateRAState(MCSymbol *L, SMLoc Loc={})
.cfi_negate_ra_state AArch64 negate RA state.
static MCCFIInstruction createRememberState(MCSymbol *L, SMLoc Loc={})
.cfi_remember_state Save all current rules for all registers.
static MCCFIInstruction cfiDefCfaOffset(MCSymbol *L, int64_t Offset, SMLoc Loc={})
.cfi_def_cfa_offset modifies a rule for computing CFA.
static MCCFIInstruction createEscape(MCSymbol *L, StringRef Vals, SMLoc Loc={}, StringRef Comment="")
.cfi_escape Allows the user to add arbitrary bytes to the unwind info.
static MCCFIInstruction createWindowSave(MCSymbol *L, SMLoc Loc={})
.cfi_window_save SPARC register window is saved.
static MCCFIInstruction createAdjustCfaOffset(MCSymbol *L, int64_t Adjustment, SMLoc Loc={})
.cfi_adjust_cfa_offset Same as .cfi_def_cfa_offset, but Offset is a relative value that is added/subt...
static MCCFIInstruction createRestoreState(MCSymbol *L, SMLoc Loc={})
.cfi_restore_state Restore the previously saved state.
static MCCFIInstruction createSameValue(MCSymbol *L, unsigned Register, SMLoc Loc={})
.cfi_same_value Current value of Register is the same as in the previous frame.
static MCCFIInstruction createRelOffset(MCSymbol *L, unsigned Register, int64_t Offset, SMLoc Loc={})
.cfi_rel_offset Previous value of Register is saved at offset Offset from the current CFA register.
Describe properties that are true of each instruction in the target description file.
MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...
static MDTuple * get(LLVMContext &Context, ArrayRef< Metadata * > MDs)
static LLVM_ABI MDString * get(LLVMContext &Context, StringRef Str)
static MDTuple * getDistinct(LLVMContext &Context, ArrayRef< Metadata * > MDs)
Return a distinct node.
static MDTuple * get(LLVMContext &Context, ArrayRef< Metadata * > MDs)
static TempMDTuple getTemporary(LLVMContext &Context, ArrayRef< Metadata * > MDs)
Return a temporary node.
void normalizeSuccProbs()
Normalize probabilities of all successors so that the sum of them becomes one.
void setAddressTakenIRBlock(BasicBlock *BB)
Set this block to reflect that it corresponds to an IR-level basic block with a BlockAddress.
LLVM_ABI instr_iterator insert(instr_iterator I, MachineInstr *M)
Insert MI into the instruction list before I, possibly inside a bundle.
void setCallFrameSize(unsigned N)
Set the call frame size on entry to this basic block.
void setAlignment(Align A)
Set alignment of the basic block.
LLVM_ABI void addSuccessor(MachineBasicBlock *Succ, BranchProbability Prob=BranchProbability::getUnknown())
Add Succ as a successor of this MachineBasicBlock.
void setSectionID(MBBSectionID V)
Sets the section ID for this basic block.
void setIsInlineAsmBrIndirectTarget(bool V=true)
Indicates if this is the indirect dest of an INLINEASM_BR.
void addLiveIn(MCRegister PhysReg, LaneBitmask LaneMask=LaneBitmask::getAll())
Adds the specified register as a live in.
void setIsEHFuncletEntry(bool V=true)
Indicates if this is the entry block of an EH funclet.
LLVM_ABI bool isSuccessor(const MachineBasicBlock *MBB) const
Return true if the specified MBB is a successor of this block.
LLVM_ABI StringRef getName() const
Return the name of the corresponding LLVM basic block, or an empty string.
void setMachineBlockAddressTaken()
Set this block to indicate that its address is used as something other than the target of a terminato...
void setIsEHPad(bool V=true)
Indicates the block is a landing pad.
Function & getFunction()
Return the LLVM function that this machine code represents.
Representation of each machine instruction.
void setFlag(MIFlag Flag)
Set a MI flag.
A description of a memory reference used in the backend.
Flags
Flags values. These may be or'd together.
@ MOVolatile
The memory access is volatile.
@ MODereferenceable
The memory access is dereferenceable (i.e., doesn't trap).
@ MOLoad
The memory access reads data.
@ MONonTemporal
The memory access is non-temporal.
@ MOInvariant
The memory access always returns the same value (or traps).
@ MOStore
The memory access writes data.
MachineOperand class - Representation of each machine instruction operand.
static MachineOperand CreateMCSymbol(MCSymbol *Sym, unsigned TargetFlags=0)
static MachineOperand CreateES(const char *SymName, unsigned TargetFlags=0)
static MachineOperand CreateFPImm(const ConstantFP *CFP)
static MachineOperand CreateCFIIndex(unsigned CFIIndex)
static MachineOperand CreateRegMask(const uint32_t *Mask)
CreateRegMask - Creates a register mask operand referencing Mask.
bool isReg() const
isReg - Tests if this is a MO_Register operand.
static MachineOperand CreateCImm(const ConstantInt *CI)
static MachineOperand CreateMetadata(const MDNode *Meta)
static MachineOperand CreatePredicate(unsigned Pred)
static MachineOperand CreateImm(int64_t Val)
static MachineOperand CreateShuffleMask(ArrayRef< int > Mask)
static MachineOperand CreateJTI(unsigned Idx, unsigned TargetFlags=0)
static MachineOperand CreateDbgInstrRef(unsigned InstrIdx, unsigned OpIdx)
static MachineOperand CreateRegLiveOut(const uint32_t *Mask)
static MachineOperand CreateGA(const GlobalValue *GV, int64_t Offset, unsigned TargetFlags=0)
static MachineOperand CreateBA(const BlockAddress *BA, int64_t Offset, unsigned TargetFlags=0)
void setTargetFlags(unsigned F)
LLVM_ABI bool isIdenticalTo(const MachineOperand &Other) const
Returns true if this operand is identical to the specified operand except for liveness related flags ...
static MachineOperand CreateCPI(unsigned Idx, int Offset, unsigned TargetFlags=0)
static MachineOperand CreateReg(Register Reg, bool isDef, bool isImp=false, bool isKill=false, bool isDead=false, bool isUndef=false, bool isEarlyClobber=false, unsigned SubReg=0, bool isDebug=false, bool isInternalRead=false, bool isRenamable=false)
static MachineOperand CreateTargetIndex(unsigned Idx, int64_t Offset, unsigned TargetFlags=0)
static MachineOperand CreateMBB(MachineBasicBlock *MBB, unsigned TargetFlags=0)
static MachineOperand CreateIntrinsicID(Intrinsic::ID ID)
static MachineOperand CreateFI(int Idx)
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
This interface provides simple read-only access to a block of memory, and provides simple methods for...
virtual StringRef getBufferIdentifier() const
Return an identifier for this buffer, typically the filename it was read from.
const char * getBufferEnd() const
const char * getBufferStart() const
Manage lifetime of a slot tracker for printing IR.
int getLocalSlot(const Value *V)
Return the slot number of the specified local value.
void incorporateFunction(const Function &F)
Incorporate the given function.
A Module instance is used to store all the information related to an LLVM module.
Special value supplied for machine level alias analysis.
const RegisterBank & getRegBank(unsigned ID)
Get the register bank identified by ID.
unsigned getNumRegBanks() const
Get the total number of register banks.
This class implements the register bank concept.
Wrapper class representing virtual and physical registers.
constexpr bool isVirtual() const
Return true if the specified register number is in the virtual register namespace.
constexpr unsigned id() const
Instances of this class encapsulate one diagnostic report, allowing printing to a raw_ostream as a ca...
Represents a location in source code.
static SMLoc getFromPointer(const char *Ptr)
Represents a range in source code.
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
void push_back(const T &Elt)
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
This owns the files read by a parser, handles include stacks, and handles diagnostic wrangling.
unsigned getMainFileID() const
const MemoryBuffer * getMemoryBuffer(unsigned i) const
LLVM_ABI SMDiagnostic GetMessage(SMLoc Loc, DiagKind Kind, const Twine &Msg, ArrayRef< SMRange > Ranges={}, ArrayRef< SMFixIt > FixIts={}) const
Return an SMDiagnostic at the specified location with the specified string.
bool insert(MapEntryTy *KeyValue)
insert - Insert the specified key/value pair into the map.
StringRef - Represent a constant reference to a string, i.e.
std::string str() const
str - Get the contents as an std::string.
constexpr StringRef substr(size_t Start, size_t N=npos) const
Return a reference to the substring from [Start, Start + N).
StringRef drop_front(size_t N=1) const
Return a StringRef equal to 'this' but with the first N elements dropped.
constexpr size_t size() const
size - Get the string size.
char front() const
front - Get the first character in the string.
LLVM_ABI std::string lower() const
A switch()-like statement whose cases are string literals.
StringSwitch & Case(StringLiteral S, T Value)
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
TargetSubtargetInfo - Generic base class for all target subtargets.
virtual const TargetInstrInfo * getInstrInfo() const
virtual const TargetRegisterInfo * getRegisterInfo() const =0
Return the target's register information.
Twine - A lightweight data structure for efficiently representing the concatenation of temporary valu...
LLVM_ABI std::string str() const
Return the twine contents as a std::string.
Value * lookup(StringRef Name) const
This method finds the value with the given Name in the the symbol table.
LLVM Value Representation.
An efficient, type-erasing, non-owning reference to a callable.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
constexpr std::underlying_type_t< E > Mask()
Get a bitmask with 1s in all places up to the high-order bit of E's largest value.
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
@ C
The default llvm calling convention, compatible with C.
@ BasicBlock
Various leaf nodes.
LLVM_ABI ID lookupIntrinsicID(StringRef Name)
This does the actual lookup of an intrinsic ID which matches the given function name.
@ Implicit
Not emitted register (e.g. carry, or temporary result).
@ Debug
Register 'use' is for debugging purpose.
@ Renamable
Register that may be renamed.
@ Define
Register definition.
@ InternalRead
Register reads a value that is defined inside the same instruction or bundle.
@ Kill
The last use of a register.
@ Undef
Value of the register doesn't matter.
@ EarlyClobber
Register definition happens before uses.
@ System
Synchronized with respect to all concurrently executing threads.
support::ulittle32_t Word
Scope
Defines the scope in which this symbol should be visible: Default – Visible in the public interface o...
NodeAddr< NodeBase * > Node
This is an optimization pass for GlobalISel generic memory operations.
FunctionAddr VTableAddr Value
bool parseStackObjectReference(PerFunctionMIParsingState &PFS, int &FI, StringRef Src, SMDiagnostic &Error)
bool parseMDNode(PerFunctionMIParsingState &PFS, MDNode *&Node, StringRef Src, SMDiagnostic &Error)
bool all_of(R &&range, UnaryPredicate P)
Provide wrappers to std::all_of which take ranges instead of having to pass begin/end explicitly.
decltype(auto) dyn_cast(const From &Val)
dyn_cast<X> - Return the argument parameter cast to the specified type.
StringRef lexMIToken(StringRef Source, MIToken &Token, function_ref< void(StringRef::iterator, const Twine &)> ErrorCallback)
Consume a single machine instruction token in the given source and return the remaining source string...
constexpr bool isPowerOf2_64(uint64_t Value)
Return true if the argument is a power of two > 0 (64 bit edition.)
bool parseMachineBasicBlockDefinitions(PerFunctionMIParsingState &PFS, StringRef Src, SMDiagnostic &Error)
Parse the machine basic block definitions, and skip the machine instructions.
LLVM_ABI void guessSuccessors(const MachineBasicBlock &MBB, SmallVectorImpl< MachineBasicBlock * > &Result, bool &IsFallthrough)
Determine a possible list of successors of a basic block based on the basic block machine operand bei...
bool parseMBBReference(PerFunctionMIParsingState &PFS, MachineBasicBlock *&MBB, StringRef Src, SMDiagnostic &Error)
uint64_t PowerOf2Ceil(uint64_t A)
Returns the power of two which is greater than or equal to the given value.
auto dyn_cast_or_null(const Y &Val)
LLVM_ABI DIExpression * parseDIExpressionBodyAtBeginning(StringRef Asm, unsigned &Read, SMDiagnostic &Err, const Module &M, const SlotMapping *Slots)
constexpr bool isUInt(uint64_t x)
Checks if an unsigned integer fits into the given bit width.
bool isa(const From &Val)
isa<X> - Return true if the parameter to the template is an instance of one of the template type argu...
AtomicOrdering
Atomic ordering for LLVM's memory model.
uint16_t MCPhysReg
An unsigned integer type large enough to represent all physical registers, but not necessarily virtua...
DWARFExpression::Operation Op
ArrayRef(const T &OneElt) -> ArrayRef< T >
std::string toString(const APInt &I, unsigned Radix, bool Signed, bool formatAsCLiteral=false, bool UpperCase=true, bool InsertSeparators=false)
bool parseMachineInstructions(PerFunctionMIParsingState &PFS, StringRef Src, SMDiagnostic &Error)
Parse the machine instructions.
bool parseRegisterReference(PerFunctionMIParsingState &PFS, Register &Reg, StringRef Src, SMDiagnostic &Error)
LLVM_ABI Constant * parseConstantValue(StringRef Asm, SMDiagnostic &Err, const Module &M, const SlotMapping *Slots=nullptr)
Parse a type and a constant value in the given string.
decltype(auto) cast(const From &Val)
cast<X> - Return the argument parameter cast to the specified type.
bool parseMachineMetadata(PerFunctionMIParsingState &PFS, StringRef Src, SMRange SourceRange, SMDiagnostic &Error)
bool parseVirtualRegisterReference(PerFunctionMIParsingState &PFS, VRegInfo *&Info, StringRef Src, SMDiagnostic &Error)
bool parseNamedRegisterReference(PerFunctionMIParsingState &PFS, Register &Reg, StringRef Src, SMDiagnostic &Error)
A collection of metadata nodes that might be associated with a memory access used by the alias-analys...
MDNode * NoAliasAddrSpace
The tag specifying the noalias address spaces.
MDNode * Scope
The tag for alias scope specification (used with noalias).
MDNode * TBAA
The tag for type-based alias analysis.
MDNode * NoAlias
The tag specifying the noalias scope.
This struct is a compact representation of a valid (non-zero power of two) alignment.
static constexpr LaneBitmask getAll()
LLVM_ABI static const MBBSectionID ExceptionSectionID
LLVM_ABI static const MBBSectionID ColdSectionID
A token produced by the machine instruction lexer.
bool hasIntegerValue() const
bool is(TokenKind K) const
StringRef stringValue() const
Return the token's string value.
@ kw_cfi_aarch64_negate_ra_sign_state
@ kw_cfi_llvm_def_aspace_cfa
@ kw_inlineasm_br_indirect_target
@ kw_cfi_aarch64_negate_ra_sign_state_with_pc
@ kw_cfi_def_cfa_register
@ kw_cfi_adjust_cfa_offset
@ kw_machine_block_address_taken
@ kw_ir_block_address_taken
StringRef::iterator location() const
const APSInt & integerValue() const
This class contains a discriminated union of information about pointers in memory operands,...
int64_t Offset
Offset - This is an offset from the base Value*.
VRegInfo & getVRegInfo(Register Num)
const SlotMapping & IRSlots
const Value * getIRValue(unsigned Slot)
DenseMap< unsigned, MachineBasicBlock * > MBBSlots
StringMap< VRegInfo * > VRegInfosNamed
DenseMap< unsigned, const Value * > Slots2Values
Maps from slot numbers to function's unnamed values.
PerFunctionMIParsingState(MachineFunction &MF, SourceMgr &SM, const SlotMapping &IRSlots, PerTargetMIParsingState &Target)
PerTargetMIParsingState & Target
DenseMap< Register, VRegInfo * > VRegInfos
VRegInfo & getVRegInfoNamed(StringRef RegName)
BumpPtrAllocator Allocator
bool getVRegFlagValue(StringRef FlagName, uint8_t &FlagValue) const
bool getDirectTargetFlag(StringRef Name, unsigned &Flag)
Try to convert a name of a direct target flag to the corresponding target flag.
const RegisterBank * getRegBank(StringRef Name)
Check if the given identifier is a name of a register bank.
bool parseInstrName(StringRef InstrName, unsigned &OpCode)
Try to convert an instruction name to an opcode.
unsigned getSubRegIndex(StringRef Name)
Check if the given identifier is a name of a subregister index.
bool getTargetIndex(StringRef Name, int &Index)
Try to convert a name of target index to the corresponding target index.
void setTarget(const TargetSubtargetInfo &NewSubtarget)
bool getRegisterByName(StringRef RegName, Register &Reg)
Try to convert a register name to a register number.
bool getMMOTargetFlag(StringRef Name, MachineMemOperand::Flags &Flag)
Try to convert a name of a MachineMemOperand target flag to the corresponding target flag.
bool getBitmaskTargetFlag(StringRef Name, unsigned &Flag)
Try to convert a name of a bitmask target flag to the corresponding target flag.
const TargetRegisterClass * getRegClass(StringRef Name)
Check if the given identifier is a name of a register class.
const uint32_t * getRegMask(StringRef Identifier)
Check if the given identifier is a name of a register mask.
This struct contains the mappings from the slot numbers to unnamed metadata nodes,...
NumberedValues< GlobalValue * > GlobalValues
const RegisterBank * RegBank
union llvm::VRegInfo::@127225073067155374133234315364317264041071000132 D
const TargetRegisterClass * RC
enum llvm::VRegInfo::@374354327266250320012227113300214031244227062232 Kind
bool Explicit
VReg was explicitly specified in the .mir file.