13#ifndef LLVM_AVR_REGISTER_INFO_H
14#define LLVM_AVR_REGISTER_INFO_H
18#define GET_REGINFO_HEADER
19#include "AVRGenRegisterInfo.inc"
41 unsigned FIOperandNum,
const TargetRegisterClass * getLargestLegalSuperClass(const TargetRegisterClass *RC, const MachineFunction &MF) const override
bool eliminateFrameIndex(MachineBasicBlock::iterator MI, int SPAdj, unsigned FIOperandNum, RegScavenger *RS=nullptr) const override
Stack Frame Processing Methods.
const uint16_t * getCalleeSavedRegs(const MachineFunction *MF=nullptr) const override
BitVector getReservedRegs(const MachineFunction &MF) const override
bool shouldCoalesce(MachineInstr *MI, const TargetRegisterClass *SrcRC, unsigned SubReg, const TargetRegisterClass *DstRC, unsigned DstSubReg, const TargetRegisterClass *NewRC, LiveIntervals &LIS) const override
const TargetRegisterClass * getPointerRegClass(unsigned Kind=0) const override
const uint32_t * getCallPreservedMask(const MachineFunction &MF, CallingConv::ID CC) const override
Register getFrameRegister(const MachineFunction &MF) const override
void splitReg(Register Reg, Register &LoReg, Register &HiReg) const
Splits a 16-bit DREGS register into the lo/hi register pair.
MachineInstrBundleIterator< MachineInstr > iterator
Representation of each machine instruction.
Wrapper class representing virtual and physical registers.
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
This is an optimization pass for GlobalISel generic memory operations.