LLVM 20.0.0git
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This file models the dispatch component of an instruction pipeline. More...
#include "llvm/MC/MCRegisterInfo.h"
#include "llvm/MC/MCSubtargetInfo.h"
#include "llvm/MCA/HardwareUnits/RegisterFile.h"
#include "llvm/MCA/HardwareUnits/RetireControlUnit.h"
#include "llvm/MCA/Instruction.h"
#include "llvm/MCA/Stages/Stage.h"
Go to the source code of this file.
Classes | |
class | llvm::mca::DispatchStage |
Namespaces | |
namespace | llvm |
This is an optimization pass for GlobalISel generic memory operations. | |
namespace | llvm::mca |
This file models the dispatch component of an instruction pipeline.
The DispatchStage is responsible for updating instruction dependencies and communicating to the simulated instruction scheduler that an instruction is ready to be scheduled for execution.
Definition in file DispatchStage.h.