LLVM 22.0.0git
llvm::mca::DispatchStage Class Referencefinal

#include "llvm/MCA/Stages/DispatchStage.h"

Inheritance diagram for llvm::mca::DispatchStage:
[legend]

Public Member Functions

 DispatchStage (const MCSubtargetInfo &Subtarget, const MCRegisterInfo &MRI, unsigned MaxDispatchWidth, RetireControlUnit &R, RegisterFile &F)
bool isAvailable (const InstRef &IR) const override
 Returns true if it can execute IR during this cycle.
bool hasWorkToComplete () const override
 Returns true if some instructions are still executing this stage.
Error cycleStart () override
 Called once at the start of each cycle.
Error execute (InstRef &IR) override
 The primary action that this stage performs on instruction IR.
void dump () const
Public Member Functions inherited from llvm::mca::Stage
 Stage ()=default
virtual ~Stage ()
virtual Error cycleResume ()
 Called after the pipeline is resumed from pausing state.
virtual Error cycleEnd ()
 Called once at the end of each cycle.
void setNextInSequence (Stage *NextStage)
bool checkNextStage (const InstRef &IR) const
Error moveToTheNextStage (InstRef &IR)
 Called when an instruction is ready to move the next pipeline stage.
void addListener (HWEventListener *Listener)
 Add a listener to receive callbacks during the execution of this stage.
template<typename EventT>
void notifyEvent (const EventT &Event) const
 Notify listeners of a particular hardware event.

Additional Inherited Members

Protected Member Functions inherited from llvm::mca::Stage
const std::set< HWEventListener * > & getListeners () const

Detailed Description

Definition at line 49 of file DispatchStage.h.

Constructor & Destructor Documentation

◆ DispatchStage()

llvm::mca::DispatchStage::DispatchStage ( const MCSubtargetInfo & Subtarget,
const MCRegisterInfo & MRI,
unsigned MaxDispatchWidth,
RetireControlUnit & R,
RegisterFile & F )

Member Function Documentation

◆ cycleStart()

Error llvm::mca::DispatchStage::cycleStart ( )
overridevirtual

Called once at the start of each cycle.

This can be used as a setup phase to prepare for the executions during the cycle.

Reimplemented from llvm::mca::Stage.

Definition at line 133 of file DispatchStage.cpp.

References assert().

◆ dump()

void llvm::mca::DispatchStage::dump ( ) const

Definition at line 179 of file DispatchStage.cpp.

◆ execute()

Error llvm::mca::DispatchStage::execute ( InstRef & IR)
overridevirtual

The primary action that this stage performs on instruction IR.

Implements llvm::mca::Stage.

Definition at line 173 of file DispatchStage.cpp.

References assert(), and IR.

◆ hasWorkToComplete()

bool llvm::mca::DispatchStage::hasWorkToComplete ( ) const
inlineoverridevirtual

Returns true if some instructions are still executing this stage.

Implements llvm::mca::Stage.

Definition at line 76 of file DispatchStage.h.

◆ isAvailable()

bool llvm::mca::DispatchStage::isAvailable ( const InstRef & IR) const
overridevirtual

Returns true if it can execute IR during this cycle.

Reimplemented from llvm::mca::Stage.

Definition at line 153 of file DispatchStage.cpp.

References llvm::mca::InstructionBase::getBeginGroup(), llvm::mca::InstructionBase::getNumMicroOps(), IR, and llvm::Required.


The documentation for this class was generated from the following files: