LLVM 20.0.0git
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This pass combines split register tuple initialization into a single pseudo: More...
#include "AMDGPU.h"
#include "GCNSubtarget.h"
#include "MCTargetDesc/AMDGPUMCTargetDesc.h"
#include "llvm/CodeGen/LiveIntervals.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/InitializePasses.h"
Go to the source code of this file.
Macros | |
#define | DEBUG_TYPE "amdgpu-pre-ra-optimizations" |
Functions | |
INITIALIZE_PASS_BEGIN (GCNPreRAOptimizations, DEBUG_TYPE, "AMDGPU Pre-RA optimizations", false, false) INITIALIZE_PASS_END(GCNPreRAOptimizations | |
Variables | |
DEBUG_TYPE | |
Pre RA | optimizations |
Pre RA | false |
This pass combines split register tuple initialization into a single pseudo:
undef %0.sub1:sreg_64 = S_MOV_B32 1 %0.sub0:sreg_64 = S_MOV_B32 2 => %0:sreg_64 = S_MOV_B64_IMM_PSEUDO 0x200000001
This is to allow rematerialization of a value instead of spilling. It is supposed to be done after register coalescer to allow it to do its job and before actual register allocation to allow rematerialization.
Right now the pass only handles 64 bit SGPRs with immediate initializers, although the same shall be possible with other register classes and instructions if necessary.
Definition in file GCNPreRAOptimizations.cpp.
#define DEBUG_TYPE "amdgpu-pre-ra-optimizations" |
Definition at line 36 of file GCNPreRAOptimizations.cpp.
INITIALIZE_PASS_BEGIN | ( | GCNPreRAOptimizations | , |
DEBUG_TYPE | , | ||
"AMDGPU Pre-RA optimizations" | , | ||
false | , | ||
false | |||
) |
DEBUG_TYPE |
Definition at line 74 of file GCNPreRAOptimizations.cpp.
Pre RA false |
Definition at line 75 of file GCNPreRAOptimizations.cpp.
Pre RA optimizations |
Definition at line 74 of file GCNPreRAOptimizations.cpp.