LLVM 20.0.0git
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This pass merges inputs of swizzeable instructions into vector sharing common data and/or have enough undef subreg using swizzle abilities. More...
#include "MCTargetDesc/R600MCTargetDesc.h"
#include "R600.h"
#include "R600Defines.h"
#include "R600Subtarget.h"
#include "llvm/CodeGen/MachineDominators.h"
#include "llvm/CodeGen/MachineLoopInfo.h"
Go to the source code of this file.
Macros | |
#define | DEBUG_TYPE "vec-merger" |
Functions | |
static bool | isImplicitlyDef (MachineRegisterInfo &MRI, Register Reg) |
INITIALIZE_PASS_BEGIN (R600VectorRegMerger, DEBUG_TYPE, "R600 Vector Reg Merger", false, false) INITIALIZE_PASS_END(R600VectorRegMerger | |
static unsigned | getReassignedChan (const std::vector< std::pair< unsigned, unsigned > > &RemapChan, unsigned Chan) |
Variables | |
DEBUG_TYPE | |
R600 Vector Reg | Merger |
R600 Vector Reg | false |
This pass merges inputs of swizzeable instructions into vector sharing common data and/or have enough undef subreg using swizzle abilities.
For instance let's consider the following pseudo code : %5 = REG_SEQ %1, sub0, %2, sub1, %3, sub2, undef, sub3 ... %7 = REG_SEQ %1, sub0, %3, sub1, undef, sub2, %4, sub3 (swizzable Inst) %7, SwizzleMask : sub0, sub1, sub2, sub3
is turned into : %5 = REG_SEQ %1, sub0, %2, sub1, %3, sub2, undef, sub3 ... %7 = INSERT_SUBREG %4, sub3 (swizzable Inst) %7, SwizzleMask : sub0, sub2, sub1, sub3
This allow regalloc to reduce register pressure for vector registers and to reduce MOV count.
Definition in file R600OptimizeVectorRegisters.cpp.
#define DEBUG_TYPE "vec-merger" |
Definition at line 38 of file R600OptimizeVectorRegisters.cpp.
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static |
Definition at line 169 of file R600OptimizeVectorRegisters.cpp.
References llvm_unreachable.
INITIALIZE_PASS_BEGIN | ( | R600VectorRegMerger | , |
DEBUG_TYPE | , | ||
"R600 Vector Reg Merger" | , | ||
false | , | ||
false | |||
) |
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static |
Definition at line 40 of file R600OptimizeVectorRegisters.cpp.
DEBUG_TYPE |
Definition at line 129 of file R600OptimizeVectorRegisters.cpp.
R600 Vector Reg false |
Definition at line 130 of file R600OptimizeVectorRegisters.cpp.
R600 Vector Reg Merger |
Definition at line 130 of file R600OptimizeVectorRegisters.cpp.
Referenced by llvm::msgpack::Document::readFromBlob().