13#ifndef LLVM_LIB_TARGET_RISCV_MCTARGETDESC_RISCVMCTARGETDESC_H
14#define LLVM_LIB_TARGET_RISCV_MCTARGETDESC_RISCVMCTARGETDESC_H
25class MCObjectTargetWriter;
34 const MCRegisterInfo &
MRI,
35 const MCTargetOptions &
Options);
42#define GET_REGINFO_ENUM
43#include "RISCVGenRegisterInfo.inc"
46#define GET_INSTRINFO_ENUM
47#define GET_INSTRINFO_MC_HELPER_DECLS
48#include "RISCVGenInstrInfo.inc"
50#define GET_SUBTARGETINFO_ENUM
51#include "RISCVGenSubtargetInfo.inc"
unsigned const MachineRegisterInfo * MRI
This is an optimization pass for GlobalISel generic memory operations.
std::unique_ptr< MCObjectTargetWriter > createRISCVELFObjectWriter(uint8_t OSABI, bool Is64Bit)
MCCodeEmitter * createRISCVMCCodeEmitter(const MCInstrInfo &MCII, MCContext &Ctx)
MCAsmBackend * createRISCVAsmBackend(const Target &T, const MCSubtargetInfo &STI, const MCRegisterInfo &MRI, const MCTargetOptions &Options)