LLVM 22.0.0git
llvm::mca::InOrderIssueStage Class Referencefinal

#include "llvm/MCA/Stages/InOrderIssueStage.h"

Inheritance diagram for llvm::mca::InOrderIssueStage:
[legend]

Public Member Functions

 InOrderIssueStage (const MCSubtargetInfo &STI, RegisterFile &PRF, CustomBehaviour &CB, LSUnitBase &LSU)
unsigned getIssueWidth () const
bool isAvailable (const InstRef &) const override
 Returns true if it can execute IR during this cycle.
bool hasWorkToComplete () const override
 Returns true if some instructions are still executing this stage.
Error execute (InstRef &IR) override
 The primary action that this stage performs on instruction IR.
Error cycleStart () override
 Called once at the start of each cycle.
Error cycleEnd () override
 Called once at the end of each cycle.
Public Member Functions inherited from llvm::mca::Stage
 Stage ()=default
virtual ~Stage ()
virtual Error cycleResume ()
 Called after the pipeline is resumed from pausing state.
void setNextInSequence (Stage *NextStage)
bool checkNextStage (const InstRef &IR) const
Error moveToTheNextStage (InstRef &IR)
 Called when an instruction is ready to move the next pipeline stage.
void addListener (HWEventListener *Listener)
 Add a listener to receive callbacks during the execution of this stage.
template<typename EventT>
void notifyEvent (const EventT &Event) const
 Notify listeners of a particular hardware event.

Additional Inherited Members

Protected Member Functions inherited from llvm::mca::Stage
const std::set< HWEventListener * > & getListeners () const

Detailed Description

Definition at line 54 of file InOrderIssueStage.h.

Constructor & Destructor Documentation

◆ InOrderIssueStage()

llvm::mca::InOrderIssueStage::InOrderIssueStage ( const MCSubtargetInfo & STI,
RegisterFile & PRF,
CustomBehaviour & CB,
LSUnitBase & LSU )

Definition at line 46 of file InOrderIssueStage.cpp.

Member Function Documentation

◆ cycleEnd()

llvm::Error llvm::mca::InOrderIssueStage::cycleEnd ( )
overridevirtual

Called once at the end of each cycle.

Reimplemented from llvm::mca::Stage.

Definition at line 439 of file InOrderIssueStage.cpp.

◆ cycleStart()

llvm::Error llvm::mca::InOrderIssueStage::cycleStart ( )
overridevirtual

Called once at the start of each cycle.

This can be used as a setup phase to prepare for the executions during the cycle.

Reimplemented from llvm::mca::Stage.

Definition at line 397 of file InOrderIssueStage.cpp.

References assert(), E(), getIssueWidth(), and IR.

◆ execute()

llvm::Error llvm::mca::InOrderIssueStage::execute ( InstRef & IR)
overridevirtual

The primary action that this stage performs on instruction IR.

Implements llvm::mca::Stage.

Definition at line 198 of file InOrderIssueStage.cpp.

References E(), IR, llvm::mca::InstructionBase::isMemOp(), and llvm::mca::Instruction::setLSUTokenID().

◆ getIssueWidth()

unsigned llvm::mca::InOrderIssueStage::getIssueWidth ( ) const

Definition at line 52 of file InOrderIssueStage.cpp.

Referenced by cycleStart(), and isAvailable().

◆ hasWorkToComplete()

bool llvm::mca::InOrderIssueStage::hasWorkToComplete ( ) const
overridevirtual

Returns true if some instructions are still executing this stage.

Implements llvm::mca::Stage.

Definition at line 56 of file InOrderIssueStage.cpp.

◆ isAvailable()

bool llvm::mca::InOrderIssueStage::isAvailable ( const InstRef & IR) const
overridevirtual

Returns true if it can execute IR during this cycle.

Reimplemented from llvm::mca::Stage.

Definition at line 60 of file InOrderIssueStage.cpp.

References llvm::mca::InstructionBase::getBeginGroup(), getIssueWidth(), llvm::mca::InstructionBase::getNumMicroOps(), and IR.


The documentation for this class was generated from the following files: